コード例 #1
0
/*
 * platform_configure_usb - usb configuration based on platform type.
 * @bcm1_usb2_ctl:	value for the BCM1_USB2_CTL register, which is
 *			quirky
 */
static void __init platform_configure_usb(void)
{
	u32 bcm1_usb2_ctl;

	if (usb_configured)
		return;

	switch (asic) {
	case ASIC_ZEUS:
	case ASIC_CRONUS:
	case ASIC_CRONUSLITE:
		fs_update(0x0000, 0x11, 0x02, 0);
		bcm1_usb2_ctl = 0x803;
		break;

	case ASIC_CALLIOPE:
		fs_update(0x0000, 0x11, 0x02, 1);

		switch (platform_family) {
		case FAMILY_1500VZE:
			break;

		case FAMILY_1500VZF:
			usb_eye_configure(0x003c0000);
			break;

		default:
			usb_eye_configure(0x00300000);
			break;
		}

		bcm1_usb2_ctl = 0x803;
		break;

	default:
		pr_err("Unknown ASIC type: %d\n", asic);
		break;
	}

	/* turn on USB power */
	asic_write(0, usb2_strap);
	/* Enable all OHCI interrupts */
	asic_write(bcm1_usb2_ctl, usb2_control);
	/* USB2_STBUS_OBC store32/load32 */
	asic_write(3, usb2_stbus_obc);
	/* USB2_STBUS_MESS_SIZE 2 packets */
	asic_write(1, usb2_stbus_mess_size);
	/* USB2_STBUS_CHUNK_SIZE 2 packets */
	asic_write(1, usb2_stbus_chunk_size);

	usb_configured = true;
}
コード例 #2
0
static void platform_configure_usb(void)
{
	u32 bcm1_usb2_ctl_value;
	enum asic_type asic_type;
	unsigned long flags;

	spin_lock_irqsave(&usb_regs_lock, flags);
	usb_users++;

	if (usb_users != 1) {
		spin_unlock_irqrestore(&usb_regs_lock, flags);
		return;
	}

	asic_type = platform_get_asic();

	switch (asic_type) {
	case ASIC_ZEUS:
		fs_update(0x0000, -15, 0x02, 0, 0);
		bcm1_usb2_ctl_value = BCM1_USB2_CTL_EHCI_PRT_PWR_ACTIVE_HIGH |
			BCM1_USB2_CTL_APP_PRT_OVRCUR_IN_ACTIVE_HIGH;
		break;

	case ASIC_CRONUS:
	case ASIC_CRONUSLITE:
		usb_eye_configure(0, CRT_SPARE_USB_DIVIDE_BY_9);
		fs_update(0x8000, -14, 0x03, QAM_FS_DISABLE_DIVIDE_BY_3,
			QAM_FS_DISABLE_DIGITAL_STANDBY);
		bcm1_usb2_ctl_value = BCM1_USB2_CTL_EHCI_PRT_PWR_ACTIVE_HIGH |
			BCM1_USB2_CTL_APP_PRT_OVRCUR_IN_ACTIVE_HIGH;
		break;

	case ASIC_CALLIOPE:
		fs_update(0x0000, -15, 0x02, QAM_FS_DISABLE_DIVIDE_BY_3,
			QAM_FS_DISABLE_DIGITAL_STANDBY);

		switch (platform_get_family()) {
		case FAMILY_1500VZE:
			break;

		case FAMILY_1500VZF:
			usb_eye_configure(CRT_SPARE_PORT2_SHIFT_JK |
				CRT_SPARE_PORT1_SHIFT_JK |
				CRT_SPARE_PORT2_FAST_EDGE |
				CRT_SPARE_PORT1_FAST_EDGE, 0);
			break;

		default:
			usb_eye_configure(CRT_SPARE_PORT2_SHIFT_JK |
				CRT_SPARE_PORT1_SHIFT_JK, 0);
			break;
		}

		bcm1_usb2_ctl_value = BCM1_USB2_CTL_BISTOK |
			BCM1_USB2_CTL_EHCI_PRT_PWR_ACTIVE_HIGH |
			BCM1_USB2_CTL_APP_PRT_OVRCUR_IN_ACTIVE_HIGH;
		break;

	case ASIC_GAIA:
		fs_update(0x8000, -14, 0x03, QAM_FS_DISABLE_DIVIDE_BY_3,
			QAM_FS_DISABLE_DIGITAL_STANDBY);
		bcm1_usb2_ctl_value = BCM1_USB2_CTL_BISTOK |
			BCM1_USB2_CTL_EHCI_PRT_PWR_ACTIVE_HIGH |
			BCM1_USB2_CTL_APP_PRT_OVRCUR_IN_ACTIVE_HIGH;
		break;

	default:
		pr_err("Unknown ASIC type: %d\n", asic_type);
		bcm1_usb2_ctl_value = 0;
		break;
	}

	/*                   */
	asic_write(0, usb2_strap);
	/*                            */
	asic_write(bcm1_usb2_ctl_value, usb2_control);
	/*                               */
	asic_write(USB_STBUS_OBC_STORE32_LOAD32, usb2_stbus_obc);
	/*                                */
	asic_write(USB2_STBUS_MESS_SIZE_2, usb2_stbus_mess_size);
	/*                                 */
	asic_write(USB2_STBUS_CHUNK_SIZE_2, usb2_stbus_chunk_size);
	spin_unlock_irqrestore(&usb_regs_lock, flags);
}