static void intel_dsi_clear_device_ready(struct intel_encoder *encoder) { struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); int pipe = intel_crtc->pipe; u32 val; DRM_DEBUG_KMS("\n"); I915_WRITE(MIPI_DEVICE_READY(pipe), ULPS_STATE_ENTER); usleep_range(2000, 2500); I915_WRITE(MIPI_DEVICE_READY(pipe), ULPS_STATE_EXIT); usleep_range(2000, 2500); I915_WRITE(MIPI_DEVICE_READY(pipe), ULPS_STATE_ENTER); usleep_range(2000, 2500); val = I915_READ(MIPI_PORT_CTRL(pipe)); I915_WRITE(MIPI_PORT_CTRL(pipe), val & ~LP_OUTPUT_HOLD); usleep_range(1000, 1500); if (wait_for(((I915_READ(MIPI_PORT_CTRL(pipe)) & AFE_LATCHOUT) == 0x00000), 30)) DRM_ERROR("DSI LP not going Low\n"); I915_WRITE(MIPI_DEVICE_READY(pipe), 0x00); usleep_range(2000, 2500); vlv_disable_dsi_pll(encoder); }
void intel_disable_dsi_pll(struct intel_encoder *encoder) { struct drm_device *dev = encoder->base.dev; if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) vlv_disable_dsi_pll(encoder); else if (IS_BROXTON(dev)) bxt_disable_dsi_pll(encoder); }
static void intel_dsi_post_disable(struct intel_encoder *encoder) { DRM_DEBUG_KMS("\n"); vlv_disable_dsi_pll(encoder); }