/*
* __hal_message_db_post - Post message doorbell
*
* @vpath_handle: VPATH handle
* @num_msg_bytes: The number of new message bytes made available
* by this doorbell entry.
* @immed_msg: Immediate message to be sent
* @immed_msg_len: Immediate message length
*
* This function posts a message doorbell to doorbell FIFO
*
*/
void
__hal_message_db_post(vxge_hal_vpath_h vpath_handle,
u32 num_msg_bytes,
u8 *immed_msg,
u32 immed_msg_len)
{
u32 i;
u64 *db_ptr;
__hal_device_t *hldev;
__hal_vpath_handle_t *vp = (__hal_vpath_handle_t *) vpath_handle;
vxge_assert((vpath_handle != NULL) && (num_msg_bytes != 0));
hldev = (__hal_device_t *) vp->vpath->hldev;
vxge_hal_trace_log_dmq("==> %s:%s:%d",
__FILE__, __func__, __LINE__);
vxge_hal_trace_log_dmq("vpath_handle = 0x"VXGE_OS_STXFMT", "
"num_msg_bytes = %d, immed_msg = 0x"VXGE_OS_STXFMT", "
"immed_msg_len = %d", (ptr_t) vpath_handle, num_msg_bytes,
(ptr_t) immed_msg, immed_msg_len);
db_ptr = &vp->vpath->msg_db->control_0;
vxge_os_pio_mem_write64(vp->vpath->hldev->header.pdev,
vp->vpath->hldev->header.regh0,
VXGE_HAL_MDBW_TYPE(VXGE_HAL_MDBW_TYPE_MDBW) |
VXGE_HAL_MDBW_MESSAGE_BYTE_COUNT(num_msg_bytes),
db_ptr++);
vxge_os_pio_mem_write64(vp->vpath->hldev->header.pdev,
vp->vpath->hldev->header.regh0,
VXGE_HAL_MDBW_IMMEDIATE_BYTE_COUNT(immed_msg_len),
db_ptr++);
for (i = 0; i < immed_msg_len / 8; i++) {
vxge_os_pio_mem_write64(vp->vpath->hldev->header.pdev,
vp->vpath->hldev->header.regh0,
*((u64 *) ((void *)&immed_msg[i * 8])),
db_ptr++);
}
vxge_hal_trace_log_dmq("<== %s:%s:%d Result: 0",
__FILE__, __func__, __LINE__);
}
/*
* __hal_srpcim_alarm_process - Process Alarms.
* @hldev: HAL Device
* @srpcim_id: srpcim index
* @skip_alarms: Flag to indicate if not to clear the alarms
*
* Process srpcim alarms.
*
*/
vxge_hal_status_e
__hal_srpcim_alarm_process(
__hal_device_t * hldev,
u32 srpcim_id,
u32 skip_alarms)
{
u64 val64;
u64 alarm_status;
u64 pic_status;
u64 xgmac_status;
vxge_hal_srpcim_reg_t *srpcim_reg;
vxge_assert(hldev != NULL);
vxge_hal_trace_log_srpcim_irq("==> %s:%s:%d",
__FILE__, __func__, __LINE__);
vxge_hal_trace_log_srpcim_irq("hldev = 0x"VXGE_OS_STXFMT,
(ptr_t) hldev);
srpcim_reg = hldev->srpcim_reg[srpcim_id];
alarm_status = vxge_os_pio_mem_read64(hldev->header.pdev,
hldev->header.regh0,
&srpcim_reg->srpcim_general_int_status);
vxge_hal_info_log_srpcim_irq("alarm_status = 0x"VXGE_OS_STXFMT,
(ptr_t) alarm_status);
if (alarm_status & VXGE_HAL_SRPCIM_GENERAL_INT_STATUS_XMAC_INT) {
xgmac_status = vxge_os_pio_mem_read64(hldev->header.pdev,
hldev->header.regh0,
&srpcim_reg->xgmac_sr_int_status);
vxge_hal_info_log_srpcim_irq("xgmac_status = 0x"VXGE_OS_STXFMT,
(ptr_t) xgmac_status);
if (xgmac_status &
VXGE_HAL_XGMAC_SR_INT_STATUS_ASIC_NTWK_SR_ERR_INT) {
val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
hldev->header.regh0,
&srpcim_reg->asic_ntwk_sr_err_reg);
vxge_hal_info_log_srpcim_irq("asic_ntwk_sr_err_reg = \
0x"VXGE_OS_STXFMT, (ptr_t) val64);
if (!skip_alarms)
vxge_os_pio_mem_write64(hldev->header.pdev,
hldev->header.regh0,
VXGE_HAL_INTR_MASK_ALL,
&srpcim_reg->asic_ntwk_sr_err_reg);
}
/*
* __hal_non_offload_db_post - Post non offload doorbell
*
* @vpath_handle: vpath handle
* @txdl_ptr: The starting location of the TxDL in host memory
* @num_txds: The highest TxD in this TxDL (0 to 255 means 1 to 256)
* @no_snoop: No snoop flags
*
* This function posts a non-offload doorbell to doorbell FIFO
*
*/
void
__hal_non_offload_db_post(vxge_hal_vpath_h vpath_handle,
u64 txdl_ptr,
u32 num_txds,
u32 no_snoop)
{
u64 *db_ptr;
__hal_device_t *hldev;
__hal_vpath_handle_t *vp = (__hal_vpath_handle_t *) vpath_handle;
vxge_assert((vpath_handle != NULL) && (txdl_ptr != 0));
hldev = (__hal_device_t *) vp->vpath->hldev;
vxge_hal_trace_log_fifo("==> %s:%s:%d",
__FILE__, __func__, __LINE__);
vxge_hal_trace_log_fifo(
"vpath_handle = 0x"VXGE_OS_STXFMT", txdl_ptr = 0x"VXGE_OS_STXFMT
", num_txds = %d, no_snoop = %d", (ptr_t) vpath_handle,
(ptr_t) txdl_ptr, num_txds, no_snoop);
db_ptr = &vp->vpath->nofl_db->control_0;
vxge_os_pio_mem_write64(vp->vpath->hldev->header.pdev,
vp->vpath->hldev->header.regh0,
VXGE_HAL_NODBW_TYPE(VXGE_HAL_NODBW_TYPE_NODBW) |
VXGE_HAL_NODBW_LAST_TXD_NUMBER(num_txds) |
VXGE_HAL_NODBW_GET_NO_SNOOP(no_snoop),
db_ptr++);
vxge_os_pio_mem_write64(vp->vpath->hldev->header.pdev,
vp->vpath->hldev->header.regh0,
txdl_ptr,
db_ptr);
vxge_hal_trace_log_fifo("<== %s:%s:%d Result: 0",
__FILE__, __func__, __LINE__);
}
/*
* __hal_kdfc_swapper_set - Set the swapper bits for the kdfc.
* @hldev: HAL device object.
* @vp_id: Vpath Id
*
* Set the swapper bits appropriately for the vpath.
*
* Returns: VXGE_HAL_OK - success.
* VXGE_HAL_ERR_SWAPPER_CTRL - failed.
*
* See also: vxge_hal_status_e {}.
*/
vxge_hal_status_e
__hal_kdfc_swapper_set(
vxge_hal_device_t *hldev,
u32 vp_id)
{
u64 val64;
vxge_hal_vpath_reg_t *vpath_reg;
vxge_hal_legacy_reg_t *legacy_reg;
vxge_assert(hldev != NULL);
vxge_hal_trace_log_vpath("==> %s:%s:%d",
__FILE__, __func__, __LINE__);
vxge_hal_trace_log_vpath("hldev = 0x"VXGE_OS_STXFMT", vp_id = %d",
(ptr_t) hldev, vp_id);
vpath_reg = ((__hal_device_t *) hldev)->vpath_reg[vp_id];
legacy_reg = ((__hal_device_t *) hldev)->legacy_reg;
val64 = vxge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
&legacy_reg->pifm_wr_swap_en);
if (val64 == VXGE_HAL_SWAPPER_WRITE_BYTE_SWAP_ENABLE) {
val64 = vxge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
&vpath_reg->kdfcctl_cfg0);
vxge_os_wmb();
val64 |= VXGE_HAL_KDFCCTL_CFG0_BYTE_SWAPEN_FIFO0 |
VXGE_HAL_KDFCCTL_CFG0_BYTE_SWAPEN_FIFO1 |
VXGE_HAL_KDFCCTL_CFG0_BYTE_SWAPEN_FIFO2;
vxge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
val64,
&vpath_reg->kdfcctl_cfg0);
vxge_os_wmb();
}
vxge_hal_trace_log_vpath("<== %s:%s:%d Result: 0",
__FILE__, __func__, __LINE__);
return (VXGE_HAL_OK);
}
/*
* __hal_vpath_swapper_set - Set the swapper bits for the vpath.
* @hldev: HAL device object.
* @vp_id: Vpath Id
*
* Set the swapper bits appropriately for the vpath.
*
* Returns: VXGE_HAL_OK - success.
* VXGE_HAL_ERR_SWAPPER_CTRL - failed.
*
* See also: vxge_hal_status_e {}.
*/
vxge_hal_status_e
__hal_vpath_swapper_set(
vxge_hal_device_t *hldev,
u32 vp_id)
{
#if !defined(VXGE_OS_HOST_BIG_ENDIAN)
u64 val64;
vxge_hal_vpath_reg_t *vpath_reg;
vxge_assert(hldev != NULL);
vxge_hal_trace_log_vpath("==> %s:%s:%d",
__FILE__, __func__, __LINE__);
vxge_hal_trace_log_vpath(
"hldev = 0x"VXGE_OS_STXFMT", vp_id = %d",
(ptr_t) hldev, vp_id);
vpath_reg = ((__hal_device_t *) hldev)->vpath_reg[vp_id];
val64 = vxge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
&vpath_reg->vpath_general_cfg1);
vxge_os_wmb();
val64 |= VXGE_HAL_VPATH_GENERAL_CFG1_CTL_BYTE_SWAPEN;
vxge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
val64,
&vpath_reg->vpath_general_cfg1);
vxge_os_wmb();
vxge_hal_trace_log_vpath("<== %s:%s:%d Result: 0",
__FILE__, __func__, __LINE__);
#endif
return (VXGE_HAL_OK);
}
/*
* __hal_non_offload_db_reset - Reset non offload doorbell fifo
*
* @vpath_handle: vpath handle
*
* This function resets non-offload doorbell FIFO
*
*/
vxge_hal_status_e
__hal_non_offload_db_reset(vxge_hal_vpath_h vpath_handle)
{
vxge_hal_status_e status;
__hal_device_t *hldev;
__hal_vpath_handle_t *vp = (__hal_vpath_handle_t *) vpath_handle;
vxge_assert(vpath_handle != NULL);
hldev = (__hal_device_t *) vp->vpath->hldev;
vxge_hal_trace_log_fifo("==> %s:%s:%d",
__FILE__, __func__, __LINE__);
vxge_hal_trace_log_fifo(
"vpath_handle = 0x"VXGE_OS_STXFMT, (ptr_t) vpath_handle);
vxge_os_pio_mem_write64(vp->vpath->hldev->header.pdev,
vp->vpath->hldev->header.regh0,
VXGE_HAL_CMN_RSTHDLR_CFG2_SW_RESET_FIFO0(
1 << (16 - vp->vpath->vp_id)),
&vp->vpath->hldev->common_reg->cmn_rsthdlr_cfg2);
vxge_os_wmb();
status = vxge_hal_device_register_poll(vp->vpath->hldev->header.pdev,
vp->vpath->hldev->header.regh0,
&vp->vpath->hldev->common_reg->cmn_rsthdlr_cfg2, 0,
(u64) VXGE_HAL_CMN_RSTHDLR_CFG2_SW_RESET_FIFO0(
1 << (16 - vp->vpath->vp_id)),
VXGE_HAL_DEF_DEVICE_POLL_MILLIS);
vxge_hal_trace_log_fifo("<== %s:%s:%d Result: 0",
__FILE__, __func__, __LINE__);
return (status);
}
/*
* __hal_ifmsg_wmsg_post - Posts the srpcim to vpath req
* @hldev: Hal device
* @src_vp_id: Source vpath id
* @dest_vp_id: Vpath id, VXGE_HAL_RTS_ACCESS_STEER_MSG_DEST_MRPCIM, or
* VXGE_HAL_RTS_ACCESS_STEER_MSG_DEST_BROADCAST
* @msg_type: wsmsg type
* @msg_data: wsmsg data
*
* Posts the req
*/
vxge_hal_status_e
__hal_ifmsg_wmsg_post(
__hal_device_t *hldev,
u32 src_vp_id,
u32 dest_vp_id,
u32 msg_type,
u32 msg_data)
{
u64 val64;
vxge_hal_vpath_reg_t *vp_reg;
vxge_hal_status_e status;
vxge_assert(hldev);
vp_reg = hldev->vpath_reg[src_vp_id];
vxge_hal_trace_log_vpath("==> %s:%s:%d",
__FILE__, __func__, __LINE__);
vxge_hal_trace_log_srpcim(
"hldev = 0x"VXGE_OS_STXFMT", src_vp_id = %d, dest_vp_id = %d, "
"msg_type = %d, msg_data = %d", (ptr_t) hldev, src_vp_id,
dest_vp_id, msg_type, msg_data);
vxge_os_pio_mem_write64(hldev->header.pdev,
hldev->header.regh0,
0,
&vp_reg->rts_access_steer_ctrl);
vxge_os_wmb();
vxge_os_pio_mem_write64(hldev->header.pdev,
hldev->header.regh0,
VXGE_HAL_RTS_ACCESS_STEER_DATA0_IGNORE_IN_SVC_CHECK |
VXGE_HAL_RTS_ACCESS_STEER_DATA0_MSG_TYPE(msg_type) |
VXGE_HAL_RTS_ACCESS_STEER_DATA0_MSG_DEST(dest_vp_id) |
VXGE_HAL_RTS_ACCESS_STEER_DATA0_MSG_SRC(src_vp_id) |
VXGE_HAL_RTS_ACCESS_STEER_DATA0_SEQ_NUM(++hldev->ifmsg_seqno) |
VXGE_HAL_RTS_ACCESS_STEER_DATA0_MSG_DATA(msg_data),
&vp_reg->rts_access_steer_data0);
vxge_os_pio_mem_write64(hldev->header.pdev,
hldev->header.regh0,
0,
&vp_reg->rts_access_steer_data1);
vxge_os_wmb();
val64 = VXGE_HAL_RTS_ACCESS_STEER_CTRL_ACTION(
VXGE_HAL_RTS_ACCESS_STEER_CTRL_ACTION_SEND_MSG) |
VXGE_HAL_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL(
VXGE_HAL_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_FW_MEMO) |
VXGE_HAL_RTS_ACCESS_STEER_CTRL_STROBE |
VXGE_HAL_RTS_ACCESS_STEER_CTRL_OFFSET(0);
vxge_hal_pio_mem_write32_lower(hldev->header.pdev,
hldev->header.regh0,
(u32) bVAL32(val64, 32),
&vp_reg->rts_access_steer_ctrl);
vxge_os_wmb();
vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
hldev->header.regh0,
(u32) bVAL32(val64, 0),
&vp_reg->rts_access_steer_ctrl);
vxge_os_wmb();
status = vxge_hal_device_register_poll(hldev->header.pdev,
hldev->header.regh0,
&vp_reg->rts_access_steer_ctrl, 0,
VXGE_HAL_RTS_ACCESS_STEER_CTRL_STROBE,
WAIT_FACTOR * hldev->header.config.device_poll_millis);
if (status != VXGE_HAL_OK) {
vxge_hal_trace_log_driver("<== %s:%s:%d Result: %d",
__FILE__, __func__, __LINE__, status);
return (status);
}
val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
hldev->header.regh0,
&vp_reg->rts_access_steer_ctrl);
if (val64 & VXGE_HAL_RTS_ACCESS_STEER_CTRL_RMACJ_STATUS) {
vxge_os_pio_mem_read64(hldev->header.pdev,
hldev->header.regh0,
&vp_reg->rts_access_steer_data0);
status = VXGE_HAL_OK;
} else {
status = VXGE_HAL_FAIL;
}
vxge_hal_trace_log_srpcim("<== %s:%s:%d Result = %d",
__FILE__, __func__, __LINE__, status);
return (status);
}
/*
* _hal_legacy_swapper_set - Set the swapper bits for the legacy secion.
* @pdev: PCI device object.
* @regh: BAR0 mapped memory handle (Solaris), or simply PCI device @pdev
* (Linux and the rest.)
* @legacy_reg: Address of the legacy register space.
*
* Set the swapper bits appropriately for the lagacy section.
*
* Returns: VXGE_HAL_OK - success.
* VXGE_HAL_ERR_SWAPPER_CTRL - failed.
*
* See also: vxge_hal_status_e {}.
*/
vxge_hal_status_e
__hal_legacy_swapper_set(
pci_dev_h pdev,
pci_reg_h regh,
vxge_hal_legacy_reg_t *legacy_reg)
{
u64 val64;
vxge_hal_status_e status;
vxge_assert(legacy_reg != NULL);
vxge_hal_trace_log_driver("==> %s:%s:%d",
__FILE__, __func__, __LINE__);
vxge_hal_trace_log_driver(
"pdev = 0x"VXGE_OS_STXFMT", regh = 0x"VXGE_OS_STXFMT", "
"legacy_reg = 0x"VXGE_OS_STXFMT, (ptr_t) pdev, (ptr_t) regh,
(ptr_t) legacy_reg);
val64 = vxge_os_pio_mem_read64(pdev, regh, &legacy_reg->toc_swapper_fb);
vxge_hal_info_log_driver("TOC Swapper Fb: 0x"VXGE_OS_LLXFMT, val64);
vxge_os_wmb();
switch (val64) {
case VXGE_HAL_SWAPPER_INITIAL_VALUE:
return (VXGE_HAL_OK);
case VXGE_HAL_SWAPPER_BYTE_SWAPPED_BIT_FLIPPED:
vxge_os_pio_mem_write64(pdev, regh,
VXGE_HAL_SWAPPER_READ_BYTE_SWAP_ENABLE,
&legacy_reg->pifm_rd_swap_en);
vxge_os_pio_mem_write64(pdev, regh,
VXGE_HAL_SWAPPER_READ_BIT_FLAP_ENABLE,
&legacy_reg->pifm_rd_flip_en);
vxge_os_pio_mem_write64(pdev, regh,
VXGE_HAL_SWAPPER_WRITE_BYTE_SWAP_ENABLE,
&legacy_reg->pifm_wr_swap_en);
vxge_os_pio_mem_write64(pdev, regh,
VXGE_HAL_SWAPPER_WRITE_BIT_FLAP_ENABLE,
&legacy_reg->pifm_wr_flip_en);
break;
case VXGE_HAL_SWAPPER_BYTE_SWAPPED:
vxge_os_pio_mem_write64(pdev, regh,
VXGE_HAL_SWAPPER_READ_BYTE_SWAP_ENABLE,
&legacy_reg->pifm_rd_swap_en);
vxge_os_pio_mem_write64(pdev, regh,
VXGE_HAL_SWAPPER_WRITE_BYTE_SWAP_ENABLE,
&legacy_reg->pifm_wr_swap_en);
break;
case VXGE_HAL_SWAPPER_BIT_FLIPPED:
vxge_os_pio_mem_write64(pdev, regh,
VXGE_HAL_SWAPPER_READ_BIT_FLAP_ENABLE,
&legacy_reg->pifm_rd_flip_en);
vxge_os_pio_mem_write64(pdev, regh,
VXGE_HAL_SWAPPER_WRITE_BIT_FLAP_ENABLE,
&legacy_reg->pifm_wr_flip_en);
break;
}
vxge_os_wmb();
val64 = vxge_os_pio_mem_read64(pdev, regh, &legacy_reg->toc_swapper_fb);
if (val64 == VXGE_HAL_SWAPPER_INITIAL_VALUE) {
status = VXGE_HAL_OK;
} else {
vxge_hal_err_log_driver("%s:TOC Swapper setting failed",
__func__);
status = VXGE_HAL_ERR_SWAPPER_CTRL;
}
vxge_hal_info_log_driver("TOC Swapper Fb: 0x"VXGE_OS_LLXFMT, val64);
vxge_hal_trace_log_driver("<== %s:%s:%d Result: %d",
__FILE__, __func__, __LINE__, status);
return (status);
}