/* SynaProgramConfiguration writes the configuration section of the image block by block
*/
static void SynaProgramConfiguration(void)
{
unsigned char uData[2];
const unsigned char *puData = SynaconfigImgData; //ConfigBlockData
unsigned short blockNum;
// int i;
printk("\nProgram Configuration Section...\n");
for (blockNum = 0; blockNum < SynaConfigBlockCount; blockNum++) {
uData[0] = blockNum & 0xff;
uData[1] = (blockNum & 0xff00) >> 8;
printk("--Writing config-- block: %d/%d \n", blockNum+1, SynaConfigBlockCount);
//Block by blcok, write the block number and data to the corresponding F34 data registers
writeRMI(SynaF34Reflash_BlockNum, &uData[0], 2);
writeRMI(SynaF34Reflash_BlockData, puData, SynaConfigBlockSize);
puData += SynaConfigBlockSize;
// Issue the "Write Configuration Block" command
uData[0] = 0x06;
writeRMI(SynaF34_FlashControl, &uData[0], 1);
SynaWaitATTN();
//printk(".");
}
}
/* SynaFlashFirmwareWrite writes the firmware section of the image block by
* block
*/
static void SynaFlashFirmwareWrite(void)
{
u8 *puFirmwareData;
u8 uData[2];
unsigned short blockNum;
pr_info("tsp fw. : SynaFlashFirmwareWrite\n");
puFirmwareData = (u8 *) &SynaFirmwareData[0x100];
for (blockNum = 0; blockNum < SynaFirmwareBlockCount; ++blockNum) {
/* Block by blcok, write the block number and data to
the corresponding F34 data registers */
uData[0] = blockNum & 0xff;
uData[1] = (blockNum & 0xff00) >> 8;
writeRMI(SynaF34Reflash_BlockNum, uData, 2);
writeRMI(SynaF34Reflash_BlockData, puFirmwareData,
SynaFirmwareBlockSize);
puFirmwareData += SynaFirmwareBlockSize;
/* Issue the "Write Firmware Block" command */
uData[0] = 2;
writeRMI(SynaF34_FlashControl, uData, 1);
SynaWaitATTN();
}
}
/* SynaProgramConfiguration writes the configuration section of the image block
* by block
*/
static void SynaProgramConfiguration(void)
{
u8 uData[2];
u8 *puData;
unsigned short blockNum;
puData = (u8 *) &SynaFirmwareData[0xb100];
pr_info("tsp fw. : Program Configuration Section...\n");
for (blockNum = 0; blockNum < SynaConfigBlockCount; blockNum++) {
uData[0] = blockNum & 0xff;
uData[1] = (blockNum & 0xff00) >> 8;
/* Block by blcok, write the block number and data to
the corresponding F34 data registers */
writeRMI(SynaF34Reflash_BlockNum, uData, 2);
writeRMI(SynaF34Reflash_BlockData, puData, SynaConfigBlockSize);
puData += SynaConfigBlockSize;
/* Issue the "Write Configuration Block" command */
uData[0] = 0x06;
writeRMI(SynaF34_FlashControl, uData, 1);
SynaWaitATTN();
pr_info(".");
}
}
/* SynaFlashFirmwareWrite writes the firmware section of the image block by block
*/
void SynaFlashFirmwareWrite(struct i2c_client *client)
{
unsigned char *puFirmwareData = SynafirmwareImgData;
unsigned char uData[2];
unsigned short blockNum;
enum FlashCommand cmd;
TPD_LOG("%s\n", __func__);
for (blockNum = 0; blockNum < SynaFirmwareBlockCount; ++blockNum) {
if (blockNum == 0) {
/* Block by blcok, write the block number and data to the corresponding F34 data registers */
uData[0] = blockNum & 0xff;
uData[1] = (blockNum & 0xff00) >> 8;
writeRMI(client, SynaF34Reflash_BlockNum, &uData[0], 2);
}
writeRMI(client, SynaF34Reflash_BlockData, puFirmwareData, SynaFirmwareBlockSize);
puFirmwareData += SynaFirmwareBlockSize;
/* Issue the "Write Firmware Block" command */
cmd = m_uF34ReflashCmd_FirmwareWrite;
writeRMI(client, SynaF34_FlashControl, (unsigned char *)&cmd, 1);
SynaWaitForATTN(1000, client);
CheckFlashStatus(cmd, client);
/* #ifdef SHOW_PROGRESS */
#if 1 /* APK_TEST */
if (blockNum % 100 == 0)
TPD_LOG("blk %d / %d\n", blockNum, SynaFirmwareBlockCount);
#endif
}
/* SynaBootloaderLock locks down the bootloader
*/
static void SynaBootloaderLock(void)
{
unsigned short lockBlockCount;
unsigned char *puFirmwareData = SynalockImgData;
unsigned char uData[2];
unsigned short uBlockNum;
// Check if device is in unlocked state
readRMI((SynaF34QueryBase+ 2), &uData[0], 1);
//Device is unlocked
if (uData[0] & 0x02) {
printk("Device unlocked. Lock it first...\n");
// Different bootloader version has different block count for the lockdown data
// Need to check the bootloader version from the image file being reflashed
switch (SynafirmwareImgVersion) {
case 2:
lockBlockCount = 3;
break;
case 3:
lockBlockCount = 4;
break;
default:
lockBlockCount = 0;
break;
}
// Write the lockdown info block by block
// This reference code of lockdown process does not check for bootloader version
// currently programmed on the ASIC against the bootloader version of the image to
// be reflashed. Such case should not happen in practice. Reflashing cross different
// bootloader versions is not supported.
for (uBlockNum = 0; uBlockNum < lockBlockCount; ++uBlockNum) {
uData[0] = uBlockNum & 0xff;
uData[1] = (uBlockNum & 0xff00) >> 8;
/* Write Block Number */
readRMI(SynaF34Reflash_BlockNum, &uData[0], 2);
/* Write Data Block */
writeRMI(SynaF34Reflash_BlockData, puFirmwareData, SynaFirmwareBlockSize);
/* Move to next data block */
puFirmwareData += SynaFirmwareBlockSize;
/* Issue Write Lockdown Block command */
uData[0] = 4;
writeRMI(SynaF34_FlashControl, &uData[0], 1);
/* Wait ATTN until device is done writing the block and is ready for the next. */
SynaWaitATTN();
}
printk("Device locking done.\n");
// Enable reflash again to finish the lockdown process.
// Since this lockdown process is part of the reflash process, we are enabling
// reflash instead, rather than resetting the device to finish the unlock procedure.
SynaEnableFlashing();
} else printk("Device already locked.\n");
bool F54_SetRawCapData(struct i2c_client *ts_client, s16 *node_data)
{
u8 *ImageBuffer;
int i, k, length;
unsigned char command;
client = ts_client;
RegSetup(); /* PDT scan for reg map adress mapping */
length = numberOfTx * numberOfRx * 2;
/* Set report mode to to run the AutoScan */
command = 0x03;
writeRMI(F54_Data_Base, &command, 1);
command = 0x00;
writeRMI(F54_Data_LowIndex, &command, 1);
writeRMI(F54_Data_HighIndex, &command, 1);
/* Set the GetReport bit to run the AutoScan */
command = 0x01;
writeRMI(F54_Command_Base, &command, 1);
/* Wait until the command is completed */
do {
udelay(1000);
readRMI(F54_Command_Base, &command, 1);
} while (command == 0x01);
ImageBuffer =
kmalloc(sizeof(u8) * CFG_F54_TXCOUNT * CFG_F54_RXCOUNT * 2, GFP_KERNEL);
if (ImageBuffer == NULL) {
pr_err("tsp fw. : alloc fw. memory failed.\n");
return false;
}
/* Read raw_cap data */
readRMI(F54_Data_Buffer, ImageBuffer, length);
for (i = 0, k = 0; i < numberOfTx * numberOfRx; i++, k += 2)
node_data[i] =
(s16)(ImageBuffer[k] | (ImageBuffer[k + 1] << 8));
/* reset TSP IC */
SetPage(0x00);
command = 0x01;
writeRMI(F01_Command_Base, &command, 1);
udelay(160);
readRMI(F01_Data_Base + 1, &command, 1);
kfree(ImageBuffer);
return true;
}
/* SynaInitialize sets up the reflahs process
*/
static void SynaInitialize(void)
{
unsigned char uData[1]; // uData[2]
unsigned char uStatus;
printk("\nInitializing Reflash Process...");
#define PAGE_SELECT_REG 0xff
uData[0] = 0x00;
writeRMI(PAGE_SELECT_REG, uData, 1); //select page 0
SynafirmwareImgData = 0;
SynaconfigImgData = 0 ;
do {
readRMI(0, &uStatus, 1);
if (uStatus & 0x80) {
break;
}
} while (uStatus & 0x40);
SynaSetup();
//readRMI(SynaF34ReflashQuery_FirmwareBlockSize, &uData[0], 2);
//SynaFirmwareBlockSize = uData[0] | (uData[1] << 8);
}
bool readTouchKeyThreshold(struct i2c_client *ts_client, u8 *command)
{
#if 0
u8 resetCmd;
client = ts_client;
SetPage(0x02);
F54_PDTscan(); /* scan for page 0x02 */
readRMI(F1A_Button_Threshold, command, 2);;
// printk("hunny2 : %d 0x%x\n", *command, *command);
/* reset TSP IC */
SetPage(0x00);
resetCmd = 0x01;
writeRMI(F01_Command_Base, &resetCmd, 1);
#else
*command = 50; // guide by synaptics.
#endif
return true;
}
/* SynaEnableFlashing kicks off the reflash process
*/
void SynaEnableFlashing(struct i2c_client *client)
{
unsigned char uStatus = 0;
enum FlashCommand cmd;
TPD_LOG("%s\n", __func__);
TPD_LOG("Enable Reflash...\n");
readRMI(client, SynaF01DataBase, &uStatus, 1);
/* APK_TEST */
TPD_LOG("APK_TEST uStatus= 0x%02x\n", uStatus);
if ((uStatus & 0x40) == 0 /*|| force */) {
/* Reflash is enabled by first reading the bootloader ID from the firmware and write it back */
SynaReadBootloadID(client);
SynaWriteBootloadID(client);
/* Write the "Enable Flash Programming command to F34 Control register */
/* Wait for ATTN and then clear the ATTN. */
cmd = m_uF34ReflashCmd_Enable;
writeRMI(client, SynaF34_FlashControl, (unsigned char *)&cmd, 1);
SynaWaitForATTN(1000, client);
/* I2C addrss may change */
/* ConfigCommunication();//APK_TEST */
/* Scan the PDT again to ensure all register offsets are correct */
SynaScanPDT(client);
/* Read the "Program Enabled" bit of the F34 Control register, and proceed only if the */
/* bit is set. */
CheckFlashStatus(cmd, client);
}
}
/* SynaWriteBootloadID writes the bootloader ID to the F34 data register to unlock the reflash process
*/
static void SynaWriteBootloadID(void)
{
unsigned char uData[2];
uData[0] = SynaBootloadID % 0x100;
uData[1] = SynaBootloadID / 0x100;
writeRMI(SynaF34Reflash_BlockData, &uData[0], 2);
}
/* SynaWriteBootloadID writes the bootloader ID to the F34 data register to
* unlock the reflash process
*/
static void SynaWriteBootloadID(void)
{
u8 uData[2];
pr_info("tsp fw. : SynaWriteBootloadID\n");
uData[0] = SynaBootloadID % 0x100;
uData[1] = SynaBootloadID / 0x100;
writeRMI(SynaF34Reflash_BlockData, uData, 2);
}
/* SynaWriteBootloadID writes the bootloader ID to the F34 data register to unlock the reflash process
*/
void SynaWriteBootloadID(struct i2c_client *client)
{
unsigned char uData[2];
TPD_LOG("%s\n", __func__);
uData[0] = SynaBootloadID % 0x100;
uData[1] = SynaBootloadID / 0x100;
writeRMI(client, SynaF34Reflash_BlockData, &uData[0], 2);
}
void F01_SetTABit(struct i2c_client *ts_client, bool set)
{
u8 command;
client = ts_client;
F54_PDTscan();
command = set ? 0x20 : 0x00;
writeRMI(F01_Control_Base, &command, 1);
return;
}
/* SynaEnableFlashing kicks off the reflash process
*/
static int SynaEnableFlashing(void)
{
unsigned char uData;
unsigned char uStatus;
int retry = 3;
printk("\nEnable Reflash...\n");
// Reflash is enabled by first reading the bootloader ID from the firmware and write it back
SynaReadBootloadID();
SynaWriteBootloadID();
// Make sure Reflash is not already enabled
do {
readRMI(SynaF34_FlashControl, &uData, 1);
printk("----Read reflash enable ---uData=0x%x--\n",uData);
} while (uData == 0x0f);//while (((uData & 0x0f) != 0x00));
// Clear ATTN
readRMI (SynaF01DataBase, &uStatus, 1);
printk("----Read status ---uStatus=0x%x--\n",uStatus);
if ((uStatus &0x40) == 0) {
// Write the "Enable Flash Programming command to F34 Control register
// Wait for ATTN and then clear the ATTN.
//uData = 0x0f; //lemon
readRMI(SynaF34_FlashControl, &uData, 1);
uData = uData | 0x0f;
writeRMI(SynaF34_FlashControl, &uData, 1);
SynaWaitForATTN();
readRMI((SynaF01DataBase + 1), &uStatus, 1);
// Scan the PDT again to ensure all register offsets are correct
SynaSetup();
// Read the "Program Enabled" bit of the F34 Control register, and proceed only if the
// bit is set.
readRMI(SynaF34_FlashControl, &uData, 1);
printk("----read--enable ---uData=0x%x--\n",uData);
while (uData != 0x80) {
// In practice, if uData!=0x80 happens for multiple counts, it indicates reflash
// is failed to be enabled, and program should quit
printk("%s Can NOT enable reflash !!!\n",__func__);
if (!retry--)
return -1;
readRMI(SynaF34_FlashControl, &uData, 1);
printk("----read--enable ---uData=0x%x--\n",uData);
}
}
return 0;
}
static void RegSetup(void)
{
unsigned char MaxNumberTx;
unsigned char MaxNumberRx;
unsigned char command;
int i;
numberOfRx = 0;
numberOfTx = 0;
SetPage(0x01);
F54_PDTscan(); /* scan for page 0x01 */
SetPage(0x00);
F54_PDTscan(); /* scan for page 0x00 */
/* Check Used Rx channels */
readRMI(F11_MaxNumberOfRx_Addr, &MaxNumberRx, 1);
SetPage(0x01);
F54_PhysicalTx_Addr = F54_PhysicalRx_Addr + MaxNumberRx;
readRMI(F54_PhysicalRx_Addr, &RxChannelUsed[0], MaxNumberRx);
/* Checking Used Tx channels */
SetPage(0x00);
readRMI(F11_MaxNumberOfTx_Addr, &MaxNumberTx, 1);
SetPage(0x01);
readRMI(F54_PhysicalTx_Addr, &TxChannelUsed[0], MaxNumberTx);
/* Check used number of Rx */
for (i = 0; i < MaxNumberRx; i++) {
if (RxChannelUsed[i] == 0xff)
break;
numberOfRx++;
}
/* Check used number of Tx */
for (i = 0; i < MaxNumberTx; i++) {
if (TxChannelUsed[i] == 0xff)
break;
numberOfTx++;
}
/* Enabling only the analog image reporting interrupt, and
* turn off the rest
*/
SetPage(0x00);
command = 0x08;
writeRMI(F01_Control_Base+1, &command, 1);
SetPage(0x01);
}
/* SynaInitialize sets up the reflahs process
*/
void SynaInitialize(struct i2c_client *client)
{
u8 data;
TPD_LOG("%s\n", __func__);
TPD_LOG("\nInitializing Reflash Process...\n");
data = 0x00;
writeRMI(client, 0xff, &data, 1);
SynaImageParser(client);
SynaScanPDT(client);
}
/* SynaProgramFirmware prepares the firmware writing process
*/
static void SynaProgramFirmware(void)
{
u8 uData;
pr_info("tsp fw. : Program Firmware Section...");
SynaReadBootloadID();
SynaWriteBootloadID();
uData = 3;
writeRMI(SynaF34_FlashControl, &uData, 1);
SynaWaitATTN();
SynaFlashFirmwareWrite();
}
/* SynaFlashFirmwareWrite writes the firmware section of the image block by block
*/
static void SynaFlashFirmwareWrite(void)
{
const unsigned char *puFirmwareData = SynafirmwareImgData;
unsigned char uData[2];
unsigned short blockNum;
printk("----SynaFlashFirmwareWrite----\n");
for (blockNum = 0; blockNum < SynaFirmwareBlockCount; ++blockNum) {
//Block by blcok, write the block number and data to the corresponding F34 data registers
uData[0] = blockNum & 0xff;
uData[1] = (blockNum & 0xff00) >> 8;
printk("--Writing data-- block: %d/%d \n", blockNum+1, SynaFirmwareBlockCount);
writeRMI(SynaF34Reflash_BlockNum, &uData[0], 2);
//printk("--SynaFlashFirmwareWrite----2\n");
writeRMI(SynaF34Reflash_BlockData, puFirmwareData, SynaFirmwareBlockSize);
puFirmwareData += SynaFirmwareBlockSize;
//printk("--SynaFlashFirmwareWrite----3\n");
// Issue the "Write Firmware Block" command
uData[0] = 2;
writeRMI(SynaF34_FlashControl, &uData[0], 1);
//printk("--SynaFlashFirmwareWrite----4\n");
SynaWaitATTN1();
}
}
/* EraseConfigBlock erases the config block
*/
void eraseAllBlock(struct i2c_client *client)
{
enum FlashCommand cmd;
TPD_LOG("%s\n", __func__);
/* Erase of config block is done by first entering into bootloader mode */
SynaReadBootloadID(client);
SynaWriteBootloadID(client);
/* Command 7 to erase config block */
cmd = m_uF34ReflashCmd_EraseAll;
writeRMI(client, SynaF34_FlashControl, (unsigned char *)&cmd, 1);
SynaWaitForATTN(6000, client);
CheckFlashStatus(cmd, client);
}
/* eraseConfigBlock erases the config block */
static void eraseConfigBlock(void)
{
u8 uData;
pr_info("tsp fw. : eraseConfigBlock\n");
/* Erase of config block is done by first entering into
bootloader mode */
SynaReadBootloadID();
SynaWriteBootloadID();
/* Command 7 to erase config block */
uData = 7;
writeRMI(SynaF34_FlashControl, &uData, 1);
SynaWaitATTN();
}
/* SynaEnableFlashing kicks off the reflash process
*/
static void SynaEnableFlashing(void)
{
u8 uData;
u8 uStatus;
pr_info("\nEnable Reflash...");
/* Reflash is enabled by first reading the bootloader ID from
the firmware and write it back */
SynaReadBootloadID();
SynaWriteBootloadID();
/* Make sure Reflash is not already enabled */
do {
readRMI(SynaF34_FlashControl, &uData, 1);
} while (((uData & 0x0f) != 0x00));
readRMI(SynaF01DataBase, &uStatus, 1);
if ((uStatus & 0x40) == 0) {
/* Write the "Enable Flash Programming command to
F34 Control register Wait for ATTN and then clear the ATTN. */
uData = 0x0f;
writeRMI(SynaF34_FlashControl, &uData, 1);
mdelay(300);
readRMI((SynaF01DataBase + 1), &uStatus, 1);
/* Scan the PDT again to ensure all register offsets are
correct */
SynaSetup();
/* Read the "Program Enabled" bit of the F34 Control register,
and proceed only if the bit is set.*/
readRMI(SynaF34_FlashControl, &uData, 1);
while (uData != 0x80) {
/* In practice, if uData!=0x80 happens for multiple
counts, it indicates reflash is failed to be enabled,
and program should quit */
;
}
}
}
/* SynaInitialize sets up the reflahs process
*/
static void SynaInitialize(void)
{
u8 uData[2];
pr_info("tsp fw. : Initializing Reflash Process...\n");
uData[0] = 0x00;
writeRMI(0xff, uData, 1);
SynaSetup();
SynafirmwareImgData = &FirmwareImage[0];
SynaconfigImgData = &ConfigImage[0];
readRMI(SynaF34ReflashQuery_FirmwareBlockSize, uData, 2);
SynaFirmwareBlockSize = uData[0] | (uData[1] << 8);
}
/* SynaProgramFirmware prepares the firmware writing process
*/
static void SynaProgramFirmware(void)
{
unsigned char uData;
printk("\nProgram Firmware Section...");
SynaReadBootloadID();
printk("\n------------SynaReadBootloadID()--");
SynaWriteBootloadID();
printk("\n-------------SynaWriteBootloadID()--");
uData = 3;
writeRMI(SynaF34_FlashControl, &uData, 1);
printk("\n------------writeRMI(SynaF34_FlashControl, &uData, 1)--\n");
msleep(1000);
SynaWaitATTN();
printk("\n-------------SynaWaitATTN()---\n");
SynaFlashFirmwareWrite();
printk("\n-------------SynaFlashFirmwareWrite()---\n");
}
int synaptics_set_low_temp_bit(const bool set)
{
u8 command;
if (!client) {
pr_err("tsp: %s: Can't find i2c client info.\n", __func__);
return -1;
}
SetPage(0x04);
PDTscan();
readRMI(F51_Feature_Ctrl, &command, 1);
command |= set ? 0x80 : 0x00;
writeRMI(F51_Feature_Ctrl, &command, 1);
SetPage(0x00);
return 0;
}
/* SynaFinalizeReflash finalizes the reflash process
*/
static void SynaFinalizeReflash(void)
{
unsigned char uData;
unsigned char uStatus;
printk("\nFinalizing Reflash...\n");
// Issue the "Reset" command to F01 command register to reset the chip
// This command will also test the new firmware image and check if its is valid
uData = 1;
writeRMI(SynaF01CommandBase, &uData, 1);
SynaWaitForATTN();
readRMI(SynaF01DataBase, &uData, 1);
printk("-----SynaFinalizeReflash-1-\n");
// Sanity check that the reflash process is still enabled
do {
readRMI(SynaF34_FlashControl, &uStatus, 1);
printk("-----SynaFinalizeReflash-2-\n");
} while ((uStatus & 0x0f) != 0x00);
printk("-----SynaFinalizeReflash-3-\n");
readRMI((SynaF01DataBase + 1), &uStatus, 1);
printk("-----SynaFinalizeReflash-4-\n");
SynaSetup();
printk("-----SynaFinalizeReflash-5-\n");
uData = 0;
// Check if the "Program Enabled" bit in F01 data register is cleared
// Reflash is completed, and the image passes testing when the bit is cleared
do {
readRMI(SynaF01DataBase, &uData, 1);
printk("-----SynaFinalizeReflash-6- data=%02x\n", uData);
} while ((uData & 0x40) != 0);
printk("-----SynaFinalizeReflash-7-\n");
// Rescan PDT the update any changed register offsets
SynaSetup();
printk("\nReflash Completed. Please reboot.\n");
}
/* SynaFinalizeReflash finalizes the reflash process
*/
static void SynaFinalizeReflash(void)
{
u8 uData;
u8 uStatus;
pr_info("tsp fw. : Finalizing Reflash..\n");
/* Issue the "Reset" command to F01 command register to reset the chip
This command will also test the new firmware image and check if its is
valid */
uData = 1;
writeRMI(SynaF01CommandBase, &uData, 1);
mdelay(300);
readRMI(SynaF01DataBase, &uData, 1);
/* Sanity check that the reflash process is still enabled */
do {
readRMI(SynaF34_FlashControl, &uStatus, 1);
} while ((uStatus & 0x0f) != 0x00);
readRMI((SynaF01DataBase + 1), &uStatus, 1);
SynaSetup();
uData = 0;
/* Check if the "Program Enabled" bit in F01 data register is cleared
Reflash is completed, and the image passes testing when the bit is
cleared */
do {
readRMI(SynaF01DataBase, &uData, 1);
} while ((uData & 0x40) != 0);
/* Rescan PDT the update any changed register offsets */
SynaSetup();
pr_info("tsp fw. : Reflash Completed. Please reboot.\n");
}
void SynaBootloaderLock(struct synaptics_ts_data *ts)//no ds4
{
unsigned short lockBlockCount;
unsigned char uData[2] = {0};
unsigned short uBlockNum;
enum FlashCommand cmd;
if (my_image_bin[0x1E] == 0)
{
TOUCH_ERR_MSG( "Skip lockdown process with this .img\n");
return;
}
// Check if device is in unlocked state
readRMI(ts->client, (SynaF34QueryBase+ 1), &uData[0], 1);
//Device is unlocked
if (uData[0] & 0x02)
{
TOUCH_ERR_MSG("Device unlocked. Lock it first...\n");
// Different bootloader version has different block count for the lockdown data
// Need to check the bootloader version from the image file being reflashed
switch (SynafirmwareImgVersion)
{
case 2:
lockBlockCount = 3;
break;
case 3:
case 4:
lockBlockCount = 4;
break;
case 5:
case 6:
lockBlockCount = 5;
break;
default:
lockBlockCount = 0;
break;
}
// Write the lockdown info block by block
// This reference code of lockdown process does not check for bootloader version
// currently programmed on the ASIC against the bootloader version of the image to
// be reflashed. Such case should not happen in practice. Reflashing cross different
// bootloader versions is not supported.
for (uBlockNum = 0; uBlockNum < lockBlockCount; ++uBlockNum)
{
uData[0] = uBlockNum & 0xff;
uData[1] = (uBlockNum & 0xff00) >> 8;
/* Write Block Number */
writeRMI(ts->client, SynaF34Reflash_BlockNum, &uData[0], 2);
/* Write Data Block */
writeRMI(ts->client, SynaF34Reflash_BlockData, SynalockImgData, SynaFirmwareBlockSize);
/* Move to next data block */
SynalockImgData += SynaFirmwareBlockSize;
/* Issue Write Lockdown Block command */
cmd = m_uF34ReflashCmd_LockDown;
writeRMI(ts->client, SynaF34_FlashControl, (unsigned char*)&cmd, 1);
/* Wait ATTN until device is done writing the block and is ready for the next. */
SynaWaitForATTN(1000,ts);
CheckFlashStatus(ts,cmd);
}
// Enable reflash again to finish the lockdown process.
// Since this lockdown process is part of the reflash process, we are enabling
// reflash instead, rather than resetting the device to finish the unlock procedure.
SynaEnableFlashing(ts);
}
bool F54_TxToTest(struct i2c_client *ts_client, s16 *node_data, int mode)
{
u8 ImageBuffer[CFG_F54_TXCOUNT] = {0, };
u8 ImageArray[CFG_F54_TXCOUNT] = {0, };
u8 command;
int i, k, length, shift;
client = ts_client;
RegSetup(); /* PDT scan for reg map adress mapping */
length = (numberOfTx + 7) / 8;
/* Set report mode to run Tx-to-Tx */
command = mode;
writeRMI(F54_Data_Base, &command, 1);
command = 0x00;
writeRMI(F54_Data_LowIndex, &command, 1);
writeRMI(F54_Data_HighIndex, &command, 1);
/* Set the GetReport bit to run Tx-to-Tx */
command = 0x01;
writeRMI(F54_Command_Base, &command, 1);
/* Wait until the command is completed */
do {
mdelay(1);
readRMI(F54_Command_Base, &command, 1);
} while (command != 0x00);
readRMI(F54_Data_Buffer, &ImageBuffer[0], length);
if (mode == TX_TO_TX_TEST_MODE) {
/* One bit per transmitter channel */
for (i = 0, k = 0; i < numberOfTx; i++) {
k = i / 8;
shift = i % 8;
node_data[i] = ImageBuffer[k] & (1 << shift);
}
} else if (mode == TX_TO_GND_TEST_MODE) {
/* One bit per transmitter channel */
for (i = 0, k = 0; i < length * 8; i++) {
k = i / 8;
shift = i % 8;
if (ImageBuffer[k] & (1 << shift))
ImageArray[i] = 1;
}
for (i = 0; i < numberOfTx; i++)
node_data[i] = ImageArray[TxChannelUsed[i]];
}
/* enable all the interrupts */
SetPage(0x00);
command = 0x01;
writeRMI(F01_Command_Base, &command, 1);
msleep(160); // 160ms
/* Read Interrupt status register to Interrupt line goes to high */
readRMI(F01_Data_Base+1, &command, 1);
return true;
}
bool F54_SetRxToRxData(struct i2c_client *ts_client, s16 *node_data)
{
u8 *ImageBuffer;
int i, k, length;
u8 command;
client = ts_client;
RegSetup(); /* PDT scan for reg map adress mapping */
/* Set report mode to run Rx-to-Rx 1st data */
length = numberOfRx * numberOfTx * 2;
command = 0x07;
writeRMI(F54_Data_Base, &command, 1);
/* NoCDM4 */
command = 0x01;
writeRMI(NOISEMITIGATION, &command, 1);
command = 0x04;
writeRMI(F54_Command_Base, &command, 1);
do {
mdelay(1);
readRMI(F54_Command_Base, &command, 1);
} while (command != 0x02);
command = 0x02;
writeRMI(F54_Command_Base, &command, 1);
do {
mdelay(1);
readRMI(F54_Command_Base, &command, 1);
} while (command != 0x00);
command = 0x00;
writeRMI(F54_Data_LowIndex, &command, 1);
writeRMI(F54_Data_HighIndex, &command, 1);
/* Set the GetReport bit to run Tx-to-Tx */
command = 0x01;
writeRMI(F54_Command_Base, &command, 1);
/* Wait until the command is completed */
do {
mdelay(1);
readRMI(F54_Command_Base, &command, 1);
} while (command != 0x00);
ImageBuffer =
kmalloc(sizeof(u8) * CFG_F54_TXCOUNT * CFG_F54_RXCOUNT * 2, GFP_KERNEL);
if (ImageBuffer == NULL) {
pr_err("tsp fw. : alloc fw. memory failed.\n");
return false;
}
readRMI(F54_Data_Buffer, &ImageBuffer[0], length);
for (i = 0, k = 0; i < numberOfTx * numberOfRx; i++, k += 2) {
node_data[i] =
(s16)((ImageBuffer[k] | (ImageBuffer[k + 1] << 8)));
}
/* Set report mode to run Rx-to-Rx 2nd data */
length = numberOfRx * (numberOfRx - numberOfTx) * 2;
command = 0x11;
writeRMI(F54_Data_Base, &command, 1);
command = 0x00;
writeRMI(F54_Data_LowIndex, &command, 1);
writeRMI(F54_Data_HighIndex, &command, 1);
/* Set the GetReport bit to run Tx-to-Tx */
command = 0x01;
writeRMI(F54_Command_Base, &command, 1);
/* Wait until the command is completed */
do {
mdelay(1);
readRMI(F54_Command_Base, &command, 1);
} while (command != 0x00);
readRMI(F54_Data_Buffer, &ImageBuffer[0], length);
for (i = 0, k = 0; i < (numberOfRx - numberOfTx) * numberOfRx;
i++, k += 2)
node_data[(numberOfTx * numberOfRx) + i] =
(s16)(ImageBuffer[k] | (ImageBuffer[k + 1] << 8));
/* Set the Force Cal */
command = 0x02;
writeRMI(F54_Command_Base, &command, 1);
do {
mdelay(1);
readRMI(F54_Command_Base, &command, 1);
} while (command != 0x00);
/* enable all the interrupts */
SetPage(0x00);
command = 0x01;
writeRMI(F01_Command_Base, &command, 1);
msleep(160);
/* Read Interrupt status register to Interrupt line goes to high */
readRMI(F01_Data_Base+1, &command, 1);
kfree(ImageBuffer);
return true;
}
bool F54_SetRawCapData(struct i2c_client *ts_client, s16 *node_data)
{
u8 *ImageBuffer;
int i, j, k, x, length;
unsigned char command;
client = ts_client;
RegSetup(); /* PDT scan for reg map adress mapping */
length = numberOfTx * numberOfRx * 2;
/* Set report mode to to run the AutoScan */
command = 0x03;
writeRMI(F54_Data_Base, &command, 1);
/* NoCDM4 */
command = 0x01;
writeRMI(NOISEMITIGATION, &command, 1);
command = 0x06;
writeRMI(F54_Command_Base, &command, 1);
do {
mdelay(1);
readRMI(F54_Command_Base, &command, 1);
} while (command != 0x00);
command = 0x00;
writeRMI(F54_Data_LowIndex, &command, 1);
writeRMI(F54_Data_HighIndex, &command, 1);
/* Set the GetReport bit to run the AutoScan */
command = 0x01;
writeRMI(F54_Command_Base, &command, 1);
/* Wait until the command is completed */
do {
mdelay(1);
readRMI(F54_Command_Base, &command, 1);
} while (command != 0x00);
ImageBuffer =
kmalloc(sizeof(u8) * CFG_F54_TXCOUNT * CFG_F54_RXCOUNT * 2, GFP_KERNEL);
if (ImageBuffer == NULL) {
pr_err("tsp fw. : alloc fw. memory failed.\n");
return false;
}
/* Read raw_cap data */
readRMI(F54_Data_Buffer, ImageBuffer, length);
x=0;
k=0;
for (i=0; i<numberOfTx;i++)
{
for (j=0; j<numberOfRx;j++)
{
if(j != (numberOfRx-1))
{
node_data[x] =
(s16)(ImageBuffer[k] | (ImageBuffer[k + 1] << 8));
//printk(" %d", node_data[x]);
x++;
}
k+=2;
}
}
#if 1
/* reset TSP IC */
SetPage(0x00);
command = 0x01;
writeRMI(F01_Command_Base, &command, 1);
printk("[TSP] %s, %d\n", __func__, __LINE__ );
mdelay(160);
printk("[TSP] %s, %d\n", __func__, __LINE__ );
readRMI(F01_Data_Base + 1, &command, 1);
#endif
kfree(ImageBuffer);
return true;
}