static void sbd_console_write(struct console *co, const char *s,
unsigned int count)
{
int chip = co->index / DUART_MAX_SIDE;
int side = co->index % DUART_MAX_SIDE;
struct sbd_port *sport = &sbd_duarts[chip].sport[side];
struct uart_port *uport = &sport->port;
unsigned long flags;
unsigned int mask;
/* Disable transmit interrupts and enable the transmitter. */
spin_lock_irqsave(&uport->lock, flags);
mask = read_sbdshr(sport, R_DUART_IMRREG((uport->line) % 2));
write_sbdshr(sport, R_DUART_IMRREG((uport->line) % 2),
mask & ~M_DUART_IMR_TX);
write_sbdchn(sport, R_DUART_CMD, M_DUART_TX_EN);
spin_unlock_irqrestore(&uport->lock, flags);
uart_console_write(&sport->port, s, count, sbd_console_putchar);
/* Restore transmit interrupts and the transmitter enable. */
spin_lock_irqsave(&uport->lock, flags);
sbd_line_drain(sport);
if (sport->tx_stopped)
write_sbdchn(sport, R_DUART_CMD, M_DUART_TX_DIS);
write_sbdshr(sport, R_DUART_IMRREG((uport->line) % 2), mask);
spin_unlock_irqrestore(&uport->lock, flags);
}
static int sbd_startup(struct uart_port *uport)
{
struct sbd_port *sport = to_sport(uport);
unsigned int mode1;
int ret;
ret = request_irq(sport->port.irq, sbd_interrupt,
IRQF_SHARED, "sb1250-duart", sport);
if (ret)
return ret;
sbd_receive_drain(sport);
write_sbdchn(sport, R_DUART_CMD, V_DUART_MISC_CMD_RESET_BREAK_INT);
read_sbdshr(sport, R_DUART_INCHREG((uport->line) % 2));
mode1 = read_sbdchn(sport, R_DUART_MODE_REG_1);
mode1 &= ~(M_DUART_RX_IRQ_SEL_RXFULL | M_DUART_TX_IRQ_SEL_TXEMPT);
write_sbdchn(sport, R_DUART_MODE_REG_1, mode1);
write_sbdchn(sport, R_DUART_CMD, M_DUART_TX_DIS | M_DUART_RX_EN);
sport->tx_stopped = 1;
write_sbdshr(sport, R_DUART_IMRREG((uport->line) % 2),
M_DUART_IMR_IN | M_DUART_IMR_RX);
return 0;
}
static int sbd_startup(struct uart_port *uport)
{
struct sbd_port *sport = to_sport(uport);
unsigned int mode1;
int ret;
ret = request_irq(sport->port.irq, sbd_interrupt,
IRQF_SHARED, "sb1250-duart", sport);
if (ret)
return ret;
/* Clear the receive FIFO. */
sbd_receive_drain(sport);
/* Clear the interrupt registers. */
write_sbdchn(sport, R_DUART_CMD, V_DUART_MISC_CMD_RESET_BREAK_INT);
read_sbdshr(sport, R_DUART_INCHREG((uport->line) % 2));
/* Set rx/tx interrupt to FIFO available. */
mode1 = read_sbdchn(sport, R_DUART_MODE_REG_1);
mode1 &= ~(M_DUART_RX_IRQ_SEL_RXFULL | M_DUART_TX_IRQ_SEL_TXEMPT);
write_sbdchn(sport, R_DUART_MODE_REG_1, mode1);
/* Disable tx, enable rx. */
write_sbdchn(sport, R_DUART_CMD, M_DUART_TX_DIS | M_DUART_RX_EN);
sport->tx_stopped = 1;
/* Enable interrupts. */
write_sbdshr(sport, R_DUART_IMRREG((uport->line) % 2),
M_DUART_IMR_IN | M_DUART_IMR_RX);
return 0;
}
static void sbd_break_ctl(struct uart_port *uport, int break_state)
{
struct sbd_port *sport = to_sport(uport);
if (break_state == -1)
write_sbdchn(sport, R_DUART_CMD, V_DUART_MISC_CMD_START_BREAK);
else
write_sbdchn(sport, R_DUART_CMD, V_DUART_MISC_CMD_STOP_BREAK);
}
/*
* Serial console stuff. Very basic, polling driver for doing serial
* console output. The console_lock is held by the caller, so we
* shouldn't be interrupted for more console activity.
*/
static void sbd_console_putchar(struct uart_port *uport, int ch)
{
struct sbd_port *sport = to_sport(uport);
sbd_transmit_drain(sport);
write_sbdchn(sport, R_DUART_TX_HOLD, ch);
}
static void sbd_enable_ms(struct uart_port *uport)
{
struct sbd_port *sport = to_sport(uport);
write_sbdchn(sport, R_DUART_AUXCTL_X,
M_DUART_CIN_CHNG_ENA | M_DUART_CTS_CHNG_ENA);
}
static void sbd_stop_tx(struct uart_port *uport)
{
struct sbd_port *sport = to_sport(uport);
write_sbdchn(sport, R_DUART_CMD, M_DUART_TX_DIS);
sport->tx_stopped = 1;
};
static void sbd_set_mctrl(struct uart_port *uport, unsigned int mctrl)
{
struct sbd_port *sport = to_sport(uport);
unsigned int clr = 0, set = 0, mode2;
if (mctrl & TIOCM_DTR)
set |= M_DUART_SET_OPR2;
else
clr |= M_DUART_CLR_OPR2;
if (mctrl & TIOCM_RTS)
set |= M_DUART_SET_OPR0;
else
clr |= M_DUART_CLR_OPR0;
clr <<= (uport->line) % 2;
set <<= (uport->line) % 2;
mode2 = read_sbdchn(sport, R_DUART_MODE_REG_2);
mode2 &= ~M_DUART_CHAN_MODE;
if (mctrl & TIOCM_LOOP)
mode2 |= V_DUART_CHAN_MODE_LCL_LOOP;
else
mode2 |= V_DUART_CHAN_MODE_NORMAL;
write_sbdshr(sport, R_DUART_CLEAR_OPR, clr);
write_sbdshr(sport, R_DUART_SET_OPR, set);
write_sbdchn(sport, R_DUART_MODE_REG_2, mode2);
}
static void sbd_shutdown(struct uart_port *uport)
{
struct sbd_port *sport = to_sport(uport);
write_sbdchn(sport, R_DUART_CMD, M_DUART_TX_DIS | M_DUART_RX_DIS);
sport->tx_stopped = 1;
free_irq(sport->port.irq, sport);
}
static void sbd_start_tx(struct uart_port *uport)
{
struct sbd_port *sport = to_sport(uport);
unsigned int mask;
/* Enable tx interrupts. */
mask = read_sbdshr(sport, R_DUART_IMRREG((uport->line) % 2));
mask |= M_DUART_IMR_TX;
write_sbdshr(sport, R_DUART_IMRREG((uport->line) % 2), mask);
/* Go!, go!, go!... */
write_sbdchn(sport, R_DUART_CMD, M_DUART_TX_EN);
sport->tx_stopped = 0;
};
static void sbd_transmit_chars(struct sbd_port *sport)
{
struct uart_port *uport = &sport->port;
struct circ_buf *xmit = &sport->port.state->xmit;
unsigned int mask;
int stop_tx;
/* XON/XOFF chars. */
if (sport->port.x_char) {
write_sbdchn(sport, R_DUART_TX_HOLD, sport->port.x_char);
sport->port.icount.tx++;
sport->port.x_char = 0;
return;
}
/* If nothing to do or stopped or hardware stopped. */
stop_tx = (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port));
/* Send char. */
if (!stop_tx) {
write_sbdchn(sport, R_DUART_TX_HOLD, xmit->buf[xmit->tail]);
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
sport->port.icount.tx++;
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
uart_write_wakeup(&sport->port);
}
/* Are we are done? */
if (stop_tx || uart_circ_empty(xmit)) {
/* Disable tx interrupts. */
mask = read_sbdshr(sport, R_DUART_IMRREG((uport->line) % 2));
mask &= ~M_DUART_IMR_TX;
write_sbdshr(sport, R_DUART_IMRREG((uport->line) % 2), mask);
}
}
static void sbd_transmit_chars(struct sbd_port *sport)
{
struct uart_port *uport = &sport->port;
struct circ_buf *xmit = &sport->port.state->xmit;
unsigned int mask;
int stop_tx;
if (sport->port.x_char) {
write_sbdchn(sport, R_DUART_TX_HOLD, sport->port.x_char);
sport->port.icount.tx++;
sport->port.x_char = 0;
return;
}
stop_tx = (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port));
if (!stop_tx) {
write_sbdchn(sport, R_DUART_TX_HOLD, xmit->buf[xmit->tail]);
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
sport->port.icount.tx++;
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
uart_write_wakeup(&sport->port);
}
if (stop_tx || uart_circ_empty(xmit)) {
mask = read_sbdshr(sport, R_DUART_IMRREG((uport->line) % 2));
mask &= ~M_DUART_IMR_TX;
write_sbdshr(sport, R_DUART_IMRREG((uport->line) % 2), mask);
}
}
static void sbd_init_port(struct sbd_port *sport)
{
struct uart_port *uport = &sport->port;
if (sport->initialised)
return;
/* There is no DUART reset feature, so just set some sane defaults. */
write_sbdchn(sport, R_DUART_CMD, V_DUART_MISC_CMD_RESET_TX);
write_sbdchn(sport, R_DUART_CMD, V_DUART_MISC_CMD_RESET_RX);
write_sbdchn(sport, R_DUART_MODE_REG_1, V_DUART_BITS_PER_CHAR_8);
write_sbdchn(sport, R_DUART_MODE_REG_2, 0);
write_sbdchn(sport, R_DUART_FULL_CTL,
V_DUART_INT_TIME(0) | V_DUART_SIG_FULL(15));
write_sbdchn(sport, R_DUART_OPCR_X, 0);
write_sbdchn(sport, R_DUART_AUXCTL_X, 0);
write_sbdshr(sport, R_DUART_IMRREG((uport->line) % 2), 0);
sport->initialised = 1;
}
static void sbd_set_termios(struct uart_port *uport, struct ktermios *termios,
struct ktermios *old_termios)
{
struct sbd_port *sport = to_sport(uport);
unsigned int mode1 = 0, mode2 = 0, aux = 0;
unsigned int mode1mask = 0, mode2mask = 0, auxmask = 0;
unsigned int oldmode1, oldmode2, oldaux;
unsigned int baud, brg;
unsigned int command;
mode1mask |= ~(M_DUART_PARITY_MODE | M_DUART_PARITY_TYPE_ODD |
M_DUART_BITS_PER_CHAR);
mode2mask |= ~M_DUART_STOP_BIT_LEN_2;
auxmask |= ~M_DUART_CTS_CHNG_ENA;
/* Byte size. */
switch (termios->c_cflag & CSIZE) {
case CS5:
case CS6:
/* Unsupported, leave unchanged. */
mode1mask |= M_DUART_PARITY_MODE;
break;
case CS7:
mode1 |= V_DUART_BITS_PER_CHAR_7;
break;
case CS8:
default:
mode1 |= V_DUART_BITS_PER_CHAR_8;
break;
}
/* Parity and stop bits. */
if (termios->c_cflag & CSTOPB)
mode2 |= M_DUART_STOP_BIT_LEN_2;
else
mode2 |= M_DUART_STOP_BIT_LEN_1;
if (termios->c_cflag & PARENB)
mode1 |= V_DUART_PARITY_MODE_ADD;
else
mode1 |= V_DUART_PARITY_MODE_NONE;
if (termios->c_cflag & PARODD)
mode1 |= M_DUART_PARITY_TYPE_ODD;
else
mode1 |= M_DUART_PARITY_TYPE_EVEN;
baud = uart_get_baud_rate(uport, termios, old_termios, 1200, 5000000);
brg = V_DUART_BAUD_RATE(baud);
/* The actual lower bound is 1221bps, so compensate. */
if (brg > M_DUART_CLK_COUNTER)
brg = M_DUART_CLK_COUNTER;
uart_update_timeout(uport, termios->c_cflag, baud);
uport->read_status_mask = M_DUART_OVRUN_ERR;
if (termios->c_iflag & INPCK)
uport->read_status_mask |= M_DUART_FRM_ERR |
M_DUART_PARITY_ERR;
if (termios->c_iflag & (BRKINT | PARMRK))
uport->read_status_mask |= M_DUART_RCVD_BRK;
uport->ignore_status_mask = 0;
if (termios->c_iflag & IGNPAR)
uport->ignore_status_mask |= M_DUART_FRM_ERR |
M_DUART_PARITY_ERR;
if (termios->c_iflag & IGNBRK) {
uport->ignore_status_mask |= M_DUART_RCVD_BRK;
if (termios->c_iflag & IGNPAR)
uport->ignore_status_mask |= M_DUART_OVRUN_ERR;
}
if (termios->c_cflag & CREAD)
command = M_DUART_RX_EN;
else
command = M_DUART_RX_DIS;
if (termios->c_cflag & CRTSCTS)
aux |= M_DUART_CTS_CHNG_ENA;
else
aux &= ~M_DUART_CTS_CHNG_ENA;
spin_lock(&uport->lock);
if (sport->tx_stopped)
command |= M_DUART_TX_DIS;
else
command |= M_DUART_TX_EN;
oldmode1 = read_sbdchn(sport, R_DUART_MODE_REG_1) & mode1mask;
oldmode2 = read_sbdchn(sport, R_DUART_MODE_REG_2) & mode2mask;
oldaux = read_sbdchn(sport, R_DUART_AUXCTL_X) & auxmask;
if (!sport->tx_stopped)
sbd_line_drain(sport);
write_sbdchn(sport, R_DUART_CMD, M_DUART_TX_DIS | M_DUART_RX_DIS);
write_sbdchn(sport, R_DUART_MODE_REG_1, mode1 | oldmode1);
write_sbdchn(sport, R_DUART_MODE_REG_2, mode2 | oldmode2);
write_sbdchn(sport, R_DUART_CLK_SEL, brg);
write_sbdchn(sport, R_DUART_AUXCTL_X, aux | oldaux);
write_sbdchn(sport, R_DUART_CMD, command);
spin_unlock(&uport->lock);
}