//*****************************************************************************
//
//! \brief Get the PDMA Current Destination Address of a channel.
//!
//! \param ulChannelID is the channel ID that have been disabled.
//! \param ulIntFlags is the interrupt type of PDMA.
//! The channel ID can be:
//! - PDMA_CHANNEL_0
//! - PDMA_CHANNEL_1
//! - others refrence \ref NUC1xx_PDMA_Channel_IDs
//! .
//!
//! \return None.
//
//*****************************************************************************
unsigned long
PDMACurrentDestAddrGet(unsigned long ulChannelID)
{
//
// Check the arguments.
//
xASSERT(xDMAChannelIDValid(ulChannelID));
return xHWREG(g_psDMAChannelAddress[ulChannelID] + PDMA_CDAR);
}
//*****************************************************************************
//
//! Gets the direction and mode of a pin.
//!
//! \param ulPort is the base address of the GPIO port.
//! \param ulBit is the pin number.
//!
//! This function gets the direction and control mode for a specified pin on
//! the selected GPIO port. The pin can be configured as either an input or
//! output under software control, or it can be under hardware control. The
//! type of control and direction are returned as an enumerated data type.
//!
//! \return Returns one of the enumerated data types described for
//! GPIODirModeSet().
//
//*****************************************************************************
unsigned long
GPIODirModeGet(unsigned long ulPort, unsigned long ulBit)
{
//
// Check the arguments.
//
xASSERT(GPIOBaseValid(ulPort));
xASSERT(ulBit < 16);
//
// Return the pin direction and mode.
//
if(ulBit < 8)
{
return((xHWREG(ulPort + GPIO_CRL) &
(0xF << (ulBit * 4))) >> (ulBit * 4));
}
else
{
return((xHWREG(ulPort + GPIO_CRH) &
//*****************************************************************************
//
//! \brief Write data or command to the SPLC780D.
//!
//! \param ucRS determines if the IR or DR to select.
//!
//! The parameter of ucRS can be:
//! - \ref SPLC780_RS_COMMAND - select the IR.
//! - \ref SPLC780_RS_DATA - select the DR.
//!
//! \return None.
//
//*****************************************************************************
void
SPLC780Write(unsigned char ucRS, unsigned char ucInstruction)
{
//
// Check Arguments.
//
xASSERT((ucRS == SPLC780_RS_COMMAND) || (ucRS == SPLC780_RS_DATA));
SPLC780Write4Bit((ucInstruction & 0xf0) | ucRS);
SPLC780Write4Bit(((ucInstruction << 4) & 0xf0) | ucRS);
}
//*****************************************************************************
//
//! \brief Initialize AT45DB161 and SPI
//!
//! \param ulSpiClock specifies the SPI Clock Rate
//!
//! This function initialize the mcu SPI as master and specified SPI port.
//! After SPI and port was configured, the mcu send a AT45DB161_CMD_SRRD command
//! to get the page size of AT45DB161 to get prepareed for the followed read and
//! write operations.
//!
//! \return None.
//
//*****************************************************************************
void AT45DB161_Init(unsigned long ulSpiClock)
{
unsigned char tmp;
xASSERT((ulSpiClock > 0) && (ulSpiClock < AT45DB161_MAX_CLK));
xSysCtlPeripheralEnable(xGPIOSPinToPeripheralId(AT45DB161_SCK));
xSysCtlPeripheralEnable(xGPIOSPinToPeripheralId(AT45DB161_CS_PIN));
xSysCtlPeripheralEnable(xGPIOSPinToPeripheralId(AT45DB161_MISO));
xSysCtlPeripheralEnable(xGPIOSPinToPeripheralId(AT45DB161_MOSI));
xSysCtlPeripheralEnable2(AT45DB161_SPI_PORT);
xSysCtlPeripheralEnable(SYSCTL_PERIPH_AFIO);
xGPIOSPinDirModeSet(AT45DB161_CS_PIN, xGPIO_DIR_MODE_OUT);
#if (AT45DB161_WRITE_PROTECT < 1)
xGPIOSPinDirModeSet(FLASH_PIN_WRITE_PROTECT, xGPIO_DIR_MODE_OUT);
xGPIOSPinWrite(FLASH_PIN_WRITE_PROTECT, 0);
#endif
//
// PD1 as SPI2.CLK
//
xSPinTypeSPI(SPI_CLK, AT45DB161_SCK);
//
// PD2 as SPI2.MISO
// MISO20 => SPI0MISO
//
xSPinTypeSPI(SPI_MISO, AT45DB161_MISO);
//
// PD3 as SPI2.MOSI
// MOSI20 => SPI0MISO
//
xSPinTypeSPI(SPI_MOSI, AT45DB161_MOSI);
//xSysCtlPeripheralEnable(SYSCTL_PERIPH_AFIO);
//
//! Set SPI mode.
//
xSPIConfigSet(AT45DB161_SPI_PORT, ulSpiClock, SPI_MODE_MASTER |
SPI_MSB_FIRST |
SPI_2LINE_FULL |
SPI_DATA_WIDTH8 |
SPI_FORMAT_MODE_4);
SPISSModeConfig(AT45DB161_SPI_PORT, SPI_CR1_SSM);
SPISSIConfig(AT45DB161_SPI_PORT, SPI_CR1_SSI);
SPIEnble(AT45DB161_SPI_PORT);
AT45DB161_CS = 1;
xSPISingleDataReadWrite(AT45DB161_SPI_PORT, 0xFF);
xSysCtlDelay(100000);
AT45DB161_CS = 0;
//
//! Read AT45DB161 state register to get the page size.
//
xSPISingleDataReadWrite(AT45DB161_SPI_PORT, AT45DB161_CMD_SRRD);
tmp = xSPISingleDataReadWrite(AT45DB161_SPI_PORT, 0xFF);
if(tmp & AT45DB161_PGSZ) AT45DB161_PageSize = 512;
AT45DB161_CS = 1;
}
//*****************************************************************************
//
//! \brief Configurate The Independent WatchDog's Timer Interval.
//!
//! \param ulConfig is the Timer Interval Selection.
//!
//! This function is to Configurate The Independent WatchDog's Timer Interval.
//!
//! \return None.
//
//*****************************************************************************
void
IWDGTimerInit(unsigned long ulConfig)
{
//
// Check the arguments.
//
xASSERT((ulConfig <= IWDG_RLR_RL_M));
xHWREG(IWDG_KR) = IWDG_KR_PROTECT_DIS;
xHWREG(IWDG_RLR) = ulConfig;
}
//*****************************************************************************
//
//! \brief Set The WatchDog Timer(WDT)'s Window Value.
//!
//! \param ulConfig is the Timer Window Value Selection.
//!
//! This function is to set The WatchDog Timer(WDT)'s Wondow Value.
//!
//! \return None.
//
//*****************************************************************************
void
WDTimerWindowValueSet(unsigned long ulConfig)
{
//
// Check the arguments.
//
xASSERT((ulConfig <= WWDG_CFR_W_M));
xHWREG(WWDG_CFR) &= ~WWDG_CFR_W_M;
xHWREG(WWDG_CFR) |= ulConfig;
}
//*****************************************************************************
//
//! \brief Enable the comparator interrupt.
//!
//! \param ulBase is the base address of the comparator module.
//! \param ulComp is the index(0 - 1) of the comparator.
//!
//! This function enables generation of an interrupt from the specified
//! comparator. Only comparators whose interrupts are enabled can be reflected
//! to the processor.
//!
//! \note In KL25Z Series, the ulComp must be 0.
//!
//! \return None.
//
//*****************************************************************************
void
ACMPIntEnable(unsigned long ulBase, unsigned long ulCompID)
{
unsigned long ulCRAddr;
xASSERT(ulBase == ACMP_BASE);
xASSERT((ulCompID >= 0) && (ulCompID < 2));
//
// Get the corresponding CR register address
//
ulCRAddr = ulBase + CMP0_SCR + (4 * ulCompID);
//
// Enable the comparator interrupt
//
xHWREGB(ulCRAddr) |= CMP0_SCR_IEF;
xHWREGB(ulCRAddr) |= CMP0_SCR_IER;
}
//*****************************************************************************
//
//! \brief Draws a vertical line.
//!
//! \param ulX is the X coordinate of the line.
//! \param ulStartY is the Y coordinate of the start of the line.
//! \param ulEndY is the Y coordinate of the end of the line.
//! \param ulColor is the color of the line.
//!
//! This function draws a vertical line on the display. The coordinates of the
//! line are assumed to be within the extents of the display.
//!
//! \return None.
//
//*****************************************************************************
void
ST7735DrawVerticalLine(unsigned short usX, unsigned short usStartY,
unsigned short usEndY, unsigned long ulColor)
{
xASSERT((usStartY <= usEndY) && (usEndY <= LCD_VERTICAL_MAX) && (usStartY >= 0));
while(usStartY++ <= usEndY)
{
ST7735DrawOnePixel(usX, usStartY, ulColor);
}
}
//*****************************************************************************
//
//! \brief Init the ADC Interrupt Callback function.
//!
//! \param ulBase is the base address of the ADC.
//! \param pfnCallback is the callback function.
//!
//! When there is any ADC intrrupt occrus, Interrupt Handler will
//! call the callback function.
//!
//! param of pfnCallback
//! - pvCBData not used, always 0.
//! - ulEvent is the interrupt event..
//! - ulMsgParam not used, always 0.
//! - pvMsgData not used, always 0.
//! .
//!
//! \return None.
//
//*****************************************************************************
void
xADCIntCallbackInit(unsigned long ulBase,
xtEventCallback pfnCallback)
{
//
// Check the arguments.
//
xASSERT(ulBase == xADC0_BASE);
g_pfnADCHandlerCallbacks[0] = pfnCallback;
}
//*****************************************************************************
//
//! \brief Draws a horizontal line.
//!
//! \param usStartX is the X coordinate of the start of the line.
//! \param usEndX is the X coordinate of the end of the line.
//! \param usY is the Y coordinate of the line.
//! \param usColor is the color of the line.
//!
//! This function draws a horizontal line on the display. The coordinates of
//! the line are assumed to be within the extents of the display.
//!
//! \return None.
//
//*****************************************************************************
void
ST7735DrawHorizontalLine(unsigned short usStartX, unsigned short usEndX,
unsigned short usY, unsigned long ulColor)
{
xASSERT((usStartX <= usEndX) && (usEndX <= LCD_HORIZONTAL_MAX) && (usStartX >= 0));
while(usStartX++ <= usEndX)
{
ST7735DrawOnePixel(usStartX, usY, ulColor);
}
}
//*****************************************************************************
//
//! \brief Clear the DMA interrupt flag of a channel.
//!
//! \param ulChannelID is the channel ID that have been disabled.
//! \param ulIntFlags is the interrupt type of DMA.
//! The channel ID can be:
//! - DMA1_CHANNEL_1
//! - DMA1_CHANNEL_2
//! - others refrence \ref STM32F1xx_DMA_Channel_IDs
//! .
//! The interrupt type can be:
//! - DMA_INT_TC
//! - DMA_INT_ERROR
//! - refrence \ref STM32F1xx_DMA_INT_Type
//! .
//!
//! \return the Status of The DMA interrupt.
//
//*****************************************************************************
void
DMAChannelIntFlagClear(unsigned long ulChannelID, unsigned long ulIntFlags)
{
//
// Check the arguments.
//
xASSERT(xDMAChannelIDValid(ulChannelID));
xASSERT(((ulIntFlags & DMA_INT_TC) == DMA_INT_TC) ||
((ulIntFlags & DMA_INT_HT) == DMA_INT_HT) ||
((ulIntFlags & DMA_INT_ERROR) == DMA_INT_ERROR));
if((ulChannelID) < 7)
{
xHWREG(DMA1_BASE + DMA_IFCR) |= (ulIntFlags << ulChannelID*4);
}
else
{
xHWREG(DMA2_BASE + DMA_IFCR) |= (ulIntFlags << (ulChannelID-1024)*4);
}
}
//*****************************************************************************
//
//! \brief Get the PDMA of a channel busy or not.
//!
//! \param ulChannelID is the channel ID that have been disabled.
//! The channel ID can be:
//! - PDMA_CHANNEL_0
//! - PDMA_CHANNEL_1
//! - others refrence \ref NUC1xx_PDMA_Channel_IDs
//! .
//!
//! \return returns xtrue if PDMA channel is busy or returns xfalse.
//
//*****************************************************************************
xtBoolean
PDMAChannelIsBusy(unsigned long ulChannelID)
{
//
// Check the arguments.
//
xASSERT(xDMAChannelIDValid(ulChannelID));
return ((xHWREG(g_psDMAChannelAddress[ulChannelID] + PDMA_CSR)
| PDMA_CSR_TEN) ? xtrue : xfalse);
}
//*****************************************************************************
//
//! \brief Sets the direction and pad configuration of the specified pin.
//!
//! \param ulPort is the base address of the GPIO port
//! \param ulBit is the bit number of a port.
//! \param ulPinType is the pin direction and/or pad configuration.
//! \param ulPinSpeed is input or output speed of specified pin.
//!
//! This function will set the specified pin(Only 1 pin) on the selected GPIO
//! port as either an input or output under software control, or it will set
//! the pin to be under hardware control.
//!
//! The parameter \e ulPinType is an enumerated data type that can be one of
//! the following values:
//!
//! - \b GPIO_TYPE_IN_ANALOG
//! - \b GPIO_TYPE_IN_FLOATING
//! - \b GPIO_TYPE_IN_WPU_WPD
//! - \b GPIO_TYPE_OUT_STD
//! - \b GPIO_TYPE_OUT_OD
//! - \b GPIO_TYPE_AFOUT_STD
//! - \b GPIO_TYPE_AFOUT_OD
//!
//! The parameter \e ulPinSpeed is an enumerated data type that can be one of
//! the following values:
//!
//! - \b GPIO_IN_SPEED_FIXED
//! - \b GPIO_OUT_SPEED_10M
//! - \b GPIO_OUT_SPEED_2M
//! - \b GPIO_OUT_SPEED_50M
//!
//!
//! \return None.
//
//*****************************************************************************
void
GPIODirModeSet(unsigned long ulPort, unsigned long ulBit,
unsigned long ulPinType, unsigned long ulPinSpeed)
{
//
// Check the arguments.
//
xASSERT(GPIOBaseValid(ulPort));
xASSERT(ulBit < 16);
xASSERT((ulPinType == GPIO_TYPE_IN_ANALOG) ||
(ulPinType == GPIO_TYPE_IN_FLOATING) ||
(ulPinType == GPIO_TYPE_IN_WPU_WPD) ||
(ulPinType == GPIO_TYPE_OUT_STD) ||
(ulPinType == GPIO_TYPE_OUT_OD) ||
(ulPinType == GPIO_TYPE_AFOUT_STD) ||
(ulPinType == GPIO_TYPE_AFOUT_OD));
xASSERT((ulPinSpeed == GPIO_IN_SPEED_FIXED) ||
(ulPinSpeed == GPIO_OUT_SPEED_10M) ||
(ulPinSpeed == GPIO_OUT_SPEED_2M) ||
(ulPinSpeed == GPIO_OUT_SPEED_50M));
//
// Set the pin direction and mode.
//
if(ulBit < 8)
{
xHWREG(ulPort + GPIO_CRL) &=
(~((GPIO_CRL_MODE0_M | GPIO_CRL_CNF0_M) << (ulBit * 4)));
xHWREG(ulPort + GPIO_CRL) = (xHWREG(ulPort + GPIO_CRL) | \
(((ulPinSpeed | ulPinType)) << (ulBit * 4)));
}
else
{
xHWREG(ulPort + GPIO_CRH) &=
(~((GPIO_CRH_MODE8_M | GPIO_CRH_CNF8_M) << ((ulBit -8) * 4)));
xHWREG(ulPort + GPIO_CRH) = (xHWREG(ulPort + GPIO_CRH) | \
(((ulPinSpeed | ulPinType)) << ((ulBit -8) * 4)));
}
}
//*****************************************************************************
//
//! \brief Select the ACMP- input source of the comparator.
//!
//! \param ulBase is the base address of the comparator module.
//! \param ulComp is the index(0 - 1) of the comparator to configure.
//! \param ulSource is the source of Comp- input.
//! Refrence \ref NUC1xx_ACMP_Analog_Src_negative.
//!
//! This function configures the Comp- input source of a comparator.
//!
//! \return None.
//
//*****************************************************************************
void
xACMPConfigure(unsigned long ulBase, unsigned long ulComp,
unsigned long ulSource)
{
unsigned long ulCRAddr;
xASSERT(ulBase == ACMP_BASE);
xASSERT((ulComp >= 0) && (ulComp < 2));
xASSERT((ulSource == ACMP_ASRCN_PIN) || (ulSource == ACMP_ASRCN_REF));
//
// Get the corresponding CR register address
//
ulCRAddr = ulBase + ACMP_CR0 + (4 * ulComp);
//
// Set the comp- input source
//
xHWREG(ulCRAddr) &= ~ACMP_CR_CN;
xHWREG(ulCRAddr) |= ulSource;
}
//*****************************************************************************
//
//! \brief Read the state or data from the HD44780.
//!
//! \param ucRS determines if the IR or DR to select.
//!
//! The parameter of ucRS can be:
//! - HD44780_RS_COMMAND - select the IR.
//! - HD44780_RS_DATA - select the DR.
//!
//! \return None.
//
//*****************************************************************************
unsigned char
HD44780Read(unsigned char ucRS)
{
unsigned char ucData = 0;
//
// Check Arguments.
//
xASSERT((ucRS == HD44780_RS_COMMAND) || (ucRS == HD44780_RS_DATA));
return ucData;
}
//*****************************************************************************
//
//! \brief Configurate The WatchDog Timer(WDT)'s Timer Interval.
//!
//! \param ulConfig is the Timer Interval Selection.
//!
//! This function is to Configurate The WatchDog Timer(WDT)'s Timer Interval.
//!
//! \return None.
//
//*****************************************************************************
void
WDTimerInit(unsigned long ulConfig)
{
//
// Check the arguments.
//
xASSERT((ulConfig >= 0x40) && (ulConfig <= WWDG_CR_CT_M));
xHWREG(WWDG_CR) &= ~WWDG_CR_CT_M;
xHWREG(WWDG_CR) |= ulConfig;
}
//*****************************************************************************
//
//! \brief Set the cursor location.
//!
//! \param ulStartX is the character index.
//! \param ulEndX is the line number.
//!
//! The default location is (0,0). After set the location, the strings will
//! display at the (ulCol, ulRow).
//!
//! \return None.
//
//*****************************************************************************
void
ST7735SetCurPos(unsigned long ulStartX, unsigned long ulEndX,
unsigned long ulStartY, unsigned long ulEndY)
{
//
// Check Arguments.
//
xASSERT((ulStartX < ulEndX) && (ulStartY < ulEndY));
xASSERT((ulEndX < LCD_HORIZONTAL_MAX) && (ulEndY < LCD_VERTICAL_MAX));
//
// Tell the controller we are about to write data into its RAM.
//
ST7735WriteCmd(ST7735_CASET_REG);
ST7735WriteData(ulStartX);
ST7735WriteData(ulEndX);
ST7735WriteCmd(ST7735_RASET_REG);
ST7735WriteData(ulStartY);
ST7735WriteData(ulEndY);
ST7735WriteCmd(ST7735_RAMWR_REG);
}
//*****************************************************************************
//
//! \brief Puts a data element into the SPI transmit .
//!
//! \param ulBase specifies the SPI module base address.
//! \param ulData is the data to be transmitted over the SPI interface.
//!
//! This function places the supplied data into the transmit buffer of the
//! specified SPI module.
//!
//! \note The data width is always 8-bit.
//!
//! \return None.
//
//*****************************************************************************
void
SPIDataPut(unsigned long ulBase, unsigned long ulData)
{
//
// Check the arguments.
//
xASSERT((ulBase == SPI0_BASE) || (ulBase == SPI1_BASE));
xASSERT(ulData < 256);
//
// Wait until SPRF is set.
//
while(!(xHWREGB(ulBase + SPI_S) & SPI_S_SPTEF))
{
}
//
// Write the data to the SPI.
//
xHWREGB(ulBase + SPI_D) = (unsigned char)ulData;
}
//*****************************************************************************
//
//! \brief Disable the Watchdog timer.
//! This function is to Disable the Watchdog timer module and stop
//! the counter.
//!
//! \param [in] ulBase is the base address of the WatchDog Timer(WDT) module.
//! This value must be \ref xWDT_BASE.
//!
//! \return None.
//!
//
//*****************************************************************************
void
xWDTDisable(unsigned long ulBase)
{
//
// Check the arguments.
//
xASSERT(ulBase == xWDT_BASE);
SysCtlKeyAddrUnlock();
xHWREG(WDT_WTCR) &= ~WDT_WTCR_WTE;
SysCtlKeyAddrLock();
}
//*****************************************************************************
//
//! \brief Restart the Watchdog timer counter.
//! This function is to restart the Watchdog timer by feed watchdog.
//!
//! \param [in] ulBase is the base address of the WatchDog Timer(WDT) module.
//! This value must be \ref xWDT_BASE.
//!
//! \return None.
//!
//! \note User can use this function to feed the watch dog interval.
//
//*****************************************************************************
void
xWDTRestart(unsigned long ulBase)
{
//
// Check the arguments.
//
xASSERT(ulBase == xWDT_BASE);
SysCtlKeyAddrUnlock();
xHWREG(WDT_WTCR) |= WDT_WTCR_WTR;
SysCtlKeyAddrLock();
}
//*****************************************************************************
//
//! \brief Reset the PDMA of a channel.
//!
//! \param ulChannelID is the channel ID that have been disabled.
//! The channel ID can be:
//! - PDMA_CHANNEL_0
//! - PDMA_CHANNEL_1
//! - others refrence \ref NUC1xx_PDMA_Channel_IDs
//! .
//!
//! \return None.
//
//*****************************************************************************
void
PDMAChannelSoftwareReset(unsigned long ulChannelID)
{
//
// Check the arguments.
//
xASSERT(xDMAChannelIDValid(ulChannelID));
//
// Disable PDMA channel.
//
xHWREG(g_psDMAChannelAddress[ulChannelID] + PDMA_CSR) |= PDMA_CSR_RST;
}
//*****************************************************************************
//
//! \brief Disable CMP DMA.
//!
//! \param ulBase is the base address of the CMP port.
//!
//! \return None.
//
//*****************************************************************************
void
CMPDMADisable(unsigned long ulBase)
{
//
// Check the arguments.
//
xASSERT(ulBase == ACMP_BASE);
//
// Disable DMA for CMP
//
xHWREGB(ulBase + CMP0_SCR) &= ~CMP0_SCR_DMAEN;
}
//*****************************************************************************
//
//! \brief Disable the PDMA of a channel.
//!
//! \param ulChannelID is the channel ID that have been disabled.
//! The channel ID can be:
//! - PDMA_CHANNEL_0
//! - PDMA_CHANNEL_1
//! - others refrence \ref NUC1xx_PDMA_Channel_IDs
//! .
//!
//! \return None.
//
//*****************************************************************************
void
PDMADisable(unsigned long ulChannelID)
{
//
// Check the arguments.
//
xASSERT(xDMAChannelIDValid(ulChannelID));
//
// Disable PDMA channel.
//
xHWREG(g_psDMAChannelAddress[ulChannelID] + PDMA_CSR) &= ~PDMA_CSR_CEN;
}
//*****************************************************************************
//
//! \brief Set Comparator Output.
//!
//! \param ulBase is the base address of the CMP module.
//! \param ulOutput is Output that you will set.
//! Refrence \ref KLx_CMP_Output.
//!
//! This function is to Set Comparator Output.
//!
//! \return None.
//
//*****************************************************************************
void
CMPOutputSet(unsigned long ulBase, unsigned long ulOutput)
{
//
// Check the arguments
//
xASSERT(ulBase == ACMP_BASE);
xASSERT((ulOutput == CMP_OUTPUT_COUT) ||
(ulOutput == CMP_OUTPUT_COUTA));
//
// Select CMP Output
//
if(ulOutput == CMP_OUTPUT_COUTA)
{
xHWREGB(ulBase + CMP0_CR1) |= CMP0_CR1_COS;
}
else
{
xHWREGB(ulBase + CMP0_CR1) &= ~CMP0_CR1_COS;
}
}
//*****************************************************************************
//
//! \brief Set Comparator Power Mode.
//!
//! \param ulBase is the base address of the CMP module.
//! \param ulPowerMode is Low-Power Configuration Mode that you will set.
//! Refrence \ref KLx_CMP_Power_Mode.
//!
//! This function is to Select ADC Power Mode.
//!
//! \return None.
//
//*****************************************************************************
void
CMPPowerModeSet(unsigned long ulBase, unsigned long ulPowerMode)
{
//
// Check the arguments
//
xASSERT(ulBase == ACMP_BASE);
xASSERT((ulPowerMode == CMP_POWER_MODE_LS) ||
(ulPowerMode == CMP_POWER_MODE_HS));
//
// Select CMP Power Mode
//
if(ulPowerMode == CMP_POWER_MODE_HS)
{
xHWREGB(ulBase + CMP0_CR1) |= CMP0_CR1_PMODE;
}
else
{
xHWREGB(ulBase + CMP0_CR1) &= ~CMP0_CR1_PMODE;
}
}
//*****************************************************************************
//
//! \brief Set CMP0 Filter Sample Count.
//!
//! \param ulBase is the base address of the comparator module.
//! \param ulCount is the Filter Sample Count which you will set.
//!
//! This function is used to Set CMP0 Filter Sample Count.
//!
//! \note if ulCount is CMP_FILTER_SAMPLE_COUNT_0, then Filter is disabled.
//! If SE = 1, then COUT is a logic 0. This is not a legal state, and is not
//! recommended. If SE = 0, COUT = COUTA.
//!
//! \return None.
//
//*****************************************************************************
void
CMPFilterSampleCountSet(unsigned long ulBase, unsigned long ulCount)
{
//
// Check the arguments
//
xASSERT(ulBase == ACMP_BASE);
xASSERT((ulCount == CMP_FILTER_SAMPLE_COUNT_0)||
(ulCount == CMP_FILTER_SAMPLE_COUNT_1)||
(ulCount == CMP_FILTER_SAMPLE_COUNT_2)||
(ulCount == CMP_FILTER_SAMPLE_COUNT_3)||
(ulCount == CMP_FILTER_SAMPLE_COUNT_4)||
(ulCount == CMP_FILTER_SAMPLE_COUNT_5)||
(ulCount == CMP_FILTER_SAMPLE_COUNT_6)||
(ulCount == CMP_FILTER_SAMPLE_COUNT_7));
//
// Set Filter Sample Count
//
xHWREGB(ulBase + CMP0_CR0) &= ~CMP0_CR0_FILTER_CNT_M;
xHWREGB(ulBase + CMP0_CR0) |= ulCount;
}
//*****************************************************************************
//
//! \brief Enable Window watchdog.
//!
//! \param ulBase specifies the Window watchdog base address.
//!
//! Enable Window watchdog.
//!
//! \return None.
//
//*****************************************************************************
void
WWDGEnable(unsigned long ulBase)
{
//
// Check the arguments.
//
xASSERT((ulBase == WWDG_BASE));
//
// Enable Window watchdog
//
xHWREG(WWDG_CR) |= WWDG_CR_WDT_EN;
}
//*****************************************************************************
//
//! \brief Disable the DMA of a channel.
//!
//! \param ulChannelID is the channel ID that have been disabled.
//! The channel ID can be:
//! - DMA1_CHANNEL_1
//! - DMA1_CHANNEL_2
//! - others refrence \ref STM32F1xx_DMA_Channel_IDs
//! .
//!
//! \return None.
//
//*****************************************************************************
void
DMADisable(unsigned long ulChannelID)
{
//
// Check the arguments.
//
xASSERT(xDMAChannelIDValid(ulChannelID));
//
// Disable DMA channel.
//
xHWREG(g_psDMAChannel[ulChannelID]) &= ~DMA_CCR1_EN;
}
//*****************************************************************************
//
//! \brief Disable the DMA of a channel.
//!
//! \param ulChannelID is the channel ID that have been disabled.
//! The channel ID can be:
//! - DMA_CHANNEL_0
//! - DMA_CHANNEL_1
//! - others refrence \ref KLx_DMA_Channel_IDs
//! .
//!
//! \return None.
//
//*****************************************************************************
void
DMADisable(unsigned long ulChannelID)
{
//
// Check the arguments.
//
xASSERT(xDMAChannelIDValid(ulChannelID));
//
// Disable DMA channel.
//
xHWREGB(DMAMUX0_BASE + ulChannelID) &= ~DMAMUX0_CHCFG_ENBL;
}
//*****************************************************************************
//
//! \brief Sets the control parameters for a DMA channel.
//!
//! \param ulChannelID is the DMA channel ID.
//! \param ulControl is logical OR of several control values to set the control
//! parameters for the channel.
//!
//! This function is used to set control parameters for a uDMA transfer. These
//! are typically parameters that are not changed often.
//!
//! The \e ulControl parameter is the logical OR of five values: the data size,
//! the source address increment, the destination address increment.
//!
//! Choose the source data size from one of \b DMA_WIDTH_8BIT,
//! \b DMA_WIDTH_16BIT, \b or DMA_WIDTH_32BIT to select a data size
//! of 8, 16, or 32 bits.
//!
//! Choose the destination data size from one of \b DMA_WIDTH_8BIT,
//! \b DMA_WIDTH_16BIT, \b or DMA_WIDTH_32BIT to select a data size
//! of 8, 16, or 32 bits.
//!
//! Choose the source address increment from one of \b DMA_SRC_DIR_INC,
//! \b DMA_SRC_DIR_FIXED to selectan address increment or select
//! non-incrementing
//!
//! Choose the destination address increment from one of \b DMA_DST_DIR_INC,
//! \b DMA_DST_DIR_FIXED to selectan address increment or select
//! non-incrementing
//!
//! \note The address increment cannot be smaller than the data size.
//! The transfer may use burst or single.
//!
//! \return None.
//
//*****************************************************************************
void
DMAChannelControlSet(unsigned long ulChannelID, unsigned long ulControl)
{
//
// Check the arguments.
//
xASSERT(xDMAChannelIDValid(ulChannelID));
xHWREG(g_psDMAChannelAddress[ulChannelID] + DMA_DCR) &=
~(DMA_DCR_SINC | DMA_DCR_SSIZE_M | DMA_DCR_DINC | DMA_DCR_DSIZE_M);
xHWREG(g_psDMAChannelAddress[ulChannelID] + DMA_DCR) |= ulControl;
}
