static unsigned char
XGINew_GetXG20DRAMType(struct xgi_hw_device_info *HwDeviceExtension,
struct vb_device_info *pVBInfo)
{
unsigned char data, temp;
if (HwDeviceExtension->jChipType < XG20) {
data = xgifb_reg_get(pVBInfo->P3c4, 0x39) & 0x02;
if (data == 0)
data = (xgifb_reg_get(pVBInfo->P3c4, 0x3A) &
0x02) >> 1;
return data;
} else if (HwDeviceExtension->jChipType == XG27) {
void xgifb_reg_or(unsigned long port, u8 index, unsigned data_or)
{
u8 temp;
temp = xgifb_reg_get(port, index); /* XGINew_Part1Port index 02 */
temp |= data_or;
xgifb_reg_set(port, index, temp);
}
void xgifb_reg_or(unsigned long port, u8 index, unsigned data_or)
{
u8 temp;
temp = xgifb_reg_get(port, index);
temp |= data_or;
xgifb_reg_set(port, index, temp);
}
void xgifb_reg_and(unsigned long port, u8 index, unsigned data_and)
{
u8 temp;
temp = xgifb_reg_get(port, index);
temp &= data_and;
xgifb_reg_set(port, index, temp);
}
void xgifb_reg_and_or(unsigned long port, u8 index,
unsigned data_and, unsigned data_or)
{
u8 temp;
temp = xgifb_reg_get(port, index);
temp = (temp & data_and) | data_or;
xgifb_reg_set(port, index, temp);
}
int xgifb_probe(struct pci_dev *pdev, struct xgifb_video_info *xgifb_info)
{
u8 reg, reg1;
u8 CR48, CR38;
int ret;
struct xgi_hw_device_info *hw_info;
unsigned long video_size_max;
hw_info = &xgifb_info->hw_info;
xgifb_info->chip_id = pdev->device;
pci_read_config_byte(pdev,
PCI_REVISION_ID,
&xgifb_info->revision_id);
hw_info->jChipRevision = xgifb_info->revision_id;
xgifb_info->subsysvendor = pdev->subsystem_vendor;
xgifb_info->subsysdevice = pdev->subsystem_device;
video_size_max = pci_resource_len(pdev, 0);
xgifb_info->video_base = pci_resource_start(pdev, 0);
xgifb_info->mmio_base = pci_resource_start(pdev, 1);
xgifb_info->mmio_size = pci_resource_len(pdev, 1);
xgifb_info->vga_base = pci_resource_start(pdev, 2) + 0x30;
dev_info(&pdev->dev, "Relocate IO address: %Lx [%08lx]\n",
(u64) pci_resource_start(pdev, 2),
xgifb_info->vga_base);
if (XGIfb_crt2type != -1) {
xgifb_info->display2 = XGIfb_crt2type;
xgifb_info->display2_force = true;
}
XGIRegInit(&xgifb_info->dev_info, xgifb_info->vga_base);
xgifb_reg_set(XGISR, IND_SIS_PASSWORD, SIS_PASSWORD);
reg1 = xgifb_reg_get(XGISR, IND_SIS_PASSWORD);
if (reg1 != 0xa1) {
dev_err(&pdev->dev, "I/O error\n");
ret = -5;
goto error_disable;
}
switch (xgifb_info->chip_id) {
case PCI_DEVICE_ID_XGI_20:
xgifb_reg_or(XGICR, Index_CR_GPIO_Reg3, GPIOG_EN);
CR48 = xgifb_reg_get(XGICR, Index_CR_GPIO_Reg1);
if (CR48&GPIOG_READ)
xgifb_info->chip = XG21;
else
xgifb_info->chip = XG20;
break;
case PCI_DEVICE_ID_XGI_40:
xgifb_info->chip = XG40;
break;
case PCI_DEVICE_ID_XGI_42:
xgifb_info->chip = XG42;
break;
case PCI_DEVICE_ID_XGI_27:
xgifb_info->chip = XG27;
break;
default:
ret = -19;
goto error_disable;
}
dev_info(&pdev->dev, "chipid = %x\n", xgifb_info->chip);
hw_info->jChipType = xgifb_info->chip;
if (XGIfb_get_dram_size(xgifb_info)) {
xgifb_info->video_size = min_t(unsigned long, video_size_max,
SZ_16M);
} else if (xgifb_info->video_size > video_size_max) {
