HSimConfigDecl * topModuleInstantiate() { HSimConfigDecl * cfgvh = 0; cfgvh = new HSimConfigDecl("default"); (*cfgvh).registerFuseLibList("unisims_ver"); HSim__s6 * topvh = 0; extern HSim__s6 * createWork_eee_testbench_arch(const char*); topvh = createWork_eee_testbench_arch("eee"); topvh->constructPorts(); topvh->checkTopLevelPortsConstrainted(); topvh->vhdlArchImplement(); topvh->architectureInstantiate(cfgvh); addChild(topvh); return cfgvh; }
HSimConfigDecl * topModuleInstantiate() { HSimConfigDecl * cfgvh = 0; cfgvh = new HSimConfigDecl("default"); (*cfgvh).registerFuseLibList(""); HSim__s6 * topvh = 0; extern HSim__s6 * createWork_q3vhdlkmaptestbench_vhd_behavior(const char*); topvh = createWork_q3vhdlkmaptestbench_vhd_behavior("Q3VHDLKmapTestBench_vhd"); topvh->constructPorts(); topvh->checkTopLevelPortsConstrainted(); topvh->vhdlArchImplement(); topvh->architectureInstantiate(cfgvh); addChild(topvh); return cfgvh; }