static int au1xpsc_ac97_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) { /* FIXME */ struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata; unsigned long r, stat; int chans, stype = SUBSTREAM_TYPE(substream); chans = params_channels(params); r = au_readl(AC97_CFG(pscdata)); stat = au_readl(AC97_STAT(pscdata)); /* already active? */ if (stat & (PSC_AC97STAT_TB | PSC_AC97STAT_RB)) { /* reject parameters not currently set up */ if ((PSC_AC97CFG_GET_LEN(r) != params->msbits) || (pscdata->rate != params_rate(params))) return -EINVAL; } else { /* disable AC97 device controller first */ au_writel(r & ~PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata)); au_sync(); /* set sample bitdepth: REG[24:21]=(BITS-2)/2 */ r &= ~PSC_AC97CFG_LEN_MASK; r |= PSC_AC97CFG_SET_LEN(params->msbits); /* channels: enable slots for front L/R channel */ if (stype == PCM_TX) { r &= ~PSC_AC97CFG_TXSLOT_MASK; r |= PSC_AC97CFG_TXSLOT_ENA(3); r |= PSC_AC97CFG_TXSLOT_ENA(4); } else { r &= ~PSC_AC97CFG_RXSLOT_MASK; r |= PSC_AC97CFG_RXSLOT_ENA(3); r |= PSC_AC97CFG_RXSLOT_ENA(4); } /* finally enable the AC97 controller again */ au_writel(r | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata)); au_sync(); pscdata->cfg = r; pscdata->rate = params_rate(params); } return 0; }
static void au1xpsc_ac97_cold_reset(struct snd_ac97 *ac97) { /* FIXME */ struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata; int i; /* disable PSC during cold reset */ au_writel(0, AC97_CFG(au1xpsc_ac97_workdata)); au_sync(); au_writel(PSC_CTRL_DISABLE, PSC_CTRL(pscdata)); au_sync(); /* issue cold reset */ au_writel(PSC_AC97RST_RST, AC97_RST(pscdata)); au_sync(); msleep(500); au_writel(0, AC97_RST(pscdata)); au_sync(); /* enable PSC */ au_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata)); au_sync(); /* wait for PSC to indicate it's ready */ i = 100000; while (!((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_SR)) && (--i)) au_sync(); if (i == 0) { printk(KERN_ERR "au1xpsc-ac97: PSC not ready!\n"); return; } /* enable the ac97 function */ au_writel(pscdata->cfg | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata)); au_sync(); /* wait for AC97 core to become ready */ i = 100000; while (!((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)) && (--i)) au_sync(); if (i == 0) printk(KERN_ERR "au1xpsc-ac97: AC97 ctrl not ready\n"); }
static void au1xpsc_ac97_cold_reset(struct snd_ac97 *ac97) { struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata; int i; au_writel(0, AC97_CFG(au1xpsc_ac97_workdata)); au_sync(); au_writel(PSC_CTRL_DISABLE, PSC_CTRL(pscdata)); au_sync(); au_writel(PSC_AC97RST_RST, AC97_RST(pscdata)); au_sync(); msleep(500); au_writel(0, AC97_RST(pscdata)); au_sync(); au_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata)); au_sync(); i = 1000; while (!((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_SR)) && (--i)) msleep(1); if (i == 0) { printk(KERN_ERR "au1xpsc-ac97: PSC not ready!\n"); return; } au_writel(pscdata->cfg | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata)); au_sync(); i = 1000; while (!((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)) && (--i)) msleep(1); if (i == 0) printk(KERN_ERR "au1xpsc-ac97: AC97 ctrl not ready\n"); }
static int au1xpsc_ac97_suspend(struct snd_soc_dai *dai) { /* save interesting registers and disable PSC */ au1xpsc_ac97_workdata->pm[0] = au_readl(PSC_SEL(au1xpsc_ac97_workdata)); au_writel(0, AC97_CFG(au1xpsc_ac97_workdata)); au_sync(); au_writel(PSC_CTRL_DISABLE, PSC_CTRL(au1xpsc_ac97_workdata)); au_sync(); return 0; }
static int au1xpsc_ac97_suspend(struct snd_soc_dai *dai) { au1xpsc_ac97_workdata->pm[0] = au_readl(PSC_SEL(au1xpsc_ac97_workdata)); au_writel(0, AC97_CFG(au1xpsc_ac97_workdata)); au_sync(); au_writel(PSC_CTRL_DISABLE, PSC_CTRL(au1xpsc_ac97_workdata)); au_sync(); return 0; }
static void au1xpsc_ac97_remove(struct platform_device *pdev, struct snd_soc_dai *dai) { /* disable PSC completely */ au_writel(0, AC97_CFG(au1xpsc_ac97_workdata)); au_sync(); au_writel(PSC_CTRL_DISABLE, PSC_CTRL(au1xpsc_ac97_workdata)); au_sync(); iounmap(au1xpsc_ac97_workdata->mmio); release_resource(au1xpsc_ac97_workdata->ioarea); kfree(au1xpsc_ac97_workdata->ioarea); kfree(au1xpsc_ac97_workdata); au1xpsc_ac97_workdata = NULL; }
static int au1xpsc_ac97_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) { struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata; unsigned long r, ro, stat; int chans, stype = SUBSTREAM_TYPE(substream); chans = params_channels(params); r = ro = au_readl(AC97_CFG(pscdata)); stat = au_readl(AC97_STAT(pscdata)); if (stat & (PSC_AC97STAT_TB | PSC_AC97STAT_RB)) { if ((PSC_AC97CFG_GET_LEN(r) != params->msbits) || (pscdata->rate != params_rate(params))) return -EINVAL; } else { r &= ~PSC_AC97CFG_LEN_MASK; r |= PSC_AC97CFG_SET_LEN(params->msbits); if (stype == PCM_TX) { r &= ~PSC_AC97CFG_TXSLOT_MASK; r |= PSC_AC97CFG_TXSLOT_ENA(3); r |= PSC_AC97CFG_TXSLOT_ENA(4); } else { r &= ~PSC_AC97CFG_RXSLOT_MASK; r |= PSC_AC97CFG_RXSLOT_ENA(3); r |= PSC_AC97CFG_RXSLOT_ENA(4); } if (!(r ^ ro)) goto out; mutex_lock(&pscdata->lock); au_writel(r & ~PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata)); au_sync(); while (au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR) asm volatile ("nop"); au_writel(r, AC97_CFG(pscdata)); au_sync(); au_writel(r | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata)); au_sync(); while (!(au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)) asm volatile ("nop"); mutex_unlock(&pscdata->lock); pscdata->cfg = r; pscdata->rate = params_rate(params); } out: return 0; }