uint16_t Flex::flex() const { ADC12_A_startConversion(ADC12_A_BASE, ADC12_A_MEMORY_4, ADC12_A_SINGLECHANNEL); while(!ADC12_A_getInterruptStatus(ADC12_A_BASE, ADC12_A_IFG4)); ADC12_A_clearInterrupt(ADC12_A_BASE, ADC12_A_IFG4); return ADC12_A_getResults(ADC12_A_BASE, ADC12_A_MEMORY_4); }
//=======放在WDT中断中调用======== void Wheel_ADC_Begin() { // ADC12CTL0 |= ADC12ENC+ADC12SC; //Enable conversions+ Start conversion ADC12_A_startConversion(ADC12_A_BASE, ADC12_A_MEMORY_0, ADC12_A_SINGLECHANNEL); }
uint16_t ADC12_SingleSample(void) { uint16_t temp=0; ADC12_A_startConversion(ADC12_A_BASE, ADC12_A_MEMORY_3, ADC12_A_SINGLECHANNEL); while(!(ADC12_A_getInterruptStatus(ADC12_A_BASE,ADC12_A_IFG3))); temp = ADC12_A_getResults(ADC12_A_BASE,ADC12_A_MEMORY_3); ADC12_A_clearInterrupt(ADC12_A_BASE,ADC12_A_IFG3); return temp; }
void ADCInit(void) { GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_P6, GPIO_PIN0 + GPIO_PIN1 + GPIO_PIN2 + GPIO_PIN3 ); //Initialize the ADC12_A Module /* * Base address of ADC12_A Module * Use internal ADC12_A bit as sample/hold signal to start conversion * USE MODOSC 5MHZ Digital Oscillator as clock source * Use default clock divider of 1 */ ADC12_A_init(ADC12_A_BASE, ADC12_A_SAMPLEHOLDSOURCE_SC, ADC12_A_CLOCKSOURCE_ADC12OSC, ADC12_A_CLOCKDIVIDER_1 ); ADC12_A_enable(ADC12_A_BASE); /* * Base address of ADC12_A Module * For memory buffers 0-7 sample/hold for 256 clock cycles * For memory buffers 8-15 sample/hold for 4 clock cycles (default) * Enable Multiple Sampling */ ADC12_A_setupSamplingTimer(ADC12_A_BASE, ADC12_A_CYCLEHOLD_256_CYCLES, ADC12_A_CYCLEHOLD_4_CYCLES, ADC12_A_MULTIPLESAMPLESENABLE); //Configure Memory Buffers /* * Base address of the ADC12_A Module * Configure memory buffer 0 * Map input A0 to memory buffer 0 * Vref+ = AVcc * Vref- = AVss * Memory buffer 0 is not the end of a sequence */ ADC12_A_configureMemoryParam param0 = {0}; param0.memoryBufferControlIndex = ADC12_A_MEMORY_0; param0.inputSourceSelect = ADC12_A_INPUT_A0; param0.positiveRefVoltageSourceSelect = ADC12_A_VREFPOS_AVCC; param0.negativeRefVoltageSourceSelect = ADC12_A_VREFNEG_AVSS; param0.endOfSequence = ADC12_A_NOTENDOFSEQUENCE; ADC12_A_configureMemory(ADC12_A_BASE,¶m0); /* * Base address of the ADC12_A Module * Configure memory buffer 1 * Map input A1 to memory buffer 1 * Vref+ = AVcc * Vref- = AVss * Memory buffer 1 is not the end of a sequence * */ ADC12_A_configureMemoryParam param1 = {0}; param1.memoryBufferControlIndex = ADC12_A_MEMORY_1; param1.inputSourceSelect = ADC12_A_INPUT_A1; param1.positiveRefVoltageSourceSelect = ADC12_A_VREFPOS_AVCC; param1.negativeRefVoltageSourceSelect = ADC12_A_VREFNEG_AVSS; param1.endOfSequence = ADC12_A_NOTENDOFSEQUENCE; ADC12_A_configureMemory(ADC12_A_BASE,¶m1); /* * Base address of the ADC12_A Module * Configure memory buffer 2 * Map input A2 to memory buffer 2 * Vref+ = AVcc * Vref- = AVss * Memory buffer 2 is not the end of a sequence */ ADC12_A_configureMemoryParam param2 = {0}; param2.memoryBufferControlIndex = ADC12_A_MEMORY_2; param2.inputSourceSelect = ADC12_A_INPUT_A2; param2.positiveRefVoltageSourceSelect = ADC12_A_VREFPOS_AVCC; param2.negativeRefVoltageSourceSelect = ADC12_A_VREFNEG_AVSS; param2.endOfSequence = ADC12_A_ENDOFSEQUENCE; ADC12_A_configureMemory(ADC12_A_BASE,¶m2); ADC12_A_startConversion(ADC12_A_BASE, ADC12_A_MEMORY_0, ADC12_A_REPEATED_SEQOFCHANNELS); }
void main(void) { //Stop Watchdog Timer WDT_A_hold(WDT_A_BASE); PowerLevel_3(); Clk_MCLK_24M_SMCLK_3M_ACLK_32768Hz(); //Enable A/D channel inputs GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_P6, GPIO_PIN0 + GPIO_PIN1 + GPIO_PIN2 + GPIO_PIN3 + GPIO_PIN4 + GPIO_PIN5 + GPIO_PIN6 + GPIO_PIN7 ); //Initialize the ADC12_A Module /* * Base address of ADC12_A Module * Use internal ADC12_A bit as sample/hold signal to start conversion * USE MODOSC 5MHZ Digital Oscillator as clock source * Use default clock divider of 1 */ ADC12_A_init(ADC12_A_BASE, ADC12_A_SAMPLEHOLDSOURCE_SC, ADC12_A_CLOCKSOURCE_ADC12OSC, ADC12_A_CLOCKDIVIDER_1 ); ADC12_A_enable(ADC12_A_BASE); /* * Base address of ADC12_A Module * For memory buffers 0-7 sample/hold for 256 clock cycles * For memory buffers 8-15 sample/hold for 4 clock cycles (default) * Enable Multiple Sampling */ ADC12_A_setupSamplingTimer(ADC12_A_BASE, ADC12_A_CYCLEHOLD_256_CYCLES, ADC12_A_CYCLEHOLD_4_CYCLES, ADC12_A_MULTIPLESAMPLESENABLE); //Configure Memory Buffers /* * Base address of the ADC12_A Module * Configure memory buffer 0 * Map input A0 to memory buffer 0 * Vref+ = AVcc * Vref- = AVss * Memory buffer 0 is not the end of a sequence */ ADC12_A_configureMemoryParam param0 = {0}; param0.memoryBufferControlIndex = ADC12_A_MEMORY_0; param0.inputSourceSelect = ADC12_A_INPUT_A0; param0.positiveRefVoltageSourceSelect = ADC12_A_VREFPOS_AVCC; param0.negativeRefVoltageSourceSelect = ADC12_A_VREFNEG_AVSS; param0.endOfSequence = ADC12_A_NOTENDOFSEQUENCE; ADC12_A_configureMemory(ADC12_A_BASE,¶m0); /* * Base address of the ADC12_A Module * Configure memory buffer 1 * Map input A1 to memory buffer 1 * Vref+ = AVcc * Vref- = AVss * Memory buffer 1 is not the end of a sequence * */ ADC12_A_configureMemoryParam param1 = {0}; param1.memoryBufferControlIndex = ADC12_A_MEMORY_1; param1.inputSourceSelect = ADC12_A_INPUT_A1; param1.positiveRefVoltageSourceSelect = ADC12_A_VREFPOS_AVCC; param1.negativeRefVoltageSourceSelect = ADC12_A_VREFNEG_AVSS; param1.endOfSequence = ADC12_A_NOTENDOFSEQUENCE; ADC12_A_configureMemory(ADC12_A_BASE,¶m1); /* * Base address of the ADC12_A Module * Configure memory buffer 2 * Map input A2 to memory buffer 2 * Vref+ = AVcc * Vref- = AVss * Memory buffer 2 is not the end of a sequence */ ADC12_A_configureMemoryParam param2 = {0}; param2.memoryBufferControlIndex = ADC12_A_MEMORY_2; param2.inputSourceSelect = ADC12_A_INPUT_A2; param2.positiveRefVoltageSourceSelect = ADC12_A_VREFPOS_AVCC; param2.negativeRefVoltageSourceSelect = ADC12_A_VREFNEG_AVSS; param2.endOfSequence = ADC12_A_NOTENDOFSEQUENCE; ADC12_A_configureMemory(ADC12_A_BASE,¶m2); /* * Base address of the ADC12_A Module * Configure memory buffer 3 * Map input A3 to memory buffer 3 * Vr+ = AVcc * Vr- = AVss * Memory buffer 3 IS the end of a sequence */ ADC12_A_configureMemoryParam param3 = {0}; param3.memoryBufferControlIndex = ADC12_A_MEMORY_3; param3.inputSourceSelect = ADC12_A_INPUT_A3; param3.positiveRefVoltageSourceSelect = ADC12_A_VREFPOS_AVCC; param3.negativeRefVoltageSourceSelect = ADC12_A_VREFNEG_AVSS; param3.endOfSequence = ADC12_A_ENDOFSEQUENCE; ADC12_A_configureMemory(ADC12_A_BASE,¶m3); //Enable memory buffer 3 interrupt ADC12_A_clearInterrupt(ADC12_A_BASE, ADC12IFG3); ADC12_A_enableInterrupt(ADC12_A_BASE, ADC12IE3); //Enable/Start first sampling and conversion cycle /* * Base address of ADC12_A Module * Start the conversion into memory buffer 0 * Use the repeated sequence of channels */ ADC12_A_startConversion(ADC12_A_BASE, ADC12_A_MEMORY_0, ADC12_A_REPEATED_SEQOFCHANNELS); //Enter LPM0, Enable interrupts __bis_SR_register(LPM0_bits + GIE); //For debugger __no_operation(); }