/**
* @brief Low level serial driver configuration and (re)start.
*
* @param[in] sdp pointer to a @p SerialDriver object
* @param[in] config the architecture-dependent serial driver configuration.
* If this parameter is set to @p NULL then a default
* configuration is used.
*
* @notapi
*/
void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
if (config == NULL)
config = &default_config;
if (sdp->state == SD_STOP) {
#if USE_SAM7_USART0
if (&SD1 == sdp) {
/* Starts the clock and clears possible sources of immediate interrupts.*/
AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_US0);
/* Enables associated interrupt vector.*/
AIC_EnableIT(AT91C_ID_US0);
}
#endif
#if USE_SAM7_USART1
if (&SD2 == sdp) {
/* Starts the clock and clears possible sources of immediate interrupts.*/
AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_US1);
/* Enables associated interrupt vector.*/
AIC_EnableIT(AT91C_ID_US1);
}
#endif
/* Note - no explicit start for SD3 (DBGU_UART) since it's not included
in the AIC or PMC.*/
}
usart_init(sdp, config);
}
void vInitialiseTimerForIntQueueTest( void )
{
const uint32_t ulDivider = 128UL, ulTCCLKS = 3UL;
/* Enable the TC clocks. */
PMC_EnablePeripheral( ID_TC0 );
PMC_EnablePeripheral( ID_TC1 );
/* Configure TC0 channel 0 for a tmrTIMER_0_FREQUENCY frequency and trigger
on RC compare. This is part of the IntQTimer test. */
TC_Configure( TC0, tmrTC0_CHANNEL_0, ulTCCLKS | TC_CMR_CPCTRG );
TC0->TC_CHANNEL[ tmrTC0_CHANNEL_0 ].TC_RC = ( BOARD_MCK / 2 ) / ( tmrTIMER_0_FREQUENCY * ulDivider );
TC0->TC_CHANNEL[ tmrTC0_CHANNEL_0 ].TC_IER = TC_IER_CPCS;
/* Configure TC0 channel 1 for a tmrTIMER_1_FREQUENCY frequency and trigger
on RC compare. This is part of the IntQTimer test. */
TC_Configure( TC0, tmrTC0_CHANNEL_1, ulTCCLKS | TC_CMR_CPCTRG );
TC0->TC_CHANNEL[ tmrTC0_CHANNEL_1 ].TC_RC = ( BOARD_MCK / 2 ) / ( tmrTIMER_1_FREQUENCY * ulDivider );
TC0->TC_CHANNEL[ tmrTC0_CHANNEL_1 ].TC_IER = TC_IER_CPCS;
/* Configure TC1 channel 0 tmrTIMER_2_FREQUENCY frequency and trigger on
RC compare. This is the very high frequency timer. */
TC_Configure( TC1, tmrTC1_CHANNEL_0, ulTCCLKS | TC_CMR_CPCTRG );
TC1->TC_CHANNEL[ tmrTC1_CHANNEL_0 ].TC_RC = BOARD_MCK / ( tmrTIMER_2_FREQUENCY * ulDivider );
TC1->TC_CHANNEL[ tmrTC1_CHANNEL_0 ].TC_IER = TC_IER_CPCS;
/* First setup TC0 interrupt, in which two channels are used. */
AIC->AIC_SSR = ID_TC0;
/* Ensure the interrupt is disabled before setting mode and handler. */
AIC->AIC_IDCR = AIC_IDCR_INTD;
AIC->AIC_SMR = AIC_SMR_SRCTYPE_EXT_POSITIVE_EDGE | tmrLOWER_PRIORITY;
AIC->AIC_SVR = ( uint32_t ) prvTC0_Handler;
/* Start with the interrupt clear. */
AIC->AIC_ICCR = AIC_ICCR_INTCLR;
/* Do the same for TC1 - which is the high frequency timer. */
AIC->AIC_SSR = ID_TC1;
AIC->AIC_IDCR = AIC_IDCR_INTD;
AIC->AIC_SMR = AIC_SMR_SRCTYPE_EXT_POSITIVE_EDGE | tmrHIGHER_PRIORITY;
AIC->AIC_SVR = ( uint32_t ) prvTC1_Handler;
AIC->AIC_ICCR = AIC_ICCR_INTCLR;
/* Finally enable the interrupts and start the timers. */
AIC_EnableIT( ID_TC0 );
AIC_EnableIT( ID_TC1 );
TC_Start( TC0, tmrTC0_CHANNEL_0 );
TC_Start( TC0, tmrTC0_CHANNEL_1 );
TC_Start( TC1, tmrTC1_CHANNEL_0 );
}
/**
* \brief Initializes the PIO interrupt management logic
*
* The desired priority of PIO interrupts must be provided.
* Calling this function multiple times result in the reset of currently
* configured interrupts.
*
* \param priority PIO controller interrupts priority.
*/
extern void PIO_InitializeInterrupts( uint32_t dwPriority )
{
TRACE_DEBUG( "PIO_Initialize()\n\r" ) ;
( void ) dwPriority;
/* Reset sources */
_dwNumSources = 0 ;
/* Configure PIO interrupt sources */
TRACE_DEBUG( "PIO_Initialize: Configuring PIOA\n\r" ) ;
PMC_EnablePeripheral( ID_PIOA ) ;
PIOA->PIO_ISR ;
PIOA->PIO_IDR = 0xFFFFFFFF ;
//IRQ_ConfigureIT(ID_PIOA, dwPriority, PIO_IT_InterruptHandler);
AIC_EnableIT(ID_PIOA);
/* Configure PIO interrupt sources */
TRACE_DEBUG( "PIO_Initialize: Configuring PIOB\n\r" ) ;
PMC_EnablePeripheral( ID_PIOB ) ;
PIOB->PIO_ISR ;
PIOB->PIO_IDR = 0xFFFFFFFF ;
AIC_EnableIT(ID_PIOB);
/* Configure PIO interrupt sources */
TRACE_DEBUG( "PIO_Initialize: Configuring PIOC\n\r" ) ;
PMC_EnablePeripheral( ID_PIOC ) ;
PIOC->PIO_ISR ;
PIOC->PIO_IDR = 0xFFFFFFFF ;
//IRQ_ConfigureIT(ID_PIOC, dwPriority, PIO_IT_InterruptHandler);
AIC_EnableIT(ID_PIOC);
/* Configure PIO interrupt sources */
TRACE_DEBUG( "PIO_Initialize: Configuring PIOD\n\r" ) ;
PMC_EnablePeripheral( ID_PIOD ) ;
PIOD->PIO_ISR ;
PIOD->PIO_IDR = 0xFFFFFFFF ;
//IRQ_ConfigureIT(ID_PIOD, dwPriority, PIO_IT_InterruptHandler);
AIC_EnableIT(ID_PIOD);
/* Configure PIO interrupt sources */
TRACE_DEBUG( "PIO_Initialize: Configuring PIOC\n\r" ) ;
PMC_EnablePeripheral( ID_PIOE ) ;
PIOE->PIO_ISR ;
PIOE->PIO_IDR = 0xFFFFFFFF ;
//IRQ_ConfigureIT(ID_PIOE, dwPriority, PIO_IT_InterruptHandler);
AIC_EnableIT(ID_PIOE);
}
/**
* @brief Configures and activates the I2C peripheral.
*
* @param[in] i2cp pointer to the @p I2CDriver object
*
* @notapi
*/
void i2c_lld_start(I2CDriver *i2cp) {
volatile uint32_t fake;
/* If in stopped state then enables the I2C clocks.*/
if (i2cp->state == I2C_STOP) {
#if SAM7_I2C_USE_I2C1
if (&I2CD1 == i2cp) {
/* enable peripheral clock */
AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TWI);
/* Enables associated interrupt vector.*/
AIC_EnableIT(AT91C_ID_TWI);
/* Reset */
AT91C_BASE_TWI->TWI_CR = AT91C_TWI_SWRST;
fake = AT91C_BASE_TWI->TWI_RHR;
/* Set master mode */
AT91C_BASE_TWI->TWI_CR = AT91C_TWI_MSDIS;
AT91C_BASE_TWI->TWI_CR = AT91C_TWI_MSEN;
/* Setup I2C parameters. */
AT91C_BASE_TWI->TWI_CWGR = i2cp->config->cwgr;
}
#endif /* STM32_I2C_USE_I2C1 */
}
(void)fake;
}
void USART1_UART_Init(unsigned int baudrate) {
unsigned int mode = AT91C_US_USMODE_NORMAL
| AT91C_US_CLKS_CLOCK
| AT91C_US_CHRL_8_BITS
| AT91C_US_PAR_NONE
| AT91C_US_NBSTOP_1_BIT
| AT91C_US_CHMODE_NORMAL;
// Configure pins
PIO_Configure(pins, PIO_LISTSIZE(pins));
// Enable the peripheral clock in the PMC
PMC_EnablePeripheral(AT91C_ID_US0);
// Configure the USART in the desired mode
USART_Configure(AT91C_BASE_US0, mode, baudrate, BOARD_MCK);
// Configure the RXBUFF interrupt
AT91C_BASE_US0->US_IER = AT91C_US_RXRDY;
AIC_ConfigureIT(AT91C_ID_US0, 0, ISR_Usart0);
AIC_EnableIT(AT91C_ID_US0);
// Enable receiver & transmitter
USART_SetTransmitterEnabled(AT91C_BASE_US0, 1);
USART_SetReceiverEnabled(AT91C_BASE_US0, 1);
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
/*
* LED pins setup.
*/
palClearPad(IOPORT1, PIOA_LED1);
palSetPadMode(IOPORT1, PIOA_LED1, PAL_MODE_OUTPUT_PUSHPULL);
palClearPad(IOPORT1, PIOA_LED2);
palSetPadMode(IOPORT1, PIOA_LED2, PAL_MODE_OUTPUT_PUSHPULL);
/*
* buttons setup.
*/
palSetGroupMode(IOPORT1, PIOA_B1_MASK | PIOA_B2_MASK, 0, PAL_MODE_INPUT);
/*
* MMC/SD slot setup.
*/
palSetGroupMode(IOPORT1,
PIOA_MMC_WP_MASK | PIOA_MMC_CP_MASK,
0,
PAL_MODE_INPUT);
/*
* PIT Initialization.
*/
AIC_ConfigureIT(AT91C_ID_SYS,
AT91C_AIC_SRCTYPE_HIGH_LEVEL | (AT91C_AIC_PRIOR_HIGHEST - 1),
SYSIrqHandler);
AIC_EnableIT(AT91C_ID_SYS);
AT91C_BASE_PITC->PITC_PIMR = (MCK / 16 / CH_FREQUENCY) - 1;
AT91C_BASE_PITC->PITC_PIMR |= AT91C_PITC_PITEN | AT91C_PITC_PITIEN;
}
//------------------------------------------------------------------------------
/// Do calibration
/// \param pLcdBuffer LCD buffer to use for displaying the calibration info.
/// \return 1 if calibration is Ok, 0 else
//------------------------------------------------------------------------------
unsigned char TSD_Calibrate(void *pLcdBuffer)
{
unsigned char ret = 0;
// Calibration is done only once
if(TSDCom_IsCalibrationOk()) {
return 1;
}
// Enable trigger
TSADCC_SetTriggerMode(AT91C_TSADC_TRGMOD_PENDET_TRIGGER);
// Do calibration
ret = TSDCom_Calibrate(pLcdBuffer);
// Disable trigger
TSADCC_SetTriggerMode(AT91C_TSADC_TRGMOD_NO_TRIGGER);
// Configure interrupt generation
// Do it only if the calibration is Ok.
if(ret) {
TSADCC_SetTriggerMode(AT91C_TSADC_TRGMOD_PENDET_TRIGGER);
AIC_ConfigureIT(AT91C_ID_TSADC, 0, InterruptHandler);
AIC_EnableIT(AT91C_ID_TSADC);
AT91C_BASE_TSADC->TSADC_IER = AT91C_TSADC_PENCNT;
}
return ret;
}
/**
* @brief Configures and activates the EXT peripheral.
*
* @param[in] extp pointer to the @p EXTDriver object
*
* @notapi
*/
void ext_lld_start(EXTDriver *extp) {
uint16_t ch;
uint32_t ier = 0;
const EXTConfig *config = extp->config;
switch(extp->pid) {
case AT91C_ID_PIOA:
AIC_ConfigureIT(AT91C_ID_PIOA, SAM7_computeSMR(config->mode,
config->priority),
EXTIA_IRQHandler);
break;
#if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
(SAM7_PLATFORM == SAM7X512) || (SAM7_PLATFORM == SAM7A3)
case AT91C_ID_PIOB:
AIC_ConfigureIT(AT91C_ID_PIOB, SAM7_computeSMR(config->mode,
config->priority),
EXTIB_IRQHandler);
break;
#endif
}
/* Enable and Disable channels with respect to config.*/
for(ch = 0; ch < EXT_MAX_CHANNELS; ch++) {
ier |= (config->channels[ch].mode & EXT_CH_MODE_EDGES_MASK & EXT_CH_MODE_ENABLED ? 1 : 0) << ch;
}
extp->pio->PIO_IER = ier;
extp->pio->PIO_IDR = ~ier;
/* Enable interrupt on corresponding PIO port in AIC.*/
AIC_EnableIT(extp->pid);
}
static void prvConfigureVBus( void )
{
const Pin xVBusPin = PIN_USB_VBUS;
const uint32_t ulPriority = 7; /* Highest. */
/* Configure PIO to generate an interrupt on status change. */
PIO_Configure( &xVBusPin, 1 );
PIO_ConfigureIt( &xVBusPin );
/* Ensure interrupt is disabled before setting the mode and installing the
handler. The priority of the tick interrupt should always be set to the
lowest possible. */
AIC->AIC_SSR = ID_PIOE;
AIC->AIC_IDCR = AIC_IDCR_INTD;
AIC->AIC_SMR = AIC_SMR_SRCTYPE_EXT_POSITIVE_EDGE | ulPriority;
AIC->AIC_SVR = ( uint32_t ) prvVBusISRHandler;
/* Start with the interrupt clear. */
AIC->AIC_ICCR = AIC_ICCR_INTCLR;
PIO_EnableIt( &xVBusPin );
AIC_EnableIT( ID_PIOE );
/* Check current level on VBus */
if( PIO_Get( &xVBusPin ) != pdFALSE )
{
/* If VBUS present, force the connect */
USBD_Connect();
}
else
{
USBD_Disconnect();
}
}
////////////////////////////////////////////////////////////////////////////////
// Konfiguracja timera PIT (serwo)
////////////////////////////////////////////////////////////////////////////////
void PIT_Configure(int czas_us) {
unsigned int dummy, piv;
float tmp;
//wy��czenie timera PIT na czas konfiguracji
AT91C_BASE_PITC->PITC_PIMR = ~(AT91C_PITC_PITEN | AT91C_PITC_PITIEN);
//oczekiwanie na wyzerowanie licznika (pole CPIV w rejestrze PIVR)
while (AT91C_BASE_PITC->PITC_PIVR & AT91C_PITC_CPIV)
;
//wyzerowanie potencjalnego ��dania przerwania
dummy = AT91C_BASE_PITC->PITC_PIVR;
//konfiguracja przerwania
AIC_ConfigureIT(AT91C_ID_SYS, AT91C_AIC_PRIOR_LOWEST
| AT91C_AIC_SRCTYPE_HIGH_LEVEL, SYSTEM_INTERRUPT_irq_handler);
// AT91F_AIC_ConfigureIt ( AT91C_BASE_AIC, AT91C_ID_SYS, AT91C_AIC_PRIOR_LOWEST, AT91C_AIC_SRCTYPE_HIGH_LEVEL, SYSTEM_INTERRUPT_irq_handler);
AIC_EnableIT(AT91C_ID_SYS);
// AT91F_AIC_EnableIt (AT91C_BASE_AIC, AT91C_ID_SYS);
//w��czenie timera PIT i ustawienie interwa�u
//piv = ( ( czas_us * ( (MCK/16)/1000 ) ) / 1000 );
tmp = ((((float) MCK) / (16000000.0)) * (float) czas_us) - 1.0;
piv = tmp;
AT91C_BASE_PITC->PITC_PIMR = (piv | AT91C_PITC_PITEN | AT91C_PITC_PITIEN);
}
void timer_start(Timer *t)
{
AIC_DisableIT(1);
t->time += current_time;
t->next = first_timer;
first_timer = t;
AIC_EnableIT(1);
}
static void platform_systimer_init()
{
PIT_SetPIV( SYSTIMER_LIMIT );
AIC_ConfigureIT( AT91C_ID_SYS, 0, ISR_Pit );
PIT_EnableIT();
AIC_EnableIT( AT91C_ID_SYS );
PIT_Enable();
}
void USBDCallbacks_Initialized( void )
{
/* CDC specific re-implementation of weak callback function. Invoked after
the USB driver has been initialised. By default, configures the UDP/UDPHS
interrupt. The interrupt priority is set to the highest to ensure the
interrupt nesting tests interfer as little as possible with the USB. */
AIC_EnableIT( ID_UDPHS );
}
void platform_int_init()
{
unsigned i;
for( i = 0; i < NUM_UART; i ++ )
{
AIC_ConfigureIT( usart_int_ids[ i ], 0, phandlers[ i ] );
AIC_EnableIT( usart_int_ids[ i ] );
}
}
void timer_init()
{
AT91C_BASE_PITC->PITC_PIMR = AT91C_PITC_PITIEN | AT91C_PITC_PITEN | 2999;
// Clear any pending interrupt
AT91C_BASE_PITC->PITC_PIVR;
// This is the SYSC interrupt, shared with other things we don't care about yet
AIC_ConfigureIT(1, 0, timer_interrupt);
AIC_EnableIT(1);
}
void TimerInit()
{
PMC_EnablePeripheral(AT91C_ID_TC0); // enable the Timer Counter from PMC
TC_Configure(AT91C_BASE_TC0, AT91C_TC_CPCTRG); // Configure TC-0 with RC compare trig.
AT91C_BASE_TC0->TC_RC = 24000; // Interrupt every 0.001s
TC_Start(AT91C_BASE_TC0); // start the timer
AIC_ConfigureIT(AT91C_ID_TC0, AT91C_AIC_PRIOR_LOWEST, ISR_TC0);
AT91C_BASE_TC0->TC_IER = AT91C_TC_CPCS;
AIC_EnableIT(AT91C_ID_TC0);
}
static void prvSetupTimerInterrupt( void )
{
const uint32_t ulPeriodIn_uS = ( 1.0 / ( double ) configTICK_RATE_HZ ) * port1SECOND_IN_uS;
/* Setup the PIT for the required frequency. */
PIT_Init( ulPeriodIn_uS, BOARD_MCK / port1MHz_IN_Hz );
/* Setup the PIT interrupt. */
AIC_DisableIT( AT91C_ID_SYS );
AIC_ConfigureIT( AT91C_ID_SYS, AT91C_AIC_PRIOR_LOWEST, vPortTickISR );
AIC_EnableIT( AT91C_ID_SYS );
PIT_EnableIT();
}
int platform_init()
{
int i;
// Enable the peripherals we use in the PMC
PMC_EnablePeripheral( AT91C_ID_US0 );
PMC_EnablePeripheral( AT91C_ID_US1 );
PMC_EnablePeripheral( AT91C_ID_PIOA );
PMC_EnablePeripheral( AT91C_ID_PIOB );
PMC_EnablePeripheral( AT91C_ID_TC0 );
PMC_EnablePeripheral( AT91C_ID_TC1 );
PMC_EnablePeripheral( AT91C_ID_TC2 );
PMC_EnablePeripheral( AT91C_ID_PWMC );
// Configure the timers
AT91C_BASE_TCB->TCB_BMR = 0x15;
for( i = 0; i < 3; i ++ )
TC_Configure( ( AT91S_TC* )timer_base[ i ], AT91C_TC_CLKS_TIMER_DIV5_CLOCK | AT91C_TC_WAVE );
// PWM setup (only the clocks are set at this point)
PWMC_ConfigureClocks( BOARD_MCK, BOARD_MCK, BOARD_MCK );
PWMC_ConfigureChannel( 0, AT91C_PWMC_CPRE_MCKA, 0, 0 );
PWMC_ConfigureChannel( 1, AT91C_PWMC_CPRE_MCKA, 0, 0 );
PWMC_ConfigureChannel( 2, AT91C_PWMC_CPRE_MCKB, 0, 0 );
PWMC_ConfigureChannel( 3, AT91C_PWMC_CPRE_MCKB, 0, 0 );
for( i = 0; i < 4; i ++ )
{
PWMC_EnableChannel( i );
PWMC_EnableChannelIt( i );
}
cmn_platform_init();
#if VTMR_NUM_TIMERS > 0
// Virtual timer initialization
TC_Configure( AT91C_BASE_TC2, AT91C_TC_CLKS_TIMER_DIV5_CLOCK | AT91C_TC_WAVE | AT91C_TC_WAVESEL_UP_AUTO );
AT91C_BASE_TC2->TC_RC = ( BOARD_MCK / 1024 ) / VTMR_FREQ_HZ;
AIC_DisableIT( AT91C_ID_TC2 );
AIC_ConfigureIT( AT91C_ID_TC2, 0, ISR_Tc2 );
AT91C_BASE_TC2->TC_IER = AT91C_TC_CPCS;
AIC_EnableIT( AT91C_ID_TC2 );
TC_Start( AT91C_BASE_TC2 );
#endif
// Initialize the system timer
cmn_systimer_set_base_freq( BOARD_MCK / 16 );
cmn_systimer_set_interrupt_period_us( SYSTIMER_US_PER_INTERRUPT );
platform_systimer_init();
return PLATFORM_OK;
}
/**
* @brief Configures and activates the SPI peripheral.
*
* @param[in] spip pointer to the @p SPIDriver object
*
* @notapi
*/
void spi_lld_start(SPIDriver *spip) {
if (spip->state == SPI_STOP) {
#if AT91SAM7_SPI_USE_SPI0
if (&SPID1 == spip) {
/* Clock activation.*/
AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_SPI0);
/* Enables associated interrupt vector.*/
AIC_EnableIT(AT91C_ID_SPI0);
}
#endif
#if AT91SAM7_SPI_USE_SPI1
if (&SPID2 == spip) {
/* Clock activation.*/
AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_SPI1);
/* Enables associated interrupt vector.*/
AIC_EnableIT(AT91C_ID_SPI1);
}
#endif
}
/* Configuration.*/
spip->spi->SPI_CSR[0] = spip->config->csr;
}
/* _____GLOBAL FUNCTIONS_____________________________________________________ */
void usart0_init(void)
{
// Clear flag
usart0_tx_finished_flag = FALSE;
// Initialise ring buffers
ring_buffer_init(&usart0_rx_ring_buffer, usart0_rx_buffer, USART0_RX_BUFFER_SIZE);
ring_buffer_init(&usart0_tx_ring_buffer, usart0_tx_buffer, USART0_TX_BUFFER_SIZE);
// Configure PIO pins for USART0 peripheral
PIO_Configure(USART0_Pins, PIO_LISTSIZE(USART0_Pins));
// Disable the interrupt on the interrupt controller
AIC_DisableIT(AT91C_ID_US0);
// Enable USART0 clock
PMC_EnablePeripheral(AT91C_ID_US0);
// Disable all USART0 interrupts
AT91C_BASE_US0->US_IDR = 0xFFFFFFFF;
// Configure USART
USART_Configure(AT91C_BASE_US0,
AT91C_US_USMODE_NORMAL |
AT91C_US_CLKS_CLOCK |
AT91C_US_CHRL_8_BITS |
AT91C_US_PAR_NONE |
AT91C_US_NBSTOP_1_BIT,
115200,
BOARD_MCK);
USART_SetTransmitterEnabled(AT91C_BASE_US0, 1);
USART_SetReceiverEnabled(AT91C_BASE_US0, 1);
// Configure the AIC for USART0 interrupts
AIC_ConfigureIT(AT91C_ID_US0, AT91C_AIC_PRIOR_LOWEST | AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, usart0_interrupt);
// Enable the interrupt on the interrupt controller
AIC_EnableIT(AT91C_ID_US0);
// Enable selected USART0 interrupts
AT91C_BASE_US0->US_IER = AT91C_US_RXRDY |
AT91C_US_RXBRK |
AT91C_US_OVRE |
AT91C_US_FRAME |
AT91C_US_PARE;
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
/*
* LCD pins setup.
*/
palClearPad(IOPORT2, PIOB_LCD_BL);
palSetPadMode(IOPORT2, PIOB_LCD_BL, PAL_MODE_OUTPUT_PUSHPULL);
palSetPad(IOPORT1, PIOA_LCD_RESET);
palSetPadMode(IOPORT1, PIOA_LCD_RESET, PAL_MODE_OUTPUT_PUSHPULL);
/*
* Joystick and buttons setup.
*/
palSetGroupMode(IOPORT1,
PIOA_B1_MASK | PIOA_B2_MASK | PIOA_B3_MASK |
PIOA_B4_MASK | PIOA_B5_MASK,
0,
PAL_MODE_INPUT);
palSetGroupMode(IOPORT2, PIOB_SW1_MASK | PIOB_SW2_MASK, 0, PAL_MODE_INPUT);
/*
* MMC/SD slot setup.
*/
palSetGroupMode(IOPORT2,
PIOB_MMC_WP_MASK | PIOB_MMC_CP_MASK,
0,
PAL_MODE_INPUT);
/*
* PIT Initialization.
*/
AIC_ConfigureIT(AT91C_ID_SYS,
AT91C_AIC_SRCTYPE_HIGH_LEVEL | (AT91C_AIC_PRIOR_HIGHEST - 1),
SYSIrqHandler);
AIC_EnableIT(AT91C_ID_SYS);
AT91C_BASE_PITC->PITC_PIMR = (MCK / 16 / CH_FREQUENCY) - 1;
AT91C_BASE_PITC->PITC_PIMR |= AT91C_PITC_PITEN | AT91C_PITC_PITIEN;
/*
* RTS/CTS pins enabled for USART0 only.
*/
AT91C_BASE_PIOA->PIO_PDR = AT91C_PA3_RTS0 | AT91C_PA4_CTS0;
AT91C_BASE_PIOA->PIO_ASR = AT91C_PIO_PA3 | AT91C_PIO_PA4;
AT91C_BASE_PIOA->PIO_PPUDR = AT91C_PIO_PA3 | AT91C_PIO_PA4;
}
unsigned long int SysTick_Config(unsigned long int ticks)
{
unsigned long int rate = SystemCoreClock/ticks;
/* Configure timer to interrupt specified times per second */
PIT_Init(1000000/rate, SystemCoreClock/1000000);
PIT_EnableIT();
PIT_Enable();
/* Configure timer interrupt */
AIC_ConfigureIT(AT91C_ID_SYS, AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, TimerISR);
AIC_EnableIT(AT91C_ID_SYS);
return 0;
}
void timer_stop(Timer *t)
{
AIC_DisableIT(1);
if (t == first_timer)
{
first_timer = t->next;
} else {
for (Timer *prev = first_timer; prev; prev = prev->next)
{
if (prev->next == t)
{
prev->next = t->next;
break;
}
}
}
AIC_EnableIT(1);
}
/*---------------------------------------------------------------------------*/
void
network_init(void)
{
Dm9161 *pDm = &gDm9161;
MacAddress.addr[0] = erb(EE_MAC_ADDR+0);
MacAddress.addr[1] = erb(EE_MAC_ADDR+1);
MacAddress.addr[2] = erb(EE_MAC_ADDR+2);
MacAddress.addr[3] = erb(EE_MAC_ADDR+3);
MacAddress.addr[4] = erb(EE_MAC_ADDR+4);
MacAddress.addr[5] = erb(EE_MAC_ADDR+5);
// Display MAC & IP settings
TRACE_INFO(" - MAC %x:%x:%x:%x:%x:%x\n\r",
MacAddress.addr[0], MacAddress.addr[1], MacAddress.addr[2],
MacAddress.addr[3], MacAddress.addr[4], MacAddress.addr[5]);
// clear PHY power down mode
PIO_Configure(emacPwrDn, 1);
// Init EMAC driver structure
EMAC_Init(AT91C_ID_EMAC, MacAddress.addr, EMAC_CAF_ENABLE, EMAC_NBC_DISABLE);
// Setup EMAC buffers and interrupts
AIC_ConfigureIT(AT91C_ID_EMAC, AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, ISR_Emac);
AIC_EnableIT(AT91C_ID_EMAC);
// Init DM9161 driver
DM9161_Init(pDm, EMAC_PHY_ADDR);
// PHY initialize
//if (!DM9161_InitPhy(pDm, BOARD_MCK,
// emacRstPins, PIO_LISTSIZE(emacRstPins),
// emacPins, PIO_LISTSIZE(emacPins))) {
if (!DM9161_InitPhy(pDm, BOARD_MCK,
0, 0,
emacPins, PIO_LISTSIZE(emacPins))) {
TRACE_INFO("P: PHY Initialize ERROR!\n\r");
return;
}
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
/*
* PIT Initialization.
*/
AIC_ConfigureIT(AT91C_ID_SYS,
AT91C_AIC_SRCTYPE_HIGH_LEVEL | (AT91C_AIC_PRIOR_HIGHEST - 1),
SYSIrqHandler);
AIC_EnableIT(AT91C_ID_SYS);
AT91C_BASE_PITC->PITC_PIMR = (MCK / 16 / CH_FREQUENCY) - 1;
AT91C_BASE_PITC->PITC_PIMR |= AT91C_PITC_PITEN | AT91C_PITC_PITIEN;
/*
* RTS/CTS pins enabled for USART0 only.
*/
AT91C_BASE_PIOA->PIO_PDR = AT91C_PA3_RTS0 | AT91C_PA4_CTS0;
AT91C_BASE_PIOA->PIO_ASR = AT91C_PIO_PA3 | AT91C_PIO_PA4;
AT91C_BASE_PIOA->PIO_PPUDR = AT91C_PIO_PA3 | AT91C_PIO_PA4;
}
void PitInit(unsigned int msperiod)
{
PIT_DisableIT();
// Initialize the PIT to the desired frequency
PIT_Init(0, 0);
// PIT timer runs at MCK/16
// calculates the PIT Value accurate to a Millisecond interrupt
// msperiod can not be larget than 349 because PIV is at a 20bit limit
if(msperiod > 349) msperiod = 349;
PIT_SetPIV((MCK/(16*1000))*msperiod);
// Configure interrupt on PIT
AIC_DisableIT(AT91C_ID_SYS);
AIC_ConfigureIT(AT91C_ID_SYS, AT91C_AIC_PRIOR_LOWEST, ISR_Pit);
AIC_EnableIT(AT91C_ID_SYS);
PIT_EnableIT();
// Enable the pit
PIT_Enable();
}
//------------------------------------------------------------------------------
/// Configures the PIT to generate 1ms ticks.
//------------------------------------------------------------------------------
static void ConfigurePit(void)
{
// Initialize and enable the PIT
PIT_Init(PIT_PERIOD, BOARD_MCK / 1000000);
// Disable the interrupt on the interrupt controller
AIC_DisableIT(AT91C_ID_SYS);
// Configure the AIC for PIT interrupts
AIC_ConfigureIT(AT91C_ID_SYS, 0, ISR_Pit);
// Enable the interrupt on the interrupt controller
AIC_EnableIT(AT91C_ID_SYS);
// Enable the interrupt on the pit
PIT_EnableIT();
// Enable the pit
PIT_Enable();
}
/*
* See the serial2.h header file.
*/
xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
{
xComPortHandle xReturn = serHANDLE;
/* Create the queues used to hold Rx and Tx characters. */
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
/* If the queues were created correctly then setup the serial port
hardware. */
if( ( xRxedChars != serINVALID_QUEUE ) && ( xCharsForTx != serINVALID_QUEUE ) )
{
PMC_EnablePeripheral( AT91C_ID_US0 );
portENTER_CRITICAL();
{
USART_Configure( serCOM0, ( AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE ), ulWantedBaud, configCPU_CLOCK_HZ );
/* Enable Rx and Tx. */
USART_SetTransmitterEnabled( serCOM0, pdTRUE );
USART_SetReceiverEnabled( serCOM0, pdTRUE );
/* Enable the Rx interrupts. The Tx interrupts are not enabled
until there are characters to be transmitted. */
serCOM0->US_IER = AT91C_US_RXRDY;
/* Enable the interrupts in the AIC. */
AIC_ConfigureIT( AT91C_ID_US0, AT91C_AIC_PRIOR_LOWEST, ( void (*)( void ) ) vSerialISR );
AIC_EnableIT( AT91C_ID_US0 );
}
portEXIT_CRITICAL();
}
else
{
xReturn = ( xComPortHandle ) 0;
}
/* This demo file only supports a single port but we have to return
something to comply with the standard demo header file. */
return xReturn;
}
//------------------------------------------------------------------------------
/// Invoked after the USB driver has been initialized. By default, configures
/// the UDP/UDPHS interrupt.
//------------------------------------------------------------------------------
void USBDCallbacks_Initialized(void)
{
#if defined(BOARD_USB_UDP)
// Configure and enable the UDP interrupt
// AIC_ConfigureIT(AT91C_ID_UDP, 0, UsbIsr_Wrapper);
AT91C_BASE_AIC->AIC_IDCR = 1 << AT91C_ID_UDP;
// Configure mode and handler
AT91C_BASE_AIC->AIC_SMR[AT91C_ID_UDP] = AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL | 3;
AT91C_BASE_AIC->AIC_SVR[AT91C_ID_UDP] = (unsigned int) UsbIsr_Wrapper;
// Clear interrupt
AT91C_BASE_AIC->AIC_ICCR = 1 << AT91C_ID_UDP;
// AIC_EnableIT(AT91C_ID_UDP);
AT91C_BASE_AIC->AIC_IECR = 1 << AT91C_ID_UDP;
#elif defined(BOARD_USB_UDPHS)
// Configure and enable the UDPHS interrupt
AIC_ConfigureIT(AT91C_ID_UDPHS, 0, UsbIsr_Wrapper);
AIC_EnableIT(AT91C_ID_UDPHS);
#else
#error Unsupported controller.
#endif
}
/*
* The application must provide a function that configures a peripheral to
* create the FreeRTOS tick interrupt, then define configSETUP_TICK_INTERRUPT()
* in FreeRTOSConfig.h to call the function. This file contains a function
* that is suitable for use on the Atmel SAMA5.
*/
void vConfigureTickInterrupt( void )
{
/* NOTE: The PIT interrupt is cleared by the configCLEAR_TICK_INTERRUPT()
macro in FreeRTOSConfig.h. */
/* Enable the PIT clock. */
PMC->PMC_PCER0 = 1 << ID_PIT;
/* Initialize the PIT to the desired frequency - specified in uS. */
PIT_Init( 1000000UL / configTICK_RATE_HZ, ( BOARD_MCK / 2 ) / 1000000 );
/* Enable IRQ / select PIT interrupt. */
PMC->PMC_PCER1 = ( 1 << ( ID_IRQ - 32 ) );
AIC->AIC_SSR = ID_PIT;
/* Ensure interrupt is disabled before setting the mode and installing the
handler. The priority of the tick interrupt should always be set to the
lowest possible. */
AIC->AIC_IDCR = AIC_IDCR_INTD;
AIC->AIC_SMR = AIC_SMR_SRCTYPE_EXT_POSITIVE_EDGE;
AIC->AIC_SVR = ( uint32_t ) FreeRTOS_Tick_Handler;
/* Start with the interrupt clear. */
AIC->AIC_ICCR = AIC_ICCR_INTCLR;
/* Enable the interrupt in the AIC and peripheral. */
AIC_EnableIT( ID_PIT );
PIT_EnableIT();
/* Enable the peripheral. */
PIT_Enable();
/* Prevent compiler warnings in the case where System_Handler() is not used
as the handler. See the comments above the System_Handler() function
prototype at the top of this file. */
( void ) System_Handler;
}
