static void ar9003_hw_rtt_load_hist_entry(struct ath_hw *ah, u8 chain, u32 index, u32 data28) { u32 val; val = SM(data28, AR_PHY_RTT_SW_RTT_TABLE_DATA); REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_1_B(chain), val); val = SM(0, AR_PHY_RTT_SW_RTT_TABLE_ACCESS) | SM(1, AR_PHY_RTT_SW_RTT_TABLE_WRITE) | SM(index, AR_PHY_RTT_SW_RTT_TABLE_ADDR); REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val); udelay(1); val |= SM(1, AR_PHY_RTT_SW_RTT_TABLE_ACCESS); REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val); udelay(1); if (!ath9k_hw_wait(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), AR_PHY_RTT_SW_RTT_TABLE_ACCESS, 0, RTT_ACCESS_TIMEOUT)) return; val &= ~SM(1, AR_PHY_RTT_SW_RTT_TABLE_WRITE); REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val); udelay(1); ath9k_hw_wait(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), AR_PHY_RTT_SW_RTT_TABLE_ACCESS, 0, RTT_ACCESS_TIMEOUT); }
static int ar9003_hw_rtt_fill_hist_entry(struct ath_hw *ah, u8 chain, u32 index) { u32 val; val = SM(0, AR_PHY_RTT_SW_RTT_TABLE_ACCESS) | SM(0, AR_PHY_RTT_SW_RTT_TABLE_WRITE) | SM(index, AR_PHY_RTT_SW_RTT_TABLE_ADDR); REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val); udelay(1); val |= SM(1, AR_PHY_RTT_SW_RTT_TABLE_ACCESS); REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val); udelay(1); if (!ath9k_hw_wait(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), AR_PHY_RTT_SW_RTT_TABLE_ACCESS, 0, RTT_ACCESS_TIMEOUT)) return RTT_BAD_VALUE; val = MS(REG_READ(ah, AR_PHY_RTT_TABLE_SW_INTF_1_B(chain)), AR_PHY_RTT_SW_RTT_TABLE_DATA); return val; }