/* APIs visible to the driver */
void
BMIInit(void)
{
bmiDone = false;
pendingEventsFuncCheck = false;
/*
* On some platforms, it's not possible to DMA to a static variable
* in a device driver (e.g. Linux loadable driver module).
* So we need to A_MALLOC space for "command credits" and for commands.
*
* Note: implicitly relies on A_MALLOC to provide a buffer that is
* suitable for DMA (or PIO). This buffer will be passed down the
* bus stack.
*/
if (!pBMICmdCredits) {
pBMICmdCredits = (u32 *)A_MALLOC_NOWAIT(4);
A_ASSERT(pBMICmdCredits);
}
if (!pBMICmdBuf) {
pBMICmdBuf = (u8 *)A_MALLOC_NOWAIT(MAX_BMI_CMDBUF_SZ);
A_ASSERT(pBMICmdBuf);
}
A_REGISTER_MODULE_DEBUG_INFO(bmi);
}
/* APIs visible to the driver */
A_STATUS
BMIInit(A_VOID *pCxt)
{
bmiDone = FALSE;
/*
* On some platforms, it's not possible to DMA to a static variable
* in a device driver (e.g. Linux loadable driver module).
* So we need to A_MALLOC space for "command credits" and for commands.
*
* Note: implicitly relies on A_MALLOC to provide a buffer that is
* suitable for DMA (or PIO). This buffer will be passed down the
* bus stack.
*/
if (!pBMICmdCredits) {
pBMICmdCredits = (A_UINT32 *)A_MALLOC(4, MALLOC_ID_TEMPORARY);
A_ASSERT(pBMICmdCredits);
}
if (!pBMICmdBuf) {
pBMICmdBuf = (A_UCHAR *)A_MALLOC(MAX_BMI_CMDBUF_SZ, MALLOC_ID_TEMPORARY);
A_ASSERT(pBMICmdBuf);
}
return A_OK;
}
/****************************************************
* Invoked from bluetooth stack via hdev->send()
* to send the packet out via ar6k to PAL firmware.
*
* For HCI command packet wmi_send_hci_cmd() is invoked.
* wmi_send_hci_cmd adds WMI_CMD_HDR and sends the packet
* to PAL firmware.
*
* For HCI ACL data packet wmi_data_hdr_add is invoked
* to add WMI_DATA_HDR to the packet. ar6000_acl_data_tx
* is then invoked to send the packet to PAL firmware.
******************************************************/
static int btpal_send_frame(struct sk_buff *skb)
{
struct hci_dev *hdev = (struct hci_dev *)skb->dev;
HCI_TRANSPORT_PACKET_TYPE type;
ar6k_hci_pal_info_t *pHciPalInfo;
A_STATUS status = A_OK;
struct sk_buff *txSkb = NULL;
AR_SOFTC_DEV_T *ar;
if (!hdev) {
PRIN_LOG("HCI PAL: btpal_send_frame - no device\n");
return -ENODEV;
}
if (!test_bit(HCI_RUNNING, &hdev->flags)) {
PRIN_LOG("HCI PAL: btpal_send_frame - not open\n");
return -EBUSY;
}
pHciPalInfo = (ar6k_hci_pal_info_t *)hdev->driver_data;
A_ASSERT(pHciPalInfo != NULL);
ar = pHciPalInfo->ar;
PRIN_LOG("+btpal_send_frame type: %d \n",bt_cb(skb)->pkt_type);
type = HCI_COMMAND_TYPE;
switch (bt_cb(skb)->pkt_type) {
case HCI_COMMAND_PKT:
type = HCI_COMMAND_TYPE;
hdev->stat.cmd_tx++;
break;
case HCI_ACLDATA_PKT:
type = HCI_ACL_TYPE;
hdev->stat.acl_tx++;
break;
case HCI_SCODATA_PKT:
/* we don't support SCO over the pal */
kfree_skb(skb);
return 0;
default:
A_ASSERT(FALSE);
kfree_skb(skb);
return 0;
}
if(loghci) {
A_PRINTF(">>> Send HCI %s packet len: %d\n",
(type == HCI_COMMAND_TYPE) ? "COMMAND" : "ACL",
skb->len);
if (type == HCI_COMMAND_TYPE) {
A_PRINTF("HCI Command: OGF:0x%X OCF:0x%X \r\n",
(HCI_GET_OP_CODE(skb->data)) >> 10,
(HCI_GET_OP_CODE(skb->data)) & 0x3FF);
}
DebugDumpBytes(skb->data,skb->len,"BT HCI SEND Packet Dump");
}
/*
* bt_send_frame - send data frames
*/
static int bt_send_frame(struct sk_buff *skb)
{
struct hci_dev *hdev = (struct hci_dev *)skb->dev;
HCI_TRANSPORT_PACKET_TYPE type;
AR6K_HCI_BRIDGE_INFO *pHcidevInfo;
HTC_PACKET *pPacket;
A_STATUS status = A_OK;
struct sk_buff *txSkb = NULL;
if (!hdev) {
AR_DEBUG_PRINTF(ATH_DEBUG_WARN, ("HCI Bridge: bt_send_frame - no device\n"));
return -ENODEV;
}
if (!test_bit(HCI_RUNNING, &hdev->flags)) {
AR_DEBUG_PRINTF(ATH_DEBUG_TRC, ("HCI Bridge: bt_send_frame - not open\n"));
return -EBUSY;
}
pHcidevInfo = (AR6K_HCI_BRIDGE_INFO *)hdev->driver_data;
A_ASSERT(pHcidevInfo != NULL);
AR_DEBUG_PRINTF(ATH_DEBUG_HCI_SEND, ("+bt_send_frame type: %d \n",bt_cb(skb)->pkt_type));
type = HCI_COMMAND_TYPE;
switch (bt_cb(skb)->pkt_type) {
case HCI_COMMAND_PKT:
type = HCI_COMMAND_TYPE;
hdev->stat.cmd_tx++;
break;
case HCI_ACLDATA_PKT:
type = HCI_ACL_TYPE;
hdev->stat.acl_tx++;
break;
case HCI_SCODATA_PKT:
/* we don't support SCO over the bridge */
kfree_skb(skb);
return 0;
default:
A_ASSERT(FALSE);
kfree_skb(skb);
return 0;
}
if (AR_DEBUG_LVL_CHECK(ATH_DEBUG_HCI_DUMP)) {
AR_DEBUG_PRINTF(ATH_DEBUG_ANY,(">>> Send HCI %s packet len: %d\n",
(type == HCI_COMMAND_TYPE) ? "COMMAND" : "ACL",
skb->len));
if (type == HCI_COMMAND_TYPE) {
A_UINT16 opcode = HCI_GET_OP_CODE(skb->data);
AR_DEBUG_PRINTF(ATH_DEBUG_ANY,(" HCI Command: OGF:0x%X OCF:0x%X \r\n",
opcode >> 10, opcode & 0x3FF));
}
AR_DEBUG_PRINTBUF(skb->data,skb->len,"BT HCI SEND Packet Dump");
}
/* Api_WMIInitFinish - implements common code for sending default wmi commands
* to target.
* This should be called after Api_InitFinish().
* A_VOID *pCxt - the driver context.
*****************************************************************************/
A_VOID
Api_WMIInitFinish(A_VOID *pCxt)
{
A_DRIVER_CONTEXT *pDCxt = GET_DRIVER_COMMON(pCxt);
A_STATUS status;
WMI_ALLOW_AGGR_CMD allow_aggr_cmd;
if(pDCxt->wmiReady == A_TRUE)
{
do{
status = STACK_INIT(pCxt);
if(status == A_OK){
CUSTOM_WAIT_FOR_WMI_RESPONSE(pCxt);
break;
}else if(status == A_NO_MEMORY){
pDCxt->tx_complete_pend = A_TRUE;
if(A_OK != CUSTOM_DRIVER_WAIT_FOR_CONDITION(pCxt, &(pDCxt->tx_complete_pend), A_FALSE, 5000)){
A_ASSERT(0);
}
}else{
A_ASSERT(0);
}
}while(1);
/* issue some default WMI commands appropriate for most systems */
#if WLAN_CONFIG_IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN
wmi_cmd_process(pCxt, WMI_SET_POWER_PARAMS_CMDID, &default_power_param, sizeof(WMI_POWER_PARAMS_CMD));
#endif
wmi_cmd_process(pCxt, WMI_SET_SCAN_PARAMS_CMDID, &default_scan_param, sizeof(WMI_SCAN_PARAMS_CMD));
wmi_cmd_process(pCxt, WMI_STORERECALL_CONFIGURE_CMDID,
&default_strrcl_config_cmd, sizeof(WMI_STORERECALL_CONFIGURE_CMD));
pDCxt->strrclState = STRRCL_ST_INIT;
/* technically this call to wmi_allow_aggr_cmd is not necessary if both
* masks are 0 as the firmware has 0,0 as the default. */
allow_aggr_cmd.tx_allow_aggr = A_CPU2LE16(pDCxt->txAggrTidMask);
allow_aggr_cmd.rx_allow_aggr = A_CPU2LE16(pDCxt->rxAggrTidMask);
wmi_cmd_process(pCxt, WMI_ALLOW_AGGR_CMDID, &allow_aggr_cmd, sizeof(WMI_ALLOW_AGGR_CMD));
#if ENABLE_P2P_MODE
if(WLAN_NUM_OF_DEVICES == 2) {
/* Device-0 is P2P Device and Device-1 is Legacy STA.\
Set Default P2P Params
*/
wmi_cmd_process(pCxt,WMI_P2P_SET_CONFIG_CMDID,&default_p2p_config,sizeof(WMI_P2P_FW_SET_CONFIG_CMD));
}
#endif
/* Set the BSS Filter to None. If this is not set, by default the firmware
sets to forward the beacons to host. This causes unnecessary BSSINFO events in
the host even after connecting to the AP */
wmi_bssfilter_cmd(pDCxt->pWmiCxt, NONE_BSS_FILTER, 0);
}
}
A_BOOL htc_get_endpoint_statistics(HTC_HANDLE HTCHandle,
HTC_ENDPOINT_ID Endpoint,
HTC_ENDPOINT_STAT_ACTION Action,
HTC_ENDPOINT_STATS *pStats)
{
#ifdef HTC_EP_STAT_PROFILING
HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
A_BOOL clearStats = false;
A_BOOL sample = false;
switch (Action) {
case HTC_EP_STAT_SAMPLE:
sample = true;
break;
case HTC_EP_STAT_SAMPLE_AND_CLEAR:
sample = true;
clearStats = true;
break;
case HTC_EP_STAT_CLEAR:
clearStats = true;
break;
default:
break;
}
A_ASSERT(Endpoint < ENDPOINT_MAX);
/* lock out TX and RX while we sample and/or clear */
LOCK_HTC_TX(target);
LOCK_HTC_RX(target);
if (sample) {
A_ASSERT(pStats != NULL);
/* return the stats to the caller */
A_MEMCPY(pStats, &target->EndPoint[Endpoint].EndPointStats,
sizeof(HTC_ENDPOINT_STATS));
}
if (clearStats) {
/* reset stats */
A_MEMZERO(&target->EndPoint[Endpoint].EndPointStats,
sizeof(HTC_ENDPOINT_STATS));
}
UNLOCK_HTC_RX(target);
UNLOCK_HTC_TX(target);
return true;
#else
return false;
#endif
}
static int DevServiceErrorInterrupt(AR6K_DEVICE *pDev)
{
int status;
u8 error_int_status;
u8 regBuffer[4];
AR_DEBUG_PRINTF(ATH_DEBUG_IRQ, ("Error Interrupt\n"));
error_int_status = pDev->IrqProcRegisters.error_int_status & 0x0F;
A_ASSERT(error_int_status);
AR_DEBUG_PRINTF(ATH_DEBUG_IRQ,
("Valid interrupt source(s) in ERROR_INT_STATUS: 0x%x\n",
error_int_status));
if (ERROR_INT_STATUS_WAKEUP_GET(error_int_status)) {
/* Wakeup */
AR_DEBUG_PRINTF(ATH_DEBUG_IRQ, ("Error : Wakeup\n"));
}
if (ERROR_INT_STATUS_RX_UNDERFLOW_GET(error_int_status)) {
/* Rx Underflow */
AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Error : Rx Underflow\n"));
}
if (ERROR_INT_STATUS_TX_OVERFLOW_GET(error_int_status)) {
/* Tx Overflow */
AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Error : Tx Overflow\n"));
}
/* Clear the interrupt */
pDev->IrqProcRegisters.error_int_status &= ~error_int_status; /* W1C */
/* set up the register transfer buffer to hit the register 4 times , this is done
* to make the access 4-byte aligned to mitigate issues with host bus interconnects that
* restrict bus transfer lengths to be a multiple of 4-bytes */
/* set W1C value to clear the interrupt, this hits the register first */
regBuffer[0] = error_int_status;
/* the remaining 4 values are set to zero which have no-effect */
regBuffer[1] = 0;
regBuffer[2] = 0;
regBuffer[3] = 0;
status = HIFReadWrite(pDev->HIFDevice,
ERROR_INT_STATUS_ADDRESS,
regBuffer,
4,
HIF_WR_SYNC_BYTE_FIX,
NULL);
A_ASSERT(status == 0);
return status;
}
static void CopyChunkToBinCache(AR6K_BIN_CACHE_INFO *pCache,
A_UINT8 *pChunk,
A_UINT32 Length)
{
A_ASSERT(!pCache->Static);
if ((pCache->ActualLength + Length) > Length &&
(pCache->ActualLength + Length) < pCache->MaxLength) {
A_MEMCPY(&pCache->pData[pCache->ActualLength],pChunk,Length);
pCache->ActualLength += Length;
} else {
A_ASSERT(FALSE);
}
}
// -------------------------------------------------------------------------------------------------------
Bool AllocatorMT::Free( void* ptr )
{
UInt32 threadID = (UInt32)GetCurrentThreadId();
MemPool* pool = FindPool(threadID);
A_ASSERT(pool != 0, "Try to free a pointer which not in this thread!");
return pool->Free(ptr);
}
static int DevServiceDebugInterrupt(AR6K_DEVICE *pDev)
{
u32 dummy;
int status;
/* Send a target failure event to the application */
AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Target debug interrupt\n"));
if (pDev->TargetFailureCallback != NULL) {
pDev->TargetFailureCallback(pDev->HTCContext);
}
if (pDev->GMboxEnabled) {
DevNotifyGMboxTargetFailure(pDev);
}
/* clear the interrupt , the debug error interrupt is
* counter 0 */
/* read counter to clear interrupt */
status = HIFReadWrite(pDev->HIFDevice,
COUNT_DEC_ADDRESS,
(u8 *)&dummy,
4,
HIF_RD_SYNC_BYTE_INC,
NULL);
A_ASSERT(status == 0);
return status;
}
/* clean up scatter support */
void CleanupHIFScatterResources(struct hif_device *device)
{
struct hif_scatter_req_priv *pReqPriv;
struct hif_scatter_req *pReq;
/* empty the free list */
while (1) {
pReq = AllocScatterReq(device);
if (NULL == pReq) {
break;
}
pReqPriv = (struct hif_scatter_req_priv *)pReq->HIFPrivate[0];
A_ASSERT(pReqPriv != NULL);
if (pReqPriv->busrequest != NULL) {
pReqPriv->busrequest->pScatterReq = NULL;
/* free bus request */
hifFreeBusRequest(device, pReqPriv->busrequest);
pReqPriv->busrequest = NULL;
}
if (pReqPriv->pHifScatterReq != NULL) {
kfree(pReqPriv->pHifScatterReq);
pReqPriv->pHifScatterReq = NULL;
}
kfree(pReqPriv);
}
}
/* clean up scatter support */
void CleanupHIFScatterResources(HIF_DEVICE *device)
{
HIF_SCATTER_REQ_PRIV *pReqPriv;
HIF_SCATTER_REQ *pReq;
/* empty the free list */
while (1) {
pReq = AllocScatterReq(device);
if (NULL == pReq) {
break;
}
pReqPriv = (HIF_SCATTER_REQ_PRIV *)pReq->HIFPrivate[0];
A_ASSERT(pReqPriv != NULL);
if (pReqPriv->busrequest != NULL) {
pReqPriv->busrequest->pScatterReq = NULL;
/* free bus request */
hifFreeBusRequest(device, pReqPriv->busrequest);
pReqPriv->busrequest = NULL;
}
if (pReqPriv->pHifScatterReq != NULL) {
A_FREE(pReqPriv->pHifScatterReq);
pReqPriv->pHifScatterReq = NULL;
}
A_FREE(pReqPriv);
}
}
A_STATUS
BMIWriteSOCRegister(A_VOID *pCxt,
A_UINT32 address,
A_UINT32 param)
{
A_UINT32 cid;
A_STATUS status;
A_UINT32 offset, temp;
A_ASSERT(BMI_COMMAND_FITS(sizeof(cid) + sizeof(address) + sizeof(param)));
memset (pBMICmdBuf, 0, sizeof(cid) + sizeof(address) + sizeof(param));
if (bmiDone) {
return A_ERROR;
}
cid = A_CPU2LE32(BMI_WRITE_SOC_REGISTER);
offset = 0;
A_MEMCPY(&(pBMICmdBuf[offset]), &cid, sizeof(cid));
offset += sizeof(cid);
temp = A_CPU2LE32(address);
A_MEMCPY(&(pBMICmdBuf[offset]), &temp, sizeof(address));
offset += sizeof(address);
A_MEMCPY(&(pBMICmdBuf[offset]), ¶m, sizeof(param));
offset += sizeof(param);
status = bmiBufferSend(pCxt, pBMICmdBuf, offset);
if (status != A_OK) {
return A_ERROR;
}
return A_OK;
}
/* status look up based on current state */
A_UINT32 GetMTEStatus()
{
switch (g_WifiMTE.TestState) {
case TEST_STATE_WAIT_WMI_READY :
DBG_LOG_PRINT(DBG_ZONE_ERR, ("status: MTE_WIFI_STATUS_BOOT_FAILED \r\n"));
return MTE_WIFI_STATUS_BOOT_FAILED;
case TEST_STATE_WAIT_WMI_CONNECT :
DBG_LOG_PRINT(DBG_ZONE_ERR, ("status: MTE_WIFI_STATUS_ASSOC_FAILED \r\n"));
return MTE_WIFI_STATUS_ASSOC_FAILED;
case TEST_WAIT_DHCP_REPLY :
DBG_LOG_PRINT(DBG_ZONE_ERR, ("status: MTE_WIFI_STATUS_DHCP_FAILED \r\n"));
return MTE_WIFI_STATUS_DHCP_FAILED;
case TEST_WAIT_WMI_STATS:
DBG_LOG_PRINT(DBG_ZONE_ERR, ("status: MTE_WIFI_STATUS_WMI_FAILED \r\n"));
return MTE_WIFI_STATUS_WMI_FAILED;
case TEST_END_SUCCESS:
DBG_LOG_PRINT(DBG_ZONE_ERR, ("status: MTE_WIFI_STATUS_SUCCESS \r\n"));
return MTE_WIFI_STATUS_SUCCESS;
case TEST_GEN_FAILURE:
DBG_LOG_PRINT(DBG_ZONE_ERR, ("status: MTE_WIFI_STATUS_FAILED \r\n"));
return MTE_WIFI_STATUS_FAILED;
default:
A_ASSERT(FALSE);
break;
}
return MTE_WIFI_STATUS_FAILED;
}
static void ar6000_hci_send_complete(void *pContext, HTC_PACKET *pPacket)
{
AR6K_HCI_BRIDGE_INFO *pHcidevInfo = (AR6K_HCI_BRIDGE_INFO *)pContext;
void *osbuf = pPacket->pPktContext;
A_ASSERT(osbuf != NULL);
A_ASSERT(pHcidevInfo != NULL);
if (A_FAILED(pPacket->Status)) {
if ((pPacket->Status != A_ECANCELED) && (pPacket->Status != A_NO_RESOURCE)) {
AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("HCI Bridge: Send Packet Failed: %d \n",pPacket->Status));
}
}
FreeHTCStruct(pHcidevInfo,pPacket);
FreeBtOsBuf(pHcidevInfo,osbuf);
}
A_STATUS
BMIWriteMemory(A_VOID *pCxt,
A_UINT32 address,
A_UCHAR *buffer,
A_UINT32 length)
{
A_UINT32 cid;
A_UINT32 remaining, txlen, temp;
const A_UINT32 header = sizeof(cid) + sizeof(address) + sizeof(length);
//A_UCHAR alignedBuffer[BMI_DATASZ_MAX];
A_UCHAR *src;
A_UINT8 *ptr;
A_ASSERT(BMI_COMMAND_FITS(BMI_DATASZ_MAX + header));
memset (pBMICmdBuf, 0, BMI_DATASZ_MAX + header);
if (bmiDone) {
return A_ERROR;
}
cid = A_CPU2LE32(BMI_WRITE_MEMORY);
remaining = length;
while (remaining)
{
src = &buffer[length - remaining];
if (remaining < (BMI_DATASZ_MAX - header)) {
if (remaining & 3) {
/* align it with 4 bytes */
remaining = remaining + (4 - (remaining & 3));
//memcpy(alignedBuffer, src, remaining);
//src = alignedBuffer;
}
txlen = remaining;
} else {
txlen = (BMI_DATASZ_MAX - header);
}
ptr = pBMICmdBuf;
A_MEMCPY(ptr, &cid, sizeof(cid));
ptr += sizeof(cid);
temp = A_CPU2LE32(address);
A_MEMCPY(ptr, &temp, sizeof(address));
ptr += sizeof(address);
temp = A_CPU2LE32(txlen);
A_MEMCPY(ptr, &temp, sizeof(txlen));
ptr += sizeof(txlen);
A_MEMCPY(ptr, src, txlen);
ptr += txlen;
if(A_OK != bmiBufferSend(pCxt, pBMICmdBuf, (A_UINT32)(ptr-pBMICmdBuf))){
return A_ERROR;
}
remaining -= txlen; address += txlen;
}
return A_OK;
}
/* set HTC/Mbox operational parameters, this can only be called when the target is in the
* BMI phase */
A_STATUS ar6000_set_htc_params(HIF_DEVICE *hifDevice,
A_UINT32 TargetType,
A_UINT32 MboxIsrYieldValue,
A_UINT8 HtcControlBuffers)
{
A_STATUS status;
A_UINT32 blocksizes[HTC_MAILBOX_NUM_MAX];
do {
/* get the block sizes */
status = HIFConfigureDevice(hifDevice, HIF_DEVICE_GET_MBOX_BLOCK_SIZE,
blocksizes, sizeof(blocksizes));
if (A_FAILED(status)) {
AR_DEBUG_PRINTF(ATH_LOG_ERR,("Failed to get block size info from HIF layer...\n"));
break;
}
/* note: we actually get the block size for mailbox 1, for SDIO the block
* size on mailbox 0 is artificially set to 1 */
/* must be a power of 2 */
A_ASSERT((blocksizes[1] & (blocksizes[1] - 1)) == 0);
if (HtcControlBuffers != 0) {
/* set override for number of control buffers to use */
blocksizes[1] |= ((A_UINT32)HtcControlBuffers) << 16;
}
/* set the host interest area for the block size */
status = BMIWriteMemory(hifDevice,
HOST_INTEREST_ITEM_ADDRESS(TargetType, hi_mbox_io_block_sz),
(A_UCHAR *)&blocksizes[1],
4);
if (A_FAILED(status)) {
AR_DEBUG_PRINTF(ATH_LOG_ERR,("BMIWriteMemory for IO block size failed \n"));
break;
}
AR_DEBUG_PRINTF(ATH_LOG_INF,("Block Size Set: %d (target address:0x%X)\n",
blocksizes[1], HOST_INTEREST_ITEM_ADDRESS(TargetType, hi_mbox_io_block_sz)));
if (MboxIsrYieldValue != 0) {
/* set the host interest area for the mbox ISR yield limit */
status = BMIWriteMemory(hifDevice,
HOST_INTEREST_ITEM_ADDRESS(TargetType, hi_mbox_isr_yield_limit),
(A_UCHAR *)&MboxIsrYieldValue,
4);
if (A_FAILED(status)) {
AR_DEBUG_PRINTF(ATH_LOG_ERR,("BMIWriteMemory for yield limit failed \n"));
break;
}
}
} while (FALSE);
return status;
}
int
BMIGetTargetInfo(struct hif_device *device, struct bmi_target_info *targ_info)
{
int status;
u32 cid;
if (bmiDone) {
AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
return A_ERROR;
}
AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Get Target Info: Enter (device: 0x%p)\n", device));
cid = BMI_GET_TARGET_INFO;
status = bmiBufferSend(device, (u8 *)&cid, sizeof(cid));
if (status) {
AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
return A_ERROR;
}
status = bmiBufferReceive(device, (u8 *)&targ_info->target_ver,
sizeof(targ_info->target_ver), true);
if (status) {
AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read Target Version from the device\n"));
return A_ERROR;
}
if (targ_info->target_ver == TARGET_VERSION_SENTINAL) {
/* Determine how many bytes are in the Target's targ_info */
status = bmiBufferReceive(device, (u8 *)&targ_info->target_info_byte_count,
sizeof(targ_info->target_info_byte_count), true);
if (status) {
AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read Target Info Byte Count from the device\n"));
return A_ERROR;
}
/*
* The Target's targ_info doesn't match the Host's targ_info.
* We need to do some backwards compatibility work to make this OK.
*/
A_ASSERT(targ_info->target_info_byte_count == sizeof(*targ_info));
/* Read the remainder of the targ_info */
status = bmiBufferReceive(device,
((u8 *)targ_info)+sizeof(targ_info->target_info_byte_count),
sizeof(*targ_info)-sizeof(targ_info->target_info_byte_count), true);
if (status) {
AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read Target Info (%d bytes) from the device\n",
targ_info->target_info_byte_count));
return A_ERROR;
}
}
AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Get Target Info: Exit (ver: 0x%x type: 0x%x)\n",
targ_info->target_ver, targ_info->target_type));
return 0;
}
extern "C" void ar6k_rx(void *Context, HTC_PACKET *pPacket)
{
CAR6KMini *Adapter = (CAR6KMini *)Context;
struct ndis_mini_buf_t * skb = (struct ndis_mini_buf_t *)pPacket->pPktContext;
A_STATUS status = pPacket->Status;
HTC_ENDPOINT_ID ept = pPacket->Endpoint;
NDIS_DEBUG_PRINTF(0, " %s() + Enter \r\n",__FUNCTION__);
A_ASSERT((status != A_OK) ||
(pPacket->pBuffer == (A_NETBUF_DATA(skb) + HTC_HEADER_LEN)));
Adapter->m_RxBuffers[ept]--;
if (A_SUCCESS(status))
{
Adapter->Lock();
A_NETBUF_PUT(skb, pPacket->ActualLength + HTC_HEADER_LEN);
A_NETBUF_PULL(skb, HTC_HEADER_LEN);
Adapter->Unlock();
}
if (status != A_OK)
{
A_NETBUF_FREE(skb);
}
else if (Adapter->m_WMIEnabled == TRUE)
{
if (ept == Adapter->m_ControlEp)
{
/*
* this is a wmi control msg
*/
//wmi_control_rx((wmi_t *)ar->arWmi, skb, ar->arPhyCapability); /* Bug 82893 */
Adapter->ReceiveWMIControlPacket(pPacket);
}
else
{
// WMI Data packet (e.g. IP data packet)
Adapter->ReceiveWMIDataPacket(pPacket);
}
}
if (status != A_ECANCELED)
{
/*
* HTC provides A_ECANCELED status when it doesn't want to be refilled
* (probably due to a shutdown)
*/
Adapter->AR6KRxRefill(ept);
}
NDIS_DEBUG_PRINTF(0, "%s() -Exit \r\n", __FUNCTION__);
}
/**** WMI Callbacks *******/
void ar6000_ready_event(A_UINT8 *MacAddress, A_UINT8 phyCap)
{
A_ASSERT(!g_WifiMTE.WMIReady);
A_MEMCPY(g_WifiMTE.Macaddr, MacAddress,ATH_MAC_LEN);
g_WifiMTE.WMIReady = TRUE;
SetMacForDHCP(g_WifiMTE.Macaddr);
DBG_LOG_PRINT(DBG_ZONE_INIT, ("WMI Ready! MAC Address: %x:%x:%x:%x:%x:%x\r\n",
g_WifiMTE.Macaddr[0],g_WifiMTE.Macaddr[1],g_WifiMTE.Macaddr[2],g_WifiMTE.Macaddr[3],g_WifiMTE.Macaddr[4],g_WifiMTE.Macaddr[5]));
}
int
BMIrompatchInstall(struct hif_device *device,
u32 ROM_addr,
u32 RAM_addr,
u32 nbytes,
u32 do_activate,
u32 *rompatch_id)
{
u32 cid;
int status;
u32 offset;
A_ASSERT(BMI_COMMAND_FITS(sizeof(cid) + sizeof(ROM_addr) + sizeof(RAM_addr) +
sizeof(nbytes) + sizeof(do_activate)));
memset(pBMICmdBuf, 0, sizeof(cid) + sizeof(ROM_addr) + sizeof(RAM_addr) +
sizeof(nbytes) + sizeof(do_activate));
if (bmiDone) {
AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
return A_ERROR;
}
AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
("BMI rompatch Install: Enter (device: 0x%p, ROMaddr: 0x%x, RAMaddr: 0x%x length: %d activate: %d)\n",
device, ROM_addr, RAM_addr, nbytes, do_activate));
cid = BMI_ROMPATCH_INSTALL;
offset = 0;
memcpy(&(pBMICmdBuf[offset]), &cid, sizeof(cid));
offset += sizeof(cid);
memcpy(&(pBMICmdBuf[offset]), &ROM_addr, sizeof(ROM_addr));
offset += sizeof(ROM_addr);
memcpy(&(pBMICmdBuf[offset]), &RAM_addr, sizeof(RAM_addr));
offset += sizeof(RAM_addr);
memcpy(&(pBMICmdBuf[offset]), &nbytes, sizeof(nbytes));
offset += sizeof(nbytes);
memcpy(&(pBMICmdBuf[offset]), &do_activate, sizeof(do_activate));
offset += sizeof(do_activate);
status = bmiBufferSend(device, pBMICmdBuf, offset);
if (status) {
AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
return A_ERROR;
}
status = bmiBufferReceive(device, pBMICmdBuf, sizeof(*rompatch_id), true);
if (status) {
AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read from the device\n"));
return A_ERROR;
}
memcpy(rompatch_id, pBMICmdBuf, sizeof(*rompatch_id));
AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI rompatch Install: (rompatch_id=%d)\n", *rompatch_id));
return 0;
}
int
BMIReadMemory(struct hif_device *device,
u32 address,
u8 *buffer,
u32 length)
{
u32 cid;
int status;
u32 offset;
u32 remaining, rxlen;
A_ASSERT(BMI_COMMAND_FITS(BMI_DATASZ_MAX + sizeof(cid) + sizeof(address) + sizeof(length)));
memset (pBMICmdBuf, 0, BMI_DATASZ_MAX + sizeof(cid) + sizeof(address) + sizeof(length));
if (bmiDone) {
AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
return A_ERROR;
}
AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
("BMI Read Memory: Enter (device: 0x%p, address: 0x%x, length: %d)\n",
device, address, length));
cid = BMI_READ_MEMORY;
remaining = length;
while (remaining)
{
rxlen = (remaining < BMI_DATASZ_MAX) ? remaining : BMI_DATASZ_MAX;
offset = 0;
memcpy(&(pBMICmdBuf[offset]), &cid, sizeof(cid));
offset += sizeof(cid);
memcpy(&(pBMICmdBuf[offset]), &address, sizeof(address));
offset += sizeof(address);
memcpy(&(pBMICmdBuf[offset]), &rxlen, sizeof(rxlen));
offset += sizeof(length);
status = bmiBufferSend(device, pBMICmdBuf, offset);
if (status) {
AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to write to the device\n"));
return A_ERROR;
}
status = bmiBufferReceive(device, pBMICmdBuf, rxlen, true);
if (status) {
AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to read from the device\n"));
return A_ERROR;
}
memcpy(&buffer[length - remaining], pBMICmdBuf, rxlen);
remaining -= rxlen; address += rxlen;
}
AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI Read Memory: Exit\n"));
return 0;
}
static
A_STATUS wmi_cmd_process(A_VOID *pCxt, WMI_COMMAND_ID cmd, A_CONST A_VOID *pParam, A_UINT16 length)
{
A_STATUS status;
A_DRIVER_CONTEXT *pDCxt = GET_DRIVER_COMMON(pCxt);
status = wmi_cmd_start(pDCxt->pWmiCxt, pParam, cmd, length);
if(status == A_NO_MEMORY){
pDCxt->tx_complete_pend = A_TRUE;
if(A_OK != CUSTOM_DRIVER_WAIT_FOR_CONDITION(pCxt, &(pDCxt->tx_complete_pend), A_FALSE, 5000)){
A_ASSERT(0);
}
}else if(status != A_OK){
A_ASSERT(0);
}
return status;
}
static void ar6000_hci_transport_removed(void *pContext)
{
AR6K_HCI_BRIDGE_INFO *pHcidevInfo = (AR6K_HCI_BRIDGE_INFO *)pContext;
AR_DEBUG_PRINTF(ATH_DEBUG_HCI_BRIDGE, ("HCI Bridge: transport removed. \n"));
A_ASSERT(pHcidevInfo->pHCIDev != NULL);
HCI_TransportDetach(pHcidevInfo->pHCIDev);
bt_cleanup_hci(pHcidevInfo);
pHcidevInfo->pHCIDev = NULL;
}
A_STATUS HTCAddReceivePktMultiple(HTC_HANDLE HTCHandle, HTC_PACKET_QUEUE *pPktQueue)
{
HTC_TARGET *target = GET_HTC_TARGET_FROM_HANDLE(HTCHandle);
HTC_ENDPOINT *pEndpoint;
HTC_PACKET *pFirstPacket;
A_STATUS status = A_OK;
HTC_PACKET *pPacket;
pFirstPacket = HTC_GET_PKT_AT_HEAD(pPktQueue);
if (NULL == pFirstPacket) {
A_ASSERT(FALSE);
return A_EINVAL;
}
AR_DEBUG_ASSERT(pFirstPacket->Endpoint < ENDPOINT_MAX);
AR_DEBUG_PRINTF(ATH_DEBUG_RECV,
("+- HTCAddReceivePktMultiple : endPointId: %d, cnt:%d, length: %d\n",
pFirstPacket->Endpoint,
HTC_PACKET_QUEUE_DEPTH(pPktQueue),
pFirstPacket->BufferLength));
pEndpoint = &target->EndPoint[pFirstPacket->Endpoint];
LOCK_HTC_RX(target);
do {
if (HTC_STOPPING(target)) {
status = A_ERROR;
break;
}
/* store receive packets */
HTC_PACKET_QUEUE_TRANSFER_TO_TAIL(&pEndpoint->RxBufferHoldQueue,pPktQueue);
} while (FALSE);
UNLOCK_HTC_RX(target);
if (A_FAILED(status)) {
/* walk through queue and mark each one canceled */
HTC_PACKET_QUEUE_ITERATE_ALLOW_REMOVE(pPktQueue,pPacket) {
pPacket->Status = A_ECANCELED;
} HTC_PACKET_QUEUE_ITERATE_END;
DoRecvCompletion(pEndpoint,pPktQueue);
}
return status;
}
A_STATUS
BMIGetTargetInfo(A_VOID *pCxt, struct bmi_target_info *targ_info)
{
A_UINT32 cid;
if (bmiDone) {
return A_ERROR;
}
cid = A_CPU2LE32(BMI_GET_TARGET_INFO);
if(A_OK != bmiBufferSend(pCxt, (A_UCHAR *)&cid, sizeof(cid))){
return A_ERROR;
}
if(A_OK != bmiBufferReceive(pCxt, (A_UCHAR *)&targ_info->target_ver,
sizeof(targ_info->target_ver), TRUE)){
return A_ERROR;
}
targ_info->target_ver = A_LE2CPU32(targ_info->target_ver);
if (targ_info->target_ver == TARGET_VERSION_SENTINAL) {
/* Determine how many bytes are in the Target's targ_info */
if(A_OK != bmiBufferReceive(pCxt, (A_UCHAR *)&targ_info->target_info_byte_count,
sizeof(targ_info->target_info_byte_count), TRUE)){
return A_ERROR;
}
targ_info->target_info_byte_count = A_LE2CPU32(targ_info->target_info_byte_count);
/*
* The Target's targ_info doesn't match the Host's targ_info.
* We need to do some backwards compatibility work to make this OK.
*/
A_ASSERT(targ_info->target_info_byte_count == sizeof(*targ_info));
/* Read the remainder of the targ_info */
if(A_OK != bmiBufferReceive(pCxt,
((A_UCHAR *)targ_info)+sizeof(targ_info->target_info_byte_count),
sizeof(*targ_info)-sizeof(targ_info->target_info_byte_count), TRUE)){
return A_ERROR;
}
targ_info->target_ver = A_LE2CPU32(targ_info->target_ver);
targ_info->target_type = A_LE2CPU32(targ_info->target_type);
} else {
return A_ERROR;
}
return A_OK;
}
A_STATUS DevCopyScatterListToFromDMABuffer(HIF_SCATTER_REQ *pReq, A_BOOL FromDMA)
{
A_UINT8 *pDMABuffer = NULL;
int i, remaining;
A_UINT32 length;
pDMABuffer = pReq->pScatterBounceBuffer;
if (pDMABuffer == NULL) {
A_ASSERT(FALSE);
return A_EINVAL;
}
remaining = (int)pReq->TotalLength;
for (i = 0; i < pReq->ValidScatterEntries; i++) {
length = min((int)pReq->ScatterList[i].Length, remaining);
if (length != (int)pReq->ScatterList[i].Length) {
A_ASSERT(FALSE);
/* there is a problem with the scatter list */
return A_EINVAL;
}
if (FromDMA) {
/* from DMA buffer */
A_MEMCPY(pReq->ScatterList[i].pBuffer, pDMABuffer , length);
} else {
/* to DMA buffer */
A_MEMCPY(pDMABuffer, pReq->ScatterList[i].pBuffer, length);
}
pDMABuffer += length;
remaining -= length;
}
return A_OK;
}
int DevCopyScatterListToFromDMABuffer(struct hif_scatter_req *pReq, bool FromDMA)
{
u8 *pDMABuffer = NULL;
int i, remaining;
u32 length;
pDMABuffer = pReq->pScatterBounceBuffer;
if (pDMABuffer == NULL) {
A_ASSERT(false);
return A_EINVAL;
}
remaining = (int)pReq->TotalLength;
for (i = 0; i < pReq->ValidScatterEntries; i++) {
length = min((int)pReq->ScatterList[i].Length, remaining);
if (length != (int)pReq->ScatterList[i].Length) {
A_ASSERT(false);
/* there is a problem with the scatter list */
return A_EINVAL;
}
if (FromDMA) {
/* from DMA buffer */
memcpy(pReq->ScatterList[i].pBuffer, pDMABuffer , length);
} else {
/* to DMA buffer */
memcpy(pDMABuffer, pReq->ScatterList[i].pBuffer, length);
}
pDMABuffer += length;
remaining -= length;
}
return 0;
}
// -------------------------------------------------------------------------------------------------------
void* AllocatorMT::Alloc( SizeT size )
{
UInt32 threadID = (UInt32)GetCurrentThreadId();
MemPool* pool = FindPool(threadID);
if (pool == 0)
{
CreatePool(threadID);
pool = FindPool(threadID);
A_ASSERT(pool != 0, "Unable to create pool for this thread!");
}
return pool->Alloc(size);
}
A_STATUS
BMIrompatchInstall(HIF_DEVICE *device,
A_UINT32 ROM_addr,
A_UINT32 RAM_addr,
A_UINT32 nbytes,
A_UINT32 do_activate,
A_UINT32 *rompatch_id)
{
A_UINT32 cid;
A_STATUS status;
A_UINT32 offset,responseLen;
A_ASSERT(BMI_COMMAND_FITS(sizeof(cid) + sizeof(ROM_addr) + sizeof(RAM_addr) +
sizeof(nbytes) + sizeof(do_activate)));
memset(pBMICmdBuf, 0, sizeof(cid) + sizeof(ROM_addr) + sizeof(RAM_addr) +
sizeof(nbytes) + sizeof(do_activate));
if (bmiDone) {
AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Command disallowed\n"));
return A_ERROR;
}
AR_DEBUG_PRINTF(ATH_DEBUG_BMI,
("BMI rompatch Install: Enter (device: 0x%p, ROMaddr: 0x%x, RAMaddr: 0x%x length: %d activate: %d)\n",
device, ROM_addr, RAM_addr, nbytes, do_activate));
cid = BMI_ROMPATCH_INSTALL;
offset = 0;
A_MEMCPY(&(pBMICmdBuf[offset]), &cid, sizeof(cid));
offset += sizeof(cid);
A_MEMCPY(&(pBMICmdBuf[offset]), &ROM_addr, sizeof(ROM_addr));
offset += sizeof(ROM_addr);
A_MEMCPY(&(pBMICmdBuf[offset]), &RAM_addr, sizeof(RAM_addr));
offset += sizeof(RAM_addr);
A_MEMCPY(&(pBMICmdBuf[offset]), &nbytes, sizeof(nbytes));
offset += sizeof(nbytes);
A_MEMCPY(&(pBMICmdBuf[offset]), &do_activate, sizeof(do_activate));
offset += sizeof(do_activate);
responseLen = sizeof(*rompatch_id);
status = HIFExchangeBMIMsg(device, pBMICmdBuf, offset, pBMICmdBuf, &responseLen, BMI_EXCHANGE_TIMEOUT_MS);
if (status != A_OK) {
AR_DEBUG_PRINTF(ATH_DEBUG_ERR, ("Unable to install ROM patch\n"));
return A_ERROR;
}
A_MEMCPY(rompatch_id, pBMICmdBuf, sizeof(*rompatch_id));
AR_DEBUG_PRINTF(ATH_DEBUG_BMI, ("BMI rompatch Install: (rompatch_id=%d)\n", *rompatch_id));
return A_OK;
}