/** * * FeatureLeveling * * CPU feature leveling. Set least common features set of all CPUs * * @param[in,out] StdHeader - Pointer to AMD_CONFIG_PARAMS struct. * */ VOID FeatureLeveling ( IN OUT AMD_CONFIG_PARAMS *StdHeader ) { UINT32 BscSocket; UINT32 Ignored; UINT32 BscCoreNum; UINT32 Socket; UINT32 Core; UINT32 NumberOfSockets; UINT32 NumberOfCores; BOOLEAN *FirstTime; BOOLEAN *NeedLeveling; AGESA_STATUS IgnoredSts; CPU_FEATURES_LIST *globalCpuFeatureList; AP_TASK TaskPtr; ASSERT (IsBsp (StdHeader, &IgnoredSts)); GetGlobalCpuFeatureListAddress ((UINT64 **) &globalCpuFeatureList, StdHeader); FirstTime = (BOOLEAN *) ((UINT8 *) globalCpuFeatureList + sizeof (CPU_FEATURES_LIST)); NeedLeveling = (BOOLEAN *) ((UINT8 *) globalCpuFeatureList + sizeof (CPU_FEATURES_LIST) + sizeof (BOOLEAN)); *FirstTime = TRUE; *NeedLeveling = FALSE; LibAmdMemFill (globalCpuFeatureList, 0xFF, sizeof (CPU_FEATURES_LIST), StdHeader); IdentifyCore (StdHeader, &BscSocket, &Ignored, &BscCoreNum, &IgnoredSts); NumberOfSockets = GetPlatformNumberOfSockets (); TaskPtr.FuncAddress.PfApTaskI = SaveFeatures; TaskPtr.DataTransfer.DataSizeInDwords = SIZE_IN_DWORDS (CPU_FEATURES_LIST); TaskPtr.ExeFlags = WAIT_FOR_CORE; TaskPtr.DataTransfer.DataPtr = globalCpuFeatureList; TaskPtr.DataTransfer.DataTransferFlags = DATA_IN_MEMORY; for (Socket = 0; Socket < NumberOfSockets; Socket++) { if (IsProcessorPresent (Socket, StdHeader)) { if (Socket != BscSocket) { ApUtilRunCodeOnSocketCore ((UINT8)Socket, 0, &TaskPtr, StdHeader); } } } ApUtilTaskOnExecutingCore (&TaskPtr, StdHeader, NULL); if (*NeedLeveling) { TaskPtr.FuncAddress.PfApTaskI = WriteFeatures; for (Socket = 0; Socket < NumberOfSockets; Socket++) { if (GetActiveCoresInGivenSocket (Socket, &NumberOfCores, StdHeader)) { for (Core = 0; Core < NumberOfCores; Core++) { if ((Socket != BscSocket) || (Core != BscCoreNum)) { ApUtilRunCodeOnSocketCore ((UINT8)Socket, (UINT8)Core, &TaskPtr, StdHeader); } } } } ApUtilTaskOnExecutingCore (&TaskPtr, StdHeader, NULL); } }
/** * Runs the given task on all cores (including self) on the socket of the executing * core 0. * * This function is used to invoke all APs on the socket of the executing core 0 to * run a specified AGESA procedure. * * @param[in] TaskPtr Function descriptor * @param[in] StdHeader Config handle for library and services * */ VOID IdsApRunCodeOnAllLocalCores ( IN AP_TASK *TaskPtr, IN OUT AMD_CONFIG_PARAMS *StdHeader ) { UINT32 Core; UINT32 BscCoreNum; UINT32 Socket; UINT32 BscSocket; UINT32 IgnoredModule; UINT32 NumberOfCores; UINT32 NumberOfSockets; AGESA_STATUS IgnoredSts; IdentifyCore (StdHeader, &BscSocket, &IgnoredModule, &BscCoreNum, &IgnoredSts); NumberOfSockets = GetPlatformNumberOfSockets (); for (Socket = 0; Socket < NumberOfSockets; Socket++) { if (GetActiveCoresInGivenSocket (Socket, &NumberOfCores, StdHeader)) { for (Core = 0; Core < NumberOfCores; Core++) { if ((Socket != (UINT32) BscSocket) || (Core != (UINT32) BscCoreNum)) { ApUtilRunCodeOnSocketCore ((UINT8) Socket, (UINT8) Core, TaskPtr, StdHeader); } } } } // BSP codes ApUtilTaskOnExecutingCore (TaskPtr, StdHeader, NULL); }
/** * Family 15h Kaveri core 0 entry point for performing the necessary steps after * a warm reset has occurred. * * The steps are as follows: * * 1. Temp1=D18F5x170[SwNbPstateLoDis]. * 2. Temp2=D18F5x170[NbPstateDisOnP0]. * 3. Temp3=D18F5x170[NbPstateThreshold]. * 4. Temp4=D18F5x170[NbPstateGnbSlowDis]. * 5. If MSRC001_0070[NbPstate]=0, go to step 6. If MSRC001_0070[NbPstate]=1, go to step 11. * 6. Write 1 to D18F5x170[NbPstateGnbSlowDis]. * 7. Write 0 to D18F5x170[SwNbPstateLoDis, NbPstateDisOnP0, NbPstateThreshold]. * 8. Wait for D18F5x174[CurNbPstate] = D18F5x170[NbPstateLo] and D18F5x174[CurNbFid, CurNb- * Did]=[NbFid, NbDid] from D18F5x1[6C:60] indexed by D18F5x170[NbPstateLo]. * 9. Set D18F5x170[SwNbPstateLoDis]=1. * 10. Wait for D18F5x174[CurNbPstate] = D18F5x170[NbPstateHi] and D18F5x174[CurNbFid, CurNb- * Did]=[NbFid, NbDid] from D18F5x1[6C:60] indexed by D18F5x170[NbPstateHi]. Go to step 15. * 11. Write 1 to D18F5x170[SwNbPstateLoDis]. * 12. Wait for D18F5x174[CurNbPstate] = D18F5x170[NbPstateHi] and D18F5x174[CurNbFid, CurNb- * Did]=[NbFid, NbDid] from D18F5x1[6C:60] indexed by D18F5x170[NbPstateHi]. * 13. Write 0 to D18F5x170[SwNbPstateLoDis, NbPstateDisOnP0, NbPstateThreshold]. * 14. Wait for D18F5x174[CurNbPstate] = D18F5x170[NbPstateLo] and D18F5x174[CurNbFid, CurNb- * Did]=[NbFid, NbDid] from D18F5x1[6C:60] indexed by D18F5x170[NbPstateLo]. * 15. Set D18F5x170[SwNbPstateLoDis]=Temp1, D18F5x170[NbPstateDisOnP0]=Temp2, D18F5x170[NbP- * stateThreshold]=Temp3, and D18F5x170[NbPstateGnbSlowDis]=Temp4. * * @param[in] FamilySpecificServices The current Family Specific Services. * @param[in] CpuEarlyParamsPtr Service parameters * @param[in] StdHeader Config handle for library and services. * */ VOID F15KvPmNbAfterReset ( IN CPU_SPECIFIC_SERVICES *FamilySpecificServices, IN AMD_CPU_EARLY_PARAMS *CpuEarlyParamsPtr, IN AMD_CONFIG_PARAMS *StdHeader ) { UINT32 Socket; UINT32 Module; UINT32 Core; UINT32 TaskedCore; UINT32 Ignored; AP_TASK TaskPtr; AGESA_STATUS IgnoredSts; IDS_HDT_CONSOLE (CPU_TRACE, " F15KvPmNbAfterReset\n"); IdentifyCore (StdHeader, &Socket, &Module, &Core, &IgnoredSts); ASSERT (Core == 0); // Launch one core per node. TaskPtr.FuncAddress.PfApTask = F15KvPmNbAfterResetOnCore; TaskPtr.DataTransfer.DataSizeInDwords = 0; TaskPtr.ExeFlags = WAIT_FOR_CORE; for (Module = 0; Module < GetPlatformNumberOfModules (); Module++) { if (GetGivenModuleCoreRange (Socket, Module, &TaskedCore, &Ignored, StdHeader)) { if (TaskedCore != 0) { ApUtilRunCodeOnSocketCore ((UINT8) Socket, (UINT8) TaskedCore, &TaskPtr, StdHeader); } } } ApUtilTaskOnExecutingCore (&TaskPtr, StdHeader, (VOID *) CpuEarlyParamsPtr); }
/** * Multisocket BSC call to start all system core 0s to perform a standard AP_TASK. * * This function loops through all possible socket locations, starting core 0 of * each populated socket to perform the passed in AP_TASK. After starting all * other core 0s, the BSC will perform the AP_TASK as well. This must be run by * the system BSC only. * * @param[in] TaskPtr Function descriptor * @param[in] StdHeader Config handle for library and services * @param[in] ConfigParams AMD entry point's CPU parameter structure * */ VOID RunCodeOnAllSystemCore0sMulti ( IN AP_TASK *TaskPtr, IN AMD_CONFIG_PARAMS *StdHeader, IN VOID *ConfigParams ) { UINT32 BscSocket; UINT32 BscModule; UINT32 BscCoreNum; UINT8 Socket; UINT32 NumberOfSockets; AGESA_STATUS DummyStatus; ASSERT (IsBsp (StdHeader, &DummyStatus)); NumberOfSockets = GetPlatformNumberOfSockets (); IdentifyCore (StdHeader, &BscSocket, &BscModule, &BscCoreNum, &DummyStatus); for (Socket = 0; Socket < NumberOfSockets; Socket++) { if (Socket != BscSocket) { if (IsProcessorPresent (Socket, StdHeader)) { ApUtilRunCodeOnSocketCore (Socket, 0, TaskPtr, StdHeader); } } } ApUtilTaskOnExecutingCore (TaskPtr, StdHeader, ConfigParams); }
/** * Single socket BSC call to start all system core 0s to perform a standard AP_TASK. * * This function will simply invoke the task on the executing core. This must be * run by the system BSC only. * * @param[in] TaskPtr Function descriptor * @param[in] StdHeader Config handle for library and services * @param[in] ConfigParams AMD entry point's CPU parameter structure * */ VOID RunCodeOnAllSystemCore0sSingle ( IN AP_TASK *TaskPtr, IN AMD_CONFIG_PARAMS *StdHeader, IN VOID *ConfigParams ) { ApUtilTaskOnExecutingCore (TaskPtr, StdHeader, ConfigParams); }
/** * Single socket BSC call to start all system core 0s to perform a standard AP_TASK. * * This function will simply invoke the task on the executing core. This must be * run by the system BSC only. * * @param[in] TaskPtr Function descriptor * @param[in] StdHeader Config handle for library and services * @param[in] ConfigParams AMD entry point's CPU parameter structure * * @return The severe error code from AP_TASK * */ AGESA_STATUS RunCodeOnAllSystemCore0sSingle ( IN AP_TASK *TaskPtr, IN AMD_CONFIG_PARAMS *StdHeader, IN VOID *ConfigParams ) { AGESA_STATUS CalledStatus; CalledStatus = ApUtilTaskOnExecutingCore (TaskPtr, StdHeader, ConfigParams); return CalledStatus; }
/** * Family 15h Trinity core 0 entry point for performing the necessary steps after * a warm reset has occurred. * * The steps are as follows: * * 1. Temp1=D18F5x170[SwNbPstateLoDis]. * 2. Temp2=D18F5x170[NbPstateDisOnP0]. * 3. Temp3=D18F5x170[NbPstateThreshold]. * 4. Temp4=D18F5x170[NbPstateGnbSlowDis]. * 5. If MSRC001_0070[NbPstate]=0, go to step 6. If MSRC001_0070[NbPstate]=1, go to step 11. * 6. Write 1 to D18F5x170[NbPstateGnbSlowDis]. * 7. Write 0 to D18F5x170[SwNbPstateLoDis, NbPstateDisOnP0, NbPstateThreshold]. * 8. Wait for D18F5x174[CurNbPstate] = D18F5x170[NbPstateLo] and D18F5x174[CurNbFid, CurNb- * Did]=[NbFid, NbDid] from D18F5x1[6C:60] indexed by D18F5x170[NbPstateLo]. * 9. Set D18F5x170[SwNbPstateLoDis]=1. * 10. Wait for D18F5x174[CurNbPstate] = D18F5x170[NbPstateHi] and D18F5x174[CurNbFid, CurNb- * Did]=[NbFid, NbDid] from D18F5x1[6C:60] indexed by D18F5x170[NbPstateHi]. Go to step 15. * 11. Write 1 to D18F5x170[SwNbPstateLoDis]. * 12. Wait for D18F5x174[CurNbPstate] = D18F5x170[NbPstateHi] and D18F5x174[CurNbFid, CurNb- * Did]=[NbFid, NbDid] from D18F5x1[6C:60] indexed by D18F5x170[NbPstateHi]. * 13. Write 0 to D18F5x170[SwNbPstateLoDis, NbPstateDisOnP0, NbPstateThreshold]. * 14. Wait for D18F5x174[CurNbPstate] = D18F5x170[NbPstateLo] and D18F5x174[CurNbFid, CurNb- * Did]=[NbFid, NbDid] from D18F5x1[6C:60] indexed by D18F5x170[NbPstateLo]. * 15. Set D18F5x170[SwNbPstateLoDis]=Temp1, D18F5x170[NbPstateDisOnP0]=Temp2, D18F5x170[NbP- * stateThreshold]=Temp3, and D18F5x170[NbPstateGnbSlowDis]=Temp4. * * @param[in] FamilySpecificServices The current Family Specific Services. * @param[in] CpuEarlyParamsPtr Service parameters * @param[in] StdHeader Config handle for library and services. * */ VOID F15TnPmNbAfterReset ( IN CPU_SPECIFIC_SERVICES *FamilySpecificServices, IN AMD_CPU_EARLY_PARAMS *CpuEarlyParamsPtr, IN AMD_CONFIG_PARAMS *StdHeader ) { UINT32 Socket; UINT32 Module; UINT32 Core; UINT32 TaskedCore; UINT32 Ignored; AP_TASK TaskPtr; PCI_ADDR PciAddress; AGESA_STATUS IgnoredSts; LOCATE_HEAP_PTR Locate; IDS_HDT_CONSOLE (CPU_TRACE, " F15TnPmNbAfterReset\n"); IdentifyCore (StdHeader, &Socket, &Module, &Core, &IgnoredSts); ASSERT (Core == 0); if (FamilySpecificServices->IsNbPstateEnabled (FamilySpecificServices, &CpuEarlyParamsPtr->PlatformConfig, StdHeader)) { PciAddress.AddressValue = NB_PSTATE_CTRL_PCI_ADDR; Locate.BufferHandle = AMD_CPU_NB_PSTATE_FIXUP_HANDLE; if (HeapLocateBuffer (&Locate, StdHeader) == AGESA_SUCCESS) { LibAmdPciWrite (AccessWidth32, PciAddress, Locate.BufferPtr, StdHeader); } else { ASSERT (FALSE); } } // Launch one core per node. TaskPtr.FuncAddress.PfApTask = F15TnPmNbAfterResetOnCore; TaskPtr.DataTransfer.DataSizeInDwords = 0; TaskPtr.ExeFlags = WAIT_FOR_CORE; for (Module = 0; Module < GetPlatformNumberOfModules (); Module++) { if (GetGivenModuleCoreRange (Socket, Module, &TaskedCore, &Ignored, StdHeader)) { if (TaskedCore != 0) { ApUtilRunCodeOnSocketCore ((UINT8) Socket, (UINT8) TaskedCore, &TaskPtr, StdHeader); } } } ApUtilTaskOnExecutingCore (&TaskPtr, StdHeader, (VOID *) CpuEarlyParamsPtr); }
/** * Runs the given task on all cores (including self) on the socket of the executing * core 0. * * This function is used to invoke all APs on the socket of the executing core 0 to * run a specified AGESA procedure. * * @param[in] TaskPtr Function descriptor * @param[in] StdHeader Config handle for library and services * @param[in] CpuEarlyParamsPtr Required input parameters for early CPU initialization * */ VOID ApUtilRunCodeOnAllLocalCoresAtEarly ( IN AP_TASK *TaskPtr, IN AMD_CONFIG_PARAMS *StdHeader, IN AMD_CPU_EARLY_PARAMS *CpuEarlyParamsPtr ) { UINT32 Core; UINT32 Socket; UINT32 IgnoredModule; UINT32 IgnoredCore; UINT32 ActiveCores; AGESA_STATUS IgnoredSts; IdentifyCore (StdHeader, &Socket, &IgnoredModule, &IgnoredCore, &IgnoredSts); GetActiveCoresInCurrentSocket (&ActiveCores, StdHeader); for (Core = 1; Core < (UINT8) ActiveCores; ++Core) { ApUtilRunCodeOnSocketCore ((UINT8)Socket, (UINT8)Core, TaskPtr, StdHeader); } ApUtilTaskOnExecutingCore (TaskPtr, StdHeader, (VOID *) CpuEarlyParamsPtr); }