예제 #1
0
파일: bloom.c 프로젝트: pfq/PFQ
static int bloom_init(arguments_t args)
{
	unsigned int m = GET_ARG_0(unsigned int, args);
	size_t n = LEN_ARRAY_1(args);
	__be32 *ips = GET_ARRAY_1(__be32, args);
	__be32 mask;
	size_t i;

	char *mem;

	m = clp2(m);

	/* set bloom filter fold mask */

	SET_ARG_0(args, m-1);

	if (m > (1UL << 24)) {
		printk(KERN_INFO "[PFQ|init] bloom filter: maximum number of bins exceeded (2^24)!\n");
		return -EPERM;
	}

	mem = kzalloc(m >> 3, GFP_KERNEL);
	if (!mem) {
		printk(KERN_INFO "[PFQ|init] bloom filter: out of memory!\n");
		return -ENOMEM;
	}

	/* set bloom filter memory */

	SET_ARG_1(args, mem);

	mask = inet_make_mask(GET_ARG_2(int, args));

	/* set network mask */

	SET_ARG_2(args, mask);

	pr_devel("[PFQ|init] bloom filter@%p: k=4, n=%zu, m=%u size=%u netmask=%pI4 bytes.\n", mem, n, m, m>>3, &mask);

	for(i = 0; i < n; i++)
	{
		uint32_t h1 = hfun1(be32_to_cpu(ips[i] & mask)) & (m-1);
		uint32_t h2 = hfun2(be32_to_cpu(ips[i] & mask)) & (m-1);
		uint32_t h3 = hfun3(be32_to_cpu(ips[i] & mask)) & (m-1);
		uint32_t h4 = hfun4(be32_to_cpu(ips[i] & mask)) & (m-1);

		BF_SET(mem, h1);
		BF_SET(mem, h2);
		BF_SET(mem, h3);
		BF_SET(mem, h4);

		pr_devel("[PFQ|init] bloom filter: -> set address %pI4\n", ips+i);
	}

	return 0;
}
예제 #2
0
void imx233_lcdif_dma_send(void *buf, unsigned width, unsigned height)
{
#if IMX233_SUBTARGET >= 3780
    imx233_lcdif_enable_bus_master(true);
    HW_LCDIF_CUR_BUF = (uint32_t)buf;
    HW_LCDIF_TRANSFER_COUNT = BF_OR2(LCDIF_TRANSFER_COUNT, V_COUNT(height), H_COUNT(width));
    BF_SET(LCDIF_CTRL, DATA_SELECT);
    BF_SET(LCDIF_CTRL, RUN);
#endif
}
예제 #3
0
////////////////////////////////////////////////////////////////////////////////
//! See hw_lradc.h for details.
////////////////////////////////////////////////////////////////////////////////
void hw_lradc_EnableTouchDetectXDrive(bool bValue)
{
    if(bValue)
    {   //Enable the X-Drive
        BF_SET(LRADC_CTRL0, XMINUS_ENABLE);
        BF_SET(LRADC_CTRL0, XPLUS_ENABLE);
    }
    else
    {   // Disable the X-Drive
        BF_CLR(LRADC_CTRL0, XMINUS_ENABLE);
        BF_CLR(LRADC_CTRL0, XPLUS_ENABLE);
    }

}
예제 #4
0
void imx233_lcdif_reset_lcd(bool enable)
{
#if IMX233_SUBTARGET < 3700
    if(enable)
        BF_SET(LCDIF_CTRL, RESET);
    else
        BF_CLR(LCDIF_CTRL, RESET);
#else
    if(enable)
        BF_SET(LCDIF_CTRL1, RESET);
    else
        BF_CLR(LCDIF_CTRL1, RESET);
#endif
}
예제 #5
0
void imx233_enable_usb_phy(bool enable)
{
    if(enable)
    {
        BF_CLR(USBPHY_CTRL, SFTRST);
        BF_CLR(USBPHY_CTRL, CLKGATE);
        HW_USBPHY_PWD_CLR = 0xffffffff;
    }
    else
    {
        HW_USBPHY_PWD_SET = 0xffffffff;
        BF_SET(USBPHY_CTRL, SFTRST);
        BF_SET(USBPHY_CTRL, CLKGATE);
    }
}
예제 #6
0
파일: mixer_reg.c 프로젝트: dedzt16/dedzt16
void mxr_reg_graph_priority(struct mxr_device *mdev, int idx,u32 en)
{
  	u32 val;
        unsigned long flags;
        
	spin_lock_irqsave(&mdev->reg_slock, flags);
        val = mxr_read(mdev,MXR_LAYER_CFG);
	if(idx==0)
		BF_SET(val,en,4,4); /*for grapics later 0*/ 
        else    
        	BF_SET(val,en,8,4); /*for grapics later 1*/

	mxr_write(mdev, MXR_LAYER_CFG, val);
	spin_unlock_irqrestore(&mdev->reg_slock, flags);
}
예제 #7
0
void imx233_lcdif_enable(bool enable)
{
    if(enable)
        BF_CLR(LCDIF_CTRL, CLKGATE);
    else
        BF_SET(LCDIF_CTRL, CLKGATE);
}
예제 #8
0
void imx233_enable_usb_controller(bool enable)
{
    if(enable)
        BF_CLR(DIGCTL_CTRL, USB_CLKGATE);
    else
        BF_SET(DIGCTL_CTRL, USB_CLKGATE);
}
예제 #9
0
void imx233_lcdif_enable_bus_master(bool enable)
{
    if(enable)
        BF_SET(LCDIF_CTRL, LCDIF_MASTER);
    else
        BF_CLR(LCDIF_CTRL, LCDIF_MASTER);
}
예제 #10
0
void imx233_pwm_enable(int channel, bool enable)
{
    if(enable)
        BF_SET(PWM_CTRL, PWMx_ENABLE(channel));
    else
        BF_CLR(PWM_CTRL, PWMx_ENABLE(channel));
}
예제 #11
0
void imx233_lcdif_enable_underflow_recover(bool enable)
{
    if(enable)
        BF_SET(LCDIF_CTRL1, RECOVER_ON_UNDERFLOW);
    else
        BF_CLR(LCDIF_CTRL1, RECOVER_ON_UNDERFLOW);
}
예제 #12
0
void imx233_lcdif_enable_frame_done_irq(bool en)
{
    if(en)
        BF_SET(LCDIF_CTRL1, CUR_FRAME_DONE_IRQ_EN);
    else
        BF_CLR(LCDIF_CTRL1, CUR_FRAME_DONE_IRQ_EN);
    BF_CLR(LCDIF_CTRL1, CUR_FRAME_DONE_IRQ);
}
예제 #13
0
void imx233_lcdif_enable_vsync_edge_irq(bool en)
{
    if(en)
        BF_SET(LCDIF_CTRL1, VSYNC_EDGE_IRQ_EN);
    else
        BF_CLR(LCDIF_CTRL1, VSYNC_EDGE_IRQ_EN);
    BF_CLR(LCDIF_CTRL1, VSYNC_EDGE_IRQ);
}
예제 #14
0
////////////////////////////////////////////////////////////////////////////////
//! See hw_lradc.h for details.
////////////////////////////////////////////////////////////////////////////////
RtStatus_t hw_lradc_EnableBatteryMeasurement( hw_lradc_DelayTrigger_t eTrigger,
                                              uint16_t u16SamplingInterval)
{
    hw_lradc_Channel_t       eChannel = BATTERY_VOLTAGE_CH;

    //
    // Check if the lradc channel is present in this product
    //
    if( hw_lradc_GetChannelPresent(eChannel) == 0 )
        return (ERROR_HW_LRADC_CH_NOT_PRESENT);

    // Disable the channel interrupt
    hw_lradc_EnableInterrupt(eChannel, FALSE);

    hw_lradc_ClearInterruptFlag(eChannel);

    // Configure the battery conversion register
    BF_WR(LRADC_CONVERSION, SCALE_FACTOR, 2);


    // Enable the automatic update mode of BATT_VALUE field in HW_POWER_MONITOR
    BF_SET(LRADC_CONVERSION, AUTOMATIC);

    hw_lradc_ConfigureChannel(  eChannel,   //Lradc channel
                                    FALSE,      //DIVIDE_BY_TWO
                                    FALSE,      //ACCUMULATE
                                    0);         //NUM_SAMPLES

    // schedule a conversion before the setting up of the delay channel
    // so the user can have a good value right after the function returns
    hw_lradc_ScheduleChannel(eChannel);

    // Setup the trigger loop forever,
    hw_lradc_SetDelayTrigger( eTrigger,         // Trigger Index
                              (1 << eChannel),  // Lradc channels
                              (1 << eTrigger),  // Restart the triggers
                              0,                // No loop count
                              u16SamplingInterval); // 0.5*N msec on 2khz

    // Clear the accumulator & NUM_SAMPLES
    HW_LRADC_CHn_CLR(eChannel, 0xFFFFFFFF);

    // Kick off the LRADC battery measurement
    hw_lradc_SetDelayTriggerKick(eTrigger, TRUE);


    /* Wait for first measurement of battery.  Should occur in 13 LRADC clock
     * cycles from the time of channel kickoff.  Also add some wait time for
     * copy to the power supply BATT_VAL field to occur.
     */
    hw_digctl_MicrosecondWait(10);



    return SUCCESS;
}
예제 #15
0
void imx233_i2c_init(void)
{
    BF_SET(I2C_CTRL0, SFTRST);
    /* setup pins (must be done when shutdown) */
    imx233_pinctrl_setup_vpin(VPIN_I2C_SCL, "i2c scl", PINCTRL_DRIVE_4mA, true);
    imx233_pinctrl_setup_vpin(VPIN_I2C_SDA, "i2c sda", PINCTRL_DRIVE_4mA, true);
    imx233_i2c_reset();
    mutex_init(&i2c_mutex);
    semaphore_init(&i2c_sema, 1, 0);
}
예제 #16
0
파일: mixer_reg.c 프로젝트: dedzt16/dedzt16
void mxr_reg_vp_priority(struct mxr_device *mdev, int idx,u32 en)
{
  	u32 val;
        unsigned long flags;
	
	spin_lock_irqsave(&mdev->reg_slock, flags);
        val=mxr_read(mdev,MXR_LAYER_CFG);
 	BF_SET(val,en,0,4);
  	mxr_write(mdev, MXR_LAYER_CFG, val);
  	spin_unlock_irqrestore(&mdev->reg_slock, flags);
}
예제 #17
0
파일: mixer_reg.c 프로젝트: dedzt16/dedzt16
void mxr_reg_vp_layer_blend_alpha(struct mxr_device *mdev , int idx, u32 en)
{
        unsigned long flags;
        int val;  
	
	spin_lock_irqsave(&mdev->reg_slock, flags); 
        val = mxr_read(mdev,MXR_VIDEO_CFG);
        BF_SET(val,en,0,8);
	mxr_write(mdev,MXR_VIDEO_CFG,val);
        spin_unlock_irqrestore(&mdev->reg_slock, flags);
}
예제 #18
0
////////////////////////////////////////////////////////////////////////////////
//! See hw_lradc.h for details.
////////////////////////////////////////////////////////////////////////////////
void hw_lradc_EnableTouchDetect(bool bValue)
{
    if(bValue)
    {   //Enable the touch detector
        BF_SET(LRADC_CTRL0, TOUCH_DETECT_ENABLE);
    }
    else
    {   // Disable the touch detector
        BF_CLR(LRADC_CTRL0, TOUCH_DETECT_ENABLE);
    }
}
예제 #19
0
void imx233_powermgmt_init(void)
{
    imx233_power_set_charge_current(IMX233_CHARGE_CURRENT);
    imx233_power_set_stop_current(IMX233_STOP_CURRENT);
#if IMX233_SUBTARGET >= 3700
    /* assume that adc_init was called and battery monitoring via LRADC setup */
    BF_WR(POWER_BATTMONITOR, EN_BATADJ(1));
    /* setup linear regulator offsets to 25 mV below to prevent contention between
     * linear regulators and DCDC */
    BF_WR(POWER_VDDDCTRL, LINREG_OFFSET(2));
    BF_WR(POWER_VDDACTRL, LINREG_OFFSET(2));
    BF_WR(POWER_VDDIOCTRL, LINREG_OFFSET(2));
    /* enable a few bits controlling the DC-DC as recommended by Freescale */
    BF_SET(POWER_LOOPCTRL, TOGGLE_DIF);
    BF_SET(POWER_LOOPCTRL, EN_CM_HYST);
    BF_CS(POWER_LOOPCTRL, EN_RCSCALE(1));
#else
    BF_SET(POWER_5VCTRL, LINREG_OFFSET);
#endif
}
예제 #20
0
////////////////////////////////////////////////////////////////////////////////
//! See hw_power.h for details.
////////////////////////////////////////////////////////////////////////////////
void hw_power_SetPswitchInterruptSource(bool bSource)
{
    if(bSource == HW_POWER_STS_PSWITCH_BIT_0)
    {
        BF_CLR(POWER_CTRL, PSWITCH_IRQ_SRC);
    }
    else // bSource == HW_POWER_STS_PSWITCH_BIT_1
    {
        BF_SET(POWER_CTRL, PSWITCH_IRQ_SRC);
    }
}
예제 #21
0
////////////////////////////////////////////////////////////////////////////////
//! See hw_lradc.h for details.
////////////////////////////////////////////////////////////////////////////////
void hw_lradc_EnableTouchDetectInterrupt(bool bValue)
{
    if(bValue)
    {   //Enable the touch detector interrupt
        BF_SET(LRADC_CTRL1, TOUCH_DETECT_IRQ_EN);
    }
    else
    {   // Disable the touch detector interrupt
        BF_CLR(LRADC_CTRL1, TOUCH_DETECT_IRQ_EN);
    }
}
예제 #22
0
static void imx233_i2c_reset(void)
{
    /* clear softreset */
    imx233_reset_block(&HW_I2C_CTRL0);
    /* Errata (imx233):
     * When RETAIN_CLOCK is set, the ninth clock pulse (ACK) is not generated. However, the SDA
     * line is read at the proper timing interval. If RETAIN_CLOCK is cleared, the ninth clock pulse is
     * generated.
     * HW_I2C_CTRL1[ACK_MODE] has default value of 0. It should be set to 1 to enable the fix for
     * this issue.
     */
#if IMX233_SUBTARGET >= 3780
    BF_SET(I2C_CTRL1, ACK_MODE);
#endif
    BF_SET(I2C_CTRL0, CLKGATE);
    /* Fast-mode @ 400K */
    HW_I2C_TIMING0 = 0x000F0007; /* tHIGH=0.6us, read at 0.3us */
    HW_I2C_TIMING1 = 0x001F000F; /* tLOW=1.3us, write at 0.6us */
    HW_I2C_TIMING2 = 0x0015000D;
}
예제 #23
0
////////////////////////////////////////////////////////////////////////////////
//! See hw_power.h for details.
////////////////////////////////////////////////////////////////////////////////
void hw_power_EnableDcOkInterrupt(bool bEnable)
{
    if(bEnable)
    {
        BF_SET(POWER_CTRL, ENIRQ_DC_OK);
    }
    else
    {
        BF_CLR(POWER_CTRL, ENIRQ_DC_OK);
    }
}
예제 #24
0
enum imx233_i2c_error_t imx233_i2c_end(unsigned timeout)
{
    if(i2c_nr_stages == 0)
        return I2C_ERROR;
    i2c_stage[i2c_nr_stages - 1].dma.cmd |= BM_APB_CHx_CMD_SEMAPHORE | BM_APB_CHx_CMD_IRQONCMPLT;

    BF_CLR(I2C_CTRL1, ALL_IRQ);
    imx233_dma_reset_channel(APB_I2C);
    imx233_icoll_enable_interrupt(INT_SRC_I2C_DMA, true);
    imx233_icoll_enable_interrupt(INT_SRC_I2C_ERROR, true);
    imx233_dma_enable_channel_interrupt(APB_I2C, true);
    imx233_dma_start_command(APB_I2C, &i2c_stage[0].dma);

    enum imx233_i2c_error_t ret;
    if(semaphore_wait(&i2c_sema, timeout) == OBJ_WAIT_TIMEDOUT)
    {
        imx233_dma_reset_channel(APB_I2C);
        imx233_i2c_reset();
        ret = I2C_TIMEOUT;
    }
    else if(BF_RD(I2C_CTRL1, MASTER_LOSS_IRQ))
        ret = I2C_MASTER_LOSS;
    else if(BF_RD(I2C_CTRL1, NO_SLAVE_ACK_IRQ))
    {
        /* the core doesn't like this error, this is a workaround to prevent lock up */
#if IMX233_SUBTARGET >= 3780
        BF_SET(I2C_CTRL1, CLR_GOT_A_NAK);
#endif
        imx233_dma_reset_channel(APB_I2C);
        imx233_i2c_reset();
        ret = I2C_NO_SLAVE_ACK;
    }
    else if(BF_RD(I2C_CTRL1, EARLY_TERM_IRQ))
        ret = I2C_SLAVE_NAK;
    else
        ret = imx233_i2c_finalize();
    /* sleep */
    BF_SET(I2C_CTRL0, CLKGATE);
    mutex_unlock(&i2c_mutex);
    return ret;
}
예제 #25
0
void imx233_audioout_close(void)
{
    /* Switch to class A */
    BF_CLR(AUDIOOUT_ANACTRL, HP_CLASSAB);
    /* Hold HP to ground */
    BF_SET(AUDIOOUT_ANACTRL, HP_HOLD_GND);
    /* Mute HP and power down */
    BF_SET(AUDIOOUT_HPVOL, MUTE);
    /* Power down HP */
    BF_SET(AUDIOOUT_PWRDN, HEADPHONE);
    /* Mute DAC */
    HW_AUDIOOUT_DACVOLUME_SET = BM_OR2(AUDIOOUT_DACVOLUME, MUTE_LEFT, MUTE_RIGHT);
    /* Power down DAC */
    BF_SET(AUDIOOUT_PWRDN, DAC);
    /* Gate off DAC */
    BF_SET(AUDIOOUT_ANACLKCTRL, CLKGATE);
    /* Disable digital filter clock */
    imx233_clkctrl_enable(CLK_FILT, false);
    /* will also gate off the module */
    BF_CLR(AUDIOOUT_CTRL, RUN);
}
예제 #26
0
파일: lcd-zen.c 프로젝트: albb0920/rockbox
void lcd_enable(bool enable)
{
    if(lcd_on == enable)
        return;

    lcd_on = enable;
    if(lcd_on)
    {
        // enable spi
        spi_enable(true);
        // reset
        imx233_lcdif_reset_lcd(true);
        imx233_lcdif_reset_lcd(false);
        mdelay(1);
        imx233_lcdif_reset_lcd(true);
        mdelay(1);
        // "power" on
        lcd_power(true);
        // setup registers
        imx233_lcdif_enable_sync_signals(true); // we need frame signals during init
        lcd_power_seq();
        lcd_init_seq();
        lcd_display_on_seq();

        imx233_dma_reset_channel(APB_LCDIF);
        imx233_dma_start_command(APB_LCDIF, &lcdif_dma[0].dma);
        BF_SET(LCDIF_CTRL, DOTCLK_MODE);
        BF_SET(LCDIF_CTRL, RUN);
    }
    else
    {
        // power down
        lcd_display_off_seq();
        lcd_power(false);
        // stop lcdif
        BF_CLR(LCDIF_CTRL, DOTCLK_MODE);
        // disable spi
        spi_enable(false);
    }
}
예제 #27
0
void f_rand(frame_t *buffer, uint16_t frame) {
	uint8_t x = 0;
	uint8_t z = 0;

	(void) frame;
	for (z = 0; z < CUBE_HEIGHT; z++) {
		buffer[z].layer = 0;
		for (x = 0; x < CUBE_SIZE; x++) {
			uint8_t pattern = rand() % (CUBE_SIZE * CUBE_SIZE);
			BF_SET(buffer[z].layer, pattern, x*CUBE_SIZE, CUBE_SIZE);
		}
	}
}
예제 #28
0
////////////////////////////////////////////////////////////////////////////////
//! See hw_power.h for details.
////////////////////////////////////////////////////////////////////////////////
void hw_power_SetVbusValidInterruptPolarity(bool bPolarity)
{
    if(bPolarity == HW_POWER_CHECK_5V_DISCONNECTED)
    {
        BF_CLR(POWER_CTRL, POLARITY_VBUSVALID);
    }

    // bPolarity == HW_POWER_CHECK_5V_CONNECTED
    else
    {
        BF_SET(POWER_CTRL, POLARITY_VBUSVALID);
    }
}
예제 #29
0
////////////////////////////////////////////////////////////////////////////////
//! See hw_power.h for details.
////////////////////////////////////////////////////////////////////////////////
void hw_power_SetVdd5vGtVddioInterruptPolarity(bool bPolarity)
{
    if(bPolarity == HW_POWER_CHECK_5V_DISCONNECTED)
    {
        BF_CLR(POWER_CTRL, POLARITY_VDD5V_GT_VDDIO);
    }

    // bPolarity == HW_POWER_CHECK_5V_CONNECTED
    else
    {
        BF_SET(POWER_CTRL, POLARITY_VDD5V_GT_VDDIO);
    }
}
예제 #30
0
////////////////////////////////////////////////////////////////////////////////
//! See hw_power.h for details.
////////////////////////////////////////////////////////////////////////////////
void hw_power_SetPswitchInterruptPolarity(bool bPolarity)
{
    if(bPolarity == HW_POWER_CHECK_PSWITCH_LOW)
    {
        BF_CLR(POWER_CTRL, POLARITY_PSWITCH);
    }

    // bPolarity == HW_POWER_CHECK_PSWITCH_HIGH
    else
    {
        BF_SET(POWER_CTRL, POLARITY_PSWITCH);
    }
}