/*******************************************************************************
* geventGetAgeIntEn
*
* DESCRIPTION:
* This routine gets Age Interrupt Enable for the port.
* When it's enabled, ATU Age Violation interrupts from this port are enabled.
* An Age Violation will occur anytime a port is Locked(gprtSetLockedPort)
* and the ingressing frame's SA is contained in the ATU as a non-Static
* entry with a EntryState less than 0x4.
*
* INPUTS:
* port - the logical port number
* mode - GT_TRUE to enable Age Interrupt,
* GT_FALUSE to disable
*
* OUTPUTS:
* None.
*
* RETURNS:
* GT_OK - on success
* GT_FAIL - on error
* GT_NOT_SUPPORTED - if current device does not support this feature.
*
* COMMENTS:
*
*******************************************************************************/
GT_STATUS geventGetAgeIntEn
(
IN GT_QD_DEV *dev,
IN GT_LPORT port,
OUT GT_BOOL *mode
)
{
GT_U16 data;
GT_STATUS retVal; /* Functions return value. */
GT_U8 hwPort; /* the physical port number */
DBG_INFO(("geventGetAgeIntEn Called.\n"));
/* translate LPORT to hardware port */
hwPort = GT_LPORT_2_PORT(port);
if (!IS_IN_DEV_GROUP(dev,DEV_PORT_BASED_AGE_INT))
{
DBG_INFO(("GT_NOT_SUPPORTED\n"));
return GT_NOT_SUPPORTED;
}
/* Get Age Interrupt Enable Mode. */
retVal = hwGetPortRegField(dev,hwPort, QD_REG_PORT_ASSOCIATION,11,1,&data);
if(retVal != GT_OK)
{
DBG_INFO(("Failed.\n"));
}
else
{
DBG_INFO(("OK.\n"));
}
BIT_2_BOOL(data, *mode);
return retVal;
}
/*******************************************************************************
* gsysGetInitReady
*
* DESCRIPTION:
* This routine get the InitReady bit. This bit is set to a one when the ATU,
* the Queue Controller and the Statistics Controller are done with their
* initialization and are ready to accept frames.
*
* INPUTS:
* None.
*
* OUTPUTS:
* mode - GT_TRUE: switch is ready, GT_FALSE otherwise.
*
* RETURNS:
* GT_OK - on success
* GT_BAD_PARAM - on bad parameter
* GT_FAIL - on error
*
* COMMENTS:
* None.
*
* GalTis:
*
*******************************************************************************/
GT_STATUS gsysGetInitReady
(
IN GT_QD_DEV *dev,
OUT GT_BOOL *mode
)
{
GT_STATUS retVal; /* Functions return value. */
GT_U16 data; /* The register's read data. */
DBG_INFO(("gsysGetInitReady Called.\n"));
/* check if device supports this feature */
if (!IS_IN_DEV_GROUP(dev,DEV_QD_PLUS|DEV_ENHANCED_FE_SWITCH))
{
DBG_INFO(("Not Supported.\n"));
return GT_NOT_SUPPORTED;
}
if(mode == NULL)
{
DBG_INFO(("Failed.\n"));
return GT_BAD_PARAM;
}
/* get the bits from hardware */
retVal = hwGetGlobalRegField(dev,QD_REG_GLOBAL_STATUS,11,1,&data);
if(retVal != GT_OK)
{
DBG_INFO(("Failed.\n"));
return retVal;
}
BIT_2_BOOL(data,*mode);
DBG_INFO(("OK.\n"));
return GT_OK;
}
/*******************************************************************************
* driverPagedAccessStart
*
* DESCRIPTION:
* This function stores page register and Auto Reg Selection mode if needed.
*
* INPUTS:
* hwPort - port number where the Phy is connected
* pageType - type of the page registers
*
* OUTPUTS:
* autoOn - GT_TRUE if Auto Reg Selection enabled, GT_FALSE otherwise.
* pageReg - Page Register Data
*
* RETURNS:
* GT_OK - if success
* GT_FAIL - othrwise.
*
* COMMENTS:
* None.
*
*******************************************************************************/
GT_STATUS driverPagedAccessStart
(
IN GT_QD_DEV *dev,
IN GT_U8 hwPort,
IN GT_U8 pageType,
OUT GT_BOOL *autoOn,
OUT GT_U16 *pageReg
)
{
GT_U16 data;
GT_STATUS status;
switch(pageType)
{
case GT_PHY_PAGE_WRITE_BACK:
break;
case GT_PHY_PAGE_DIS_AUTO1: /* 88E1111 Type */
if((status= hwGetPhyRegField(dev,hwPort,27,9,1,&data)) != GT_OK)
{
DBG_INFO(("Not able to read Phy Register.\n"));
return status;
}
data ^= 0x1; /* toggle bit 0 */
BIT_2_BOOL(data, *autoOn);
if (*autoOn) /* Auto On */
{
if((status= hwSetPhyRegField(dev,hwPort,27,9,1,data)) != GT_OK)
{
DBG_INFO(("Not able to write Phy Register.\n"));
return status;
}
}
break;
case GT_PHY_PAGE_DIS_AUTO2: /* 88E1112 Type */
if((status= hwGetPhyRegField(dev,hwPort,22,15,1,&data)) != GT_OK)
{
DBG_INFO(("Not able to read Phy Register.\n"));
return status;
}
BIT_2_BOOL(data, *autoOn);
data ^= 0x1; /* toggle bit 0 */
if (*autoOn) /* Auto On */
{
if((status= hwSetPhyRegField(dev,hwPort,22,15,1,data)) != GT_OK)
{
DBG_INFO(("Not able to write Phy Register.\n"));
return status;
}
}
break;
case GT_PHY_NO_PAGE:
default:
/* Nothing to do */
return GT_OK;
}
if((status= hwGetPhyRegField(dev,hwPort,22,0,8,pageReg)) != GT_OK)
{
DBG_INFO(("Not able to read Phy Register.\n"));
return status;
}
return GT_OK;
}
