u32 platform_can_setup( unsigned id, u32 clock )
{
LPC_CAN_TypeDef * canx;
uint32_t div;
switch (id)
{
case 0: canx = LPC_CAN1; break;
case 1: canx = LPC_CAN2; break;
default: return 0;
}
CAN_DeInit(canx);
CAN_Init(canx, clock);
CAN_ModeConfig(canx, CAN_OPERATING_MODE, ENABLE);
CAN_IRQCmd(canx, CANINT_RIE, ENABLE); // Receive IRQ
CAN_IRQCmd(canx, CANINT_EIE, ENABLE); // Error IRQ
CAN_IRQCmd(canx, CANINT_BEIE, ENABLE); // Bus error IRQ
LPC_CANAF->AFMR = 2; // Filter bypass (receive all messages)
NVIC_EnableIRQ(CAN_IRQn); // Enable IRQs
// Fix clock
LPC_SC->PCLKSEL0 &= ~(3<<26 | 3<<28 | 3<<30); // PCLK / 2
LPC_SC->PCLKSEL0 |= (2<<26 | 2<<28 | 2<<30);
div = (SystemCoreClock / 20) / clock;
div --;
canx->MOD = 0x01; // Enter reset mode
canx->BTR = (div & 0x3FF) | (3<<14) | (5<<16) | (2<<20) ; // Set bit timing
canx->MOD = 0; // Return to normal operating
// Change pin function (for now using the MBED ones)
// And read clock divider
if (id == 0)
{
// Pin function
LPC_PINCON->PINSEL0 &= ~(3<<0 | 3<<2);
LPC_PINCON->PINSEL0 |= (1<<0 | 1<<2);
// No pull up / pull down
LPC_PINCON->PINMODE0 &= ~(3<<0 | 3<<2);
LPC_PINCON->PINMODE0 |= (2<<0 | 2<<2);
// NOT open drain
LPC_PINCON->PINMODE_OD0 &= ~(1<<0 | 1<<1);
}
else
{
LPC_PINCON->PINSEL0 &= ~(3<<8 | 3<<10);
LPC_PINCON->PINSEL0 |= (2<<8 | 2<<10);
// No pull up / pull down
LPC_PINCON->PINMODE0 &= ~(3<<8 | 3<<10);
LPC_PINCON->PINMODE0 |= (2<<8 | 2<<10);
// NOT open drain
LPC_PINCON->PINMODE_OD0 &= ~(1<<4 | 1<<5);
}
return (SystemCoreClock / 20) / ((div & 0x3FF)+1);
}
/*********************************************************************//**
* @brief c_entry: Main CAN program body
* @param[in] none
* @return none
**********************************************************************/
void c_entry(void)
{
/* Initialize debug via UART0
* – 115200bps
* – 8 data bit
* – No parity
* – 1 stop bit
* – No flow control
*/
debug_frmwrk_init();
print_menu();
/* Initialize CAN1 peripheral
* Note: Self-test mode doesn't require pin selection
*/
CAN_Init(_USING_CAN_NO, 125000);
//Enable self-test mode
CAN_ModeConfig(_USING_CAN_NO, CAN_SELFTEST_MODE, ENABLE);
//Enable Interrupt
CAN_IRQCmd(_USING_CAN_NO, CANINT_RIE, ENABLE);
CAN_IRQCmd(_USING_CAN_NO, CANINT_TIE1, ENABLE);
//Enable CAN Interrupt
NVIC_EnableIRQ(CAN_IRQn);
CAN_SetAFMode(CAN_ACC_BP);
CAN_InitMessage();
_DBG_("Transmitted buffer:");
PrintMessage(&TXMsg);
/** To test Bypass Mode: we send infinite messages to CAN2 and check
* receive process via COM1
*/
CAN_SendMsg(_USING_CAN_NO, &TXMsg);
#if (_USING_CAN_NO == CAN_1)
LPC_CAN1->CMR |=(1<<4); //Self Reception Request
#else
LPC_CAN2->CMR |=(1<<4);
#endif
while (1);
}
static void lpccan2_hw_init(enum CANBAUD baud, CAN_MODE_Type mode)
{
if(mode != CAN_SELFTEST_MODE) {
#ifndef LPCCAN2_USEING_GPIO_SECOND
PINSEL_ConfigPin (0, 4, 2);
PINSEL_ConfigPin (0, 5, 2);
#else
PINSEL_ConfigPin (2, 7, 1);
PINSEL_ConfigPin (2, 8, 1);
#endif
}
lpccan2_turnon_clk();
lpccan_irqstate_init(CAN_2);
#ifndef RT_USING_LPCCAN1
lpccan_init_alut_ram();
#endif /*RT_USING_LPCCAN1*/
lpccan_baud_set(CAN_2, baud);
CAN_ModeConfig(CAN_2, mode, ENABLE);
if(mode == CAN_SELFTEST_MODE) {
CAN_SetAFMode(CAN_ACC_BP);
}
}
static void lpccan1_hw_init(enum CANBAUD baud, CAN_MODE_Type mode)
{
if(mode != CAN_SELFTEST_MODE) {
#ifndef LPCCAN1_USEING_GPIO_SECOND
PINSEL_ConfigPin (0, 0, 1);
PINSEL_ConfigPin (0, 1, 1);
#else
PINSEL_ConfigPin (0, 21, 4);
PINSEL_ConfigPin (0, 22, 4);
#endif
}
lpccan1_turnon_clk();
lpccan_irqstate_init(CAN_1);
lpccan_init_alut_ram();
lpccan1_turnon_clk();
lpccan_baud_set(CAN_1, baud);
CAN_ModeConfig(CAN_1, mode, ENABLE);
if(mode == CAN_SELFTEST_MODE) {
//CAN_ModeConfig(CAN_1, CAN_TEST_MODE, ENABLE);
CAN_SetAFMode(CAN_ACC_BP);
}
}