/*
* Main function: initializes all system values and components, then starts
* operation of the two threads.
*
* @author HP Truong, Jacob Barnett
*
* @param void
* @return void
*/
int main (void) {
CC2500_LowLevel_Init();
CC2500_Reset();
osKernelInitialize (); // initialize CMSIS-RTOS
// initialize peripherals here
/* LCD initiatization */
LCD_Init();
/* LCD Layer initiatization */
LCD_LayerInit();
/* Enable the LTDC controler */
LTDC_Cmd(ENABLE);
/* Set LCD foreground layer as the current layer */
LCD_SetLayer(LCD_FOREGROUND_LAYER);
LCD_SetFont(&Font16x24);
LCD_Clear(LCD_COLOR_WHITE);
receive_and_plot_thread = osThreadCreate(osThread(receive_and_plot), NULL);
print_lcd_debug_thread = osThreadCreate(osThread(print_lcd_debug), NULL);
osKernelStart (); // start thread execution
}
const void *Corona_Cmds(enum ProtoCmds cmd)
{
switch(cmd) {
case PROTOCMD_INIT: initialize(0); return 0;
case PROTOCMD_DEINIT:
case PROTOCMD_RESET:
CLOCK_StopTimer();
return (void *)(CC2500_Reset() ? 1L : -1L);
case PROTOCMD_BIND: initialize(1); return 0;
case PROTOCMD_NUMCHAN: return (void *)8L;
case PROTOCMD_DEFAULT_NUMCHAN: return (void *)8L;
case PROTOCMD_CURRENT_ID: return (void *)((long)Model.fixed_id);
case PROTOCMD_GETOPTIONS: return corona_opts;
case PROTOCMD_TELEMETRYSTATE: return (void *)(long)PROTO_TELEM_UNSUPPORTED;
default: break;
}
return 0;
}
static void frsky_init()
{
CC2500_Reset();
CC2500_WriteReg(CC2500_17_MCSM1, 0x0c);
CC2500_WriteReg(CC2500_18_MCSM0, 0x18);
CC2500_WriteReg(CC2500_06_PKTLEN, 0xff);
CC2500_WriteReg(CC2500_07_PKTCTRL1, 0x04);
CC2500_WriteReg(CC2500_08_PKTCTRL0, 0x05);
CC2500_WriteReg(CC2500_3E_PATABLE, 0xfe);
CC2500_WriteReg(CC2500_0B_FSCTRL1, 0x08);
CC2500_WriteReg(CC2500_0C_FSCTRL0, fine);
CC2500_WriteReg(CC2500_0D_FREQ2, 0x5c);
CC2500_WriteReg(CC2500_0E_FREQ1, 0x58);
CC2500_WriteReg(CC2500_0F_FREQ0, 0x9d + course);
CC2500_WriteReg(CC2500_10_MDMCFG4, 0xaa);
CC2500_WriteReg(CC2500_11_MDMCFG3, 0x10);
CC2500_WriteReg(CC2500_12_MDMCFG2, 0x93);
CC2500_WriteReg(CC2500_13_MDMCFG1, 0x23);
CC2500_WriteReg(CC2500_14_MDMCFG0, 0x7a);
CC2500_WriteReg(CC2500_15_DEVIATN, 0x41);
CC2500_WriteReg(CC2500_19_FOCCFG, 0x16);
CC2500_WriteReg(CC2500_1A_BSCFG, 0x6c);
CC2500_WriteReg(CC2500_1B_AGCCTRL2, 0x43);
CC2500_WriteReg(CC2500_1C_AGCCTRL1, 0x40);
CC2500_WriteReg(CC2500_1D_AGCCTRL0, 0x91);
CC2500_WriteReg(CC2500_21_FREND1, 0x56);
CC2500_WriteReg(CC2500_22_FREND0, 0x10);
CC2500_WriteReg(CC2500_23_FSCAL3, 0xa9);
CC2500_WriteReg(CC2500_24_FSCAL2, 0x0a);
CC2500_WriteReg(CC2500_25_FSCAL1, 0x00);
CC2500_WriteReg(CC2500_26_FSCAL0, 0x11);
CC2500_WriteReg(CC2500_29_FSTEST, 0x59);
CC2500_WriteReg(CC2500_2C_TEST2, 0x88);
CC2500_WriteReg(CC2500_2D_TEST1, 0x31);
CC2500_WriteReg(CC2500_2E_TEST0, 0x0b);
CC2500_WriteReg(CC2500_03_FIFOTHR, 0x07);
CC2500_WriteReg(CC2500_09_ADDR, 0x00);
CC2500_SetTxRxMode(TX_EN);
CC2500_SetPower(Model.tx_power);
CC2500_Strobe(CC2500_SIDLE); // Go to idle...
//CC2500_WriteReg(CC2500_02_IOCFG0, 0x06);
//CC2500_WriteReg(CC2500_0A_CHANNR, 0x06);
#if 0
CC2500_WriteReg(CC2500_02_IOCFG0, 0x01); // reg 0x02: RX complete interrupt
CC2500_WriteReg(CC2500_17_MCSM1, 0x0C); // reg 0x17: Stay in rx after packet complete
CC2500_WriteReg(CC2500_18_MCSM0, 0x18); // reg 0x18: Calibrate when going from idle to rx or tx, po timeout count = 64
CC2500_WriteReg(CC2500_06_PKTLEN, 62); // Leave room for appended status bytes
CC2500_WriteReg(CC2500_08_PKTCTRL0, 0x05); // reg 0x08: CRC_EN = 1, Length_config = 1 (variable length)
CC2500_WriteReg(CC2500_3E_PATABLE, 0xFF);
CC2500_WriteReg(CC2500_0B_FSCTRL1, 0x08); // reg 0x0B: 203 KHz IF
CC2500_WriteReg(CC2500_0C_FSCTRL0, 0x00); // reg 0x0C
// CC2500_WriteReg(CC2500_0D_FREQ2, 0x5C); // reg 0x0D
// CC2500_WriteReg(CC2500_0E_FREQ1, 0x76); // reg 0x0E
// CC2500_WriteReg(CC2500_0F_FREQ0, 0x27); // reg 0x0F
CC2500_WriteReg(CC2500_0D_FREQ2, 0x5C); // reg 0x0D hack: Due to a bit high xtal we shift this down by around 70 khz
CC2500_WriteReg(CC2500_0E_FREQ1, 0x75); // reg 0x0E
CC2500_WriteReg(CC2500_0F_FREQ0, 0x6A); // reg 0x0F
CC2500_WriteReg(CC2500_10_MDMCFG4, 0xAA); // reg 0x10
CC2500_WriteReg(CC2500_11_MDMCFG3, 0x39); // reg 0x11
CC2500_WriteReg(CC2500_12_MDMCFG2, 0x11); // reg 0x12
CC2500_WriteReg(CC2500_13_MDMCFG1, 0x23); // reg 0x13
CC2500_WriteReg(CC2500_14_MDMCFG0, 0x7A); // reg 0x14
CC2500_WriteReg(CC2500_15_DEVIATN, 0x42); // reg 0x15
CC2500_WriteReg(CC2500_19_FOCCFG, 0x16); // reg 0x19
CC2500_WriteReg(CC2500_1A_BSCFG, 0x6C); // reg 0x1A
CC2500_WriteReg(CC2500_1B_AGCCTRL2, 0x03); // reg 0x1B
CC2500_WriteReg(CC2500_1C_AGCCTRL1, 0x40); // reg 0x1C
CC2500_WriteReg(CC2500_1D_AGCCTRL0, 0x91); // reg 0x1D
CC2500_WriteReg(CC2500_21_FREND1, 0x56); // reg 0x21: Default POR value
CC2500_WriteReg(CC2500_22_FREND0, 0x10); // reg 0x22: Default POR value
CC2500_WriteReg(CC2500_23_FSCAL3, 0xA9); // reg 0x23: Default POR value
CC2500_WriteReg(CC2500_24_FSCAL2, 0x05); // reg 0x24: Default POR value
CC2500_WriteReg(CC2500_25_FSCAL1, 0x00); // reg 0x25
CC2500_WriteReg(CC2500_26_FSCAL0, 0x11); // reg 0x26
CC2500_WriteReg(CC2500_29_FSTEST, 0x59); // reg 0x29
CC2500_WriteReg(CC2500_2C_TEST2, 0x88); // reg 0x2C
CC2500_WriteReg(CC2500_2D_TEST1, 0x31); // reg 0x2D
CC2500_WriteReg(CC2500_2E_TEST0, 0x0B); // reg 0x2E
CC2500_WriteReg(CC2500_03_FIFOTHR, 0x0F); // reg 0x03: Use max rx fifo
CC2500_WriteReg(CC2500_09_ADDR, 0x03); // reg 0x09: FrSky bind address is 0x0301 on channel 0
CC2500_Strobe(CC2500_SIDLE); // Go to idle...
CC2500_WriteReg(CC2500_07_PKTCTRL1,0x0D); // reg 0x07 hack: Append status, filter by address, auto-flush on bad crc, PQT=0
CC2500_WriteReg(CC2500_0C_FSCTRL0, 0); // Frequency offset...
CC2500_WriteReg(CC2500_0A_CHANNR, 0);
#endif
}
bool CC2500_Init(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
EXTI_InitTypeDef EXTI_InitStructure;
u8 i = 0;
u16 Id;
//CS
GPIO_InitStructure.GPIO_Pin = CC_CS_IO_PIN;
GPIO_InitStructure.GPIO_Speed=GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
GPIO_Init(CC_CS_IO_GROUP, &GPIO_InitStructure);
SPI2_Init();
CC2500_Reset();
if((Id=CC2500_GetChipId())!=0x8003)
{
Debug("Error CC2500 ID: %04x\n\r",Id);
return FALSE;
}
CC2500_RfSettings();
CC2500_Select();
CC2500_WriteByte(CCxxx0_PATABLE|WRITE_BURST);
for(i=0;i<8;i++)
{
CC2500_WriteByte(paTable_CC2500[i]);
}
CC2500_NoSelect();
CC2500_SetRxd();
//GDO0
GPIO_InitStructure.GPIO_Pin = CC_GDO0_IO_PIN;
GPIO_InitStructure.GPIO_Speed=GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
GPIO_Init(CC_GDO0_IO_GROUP, &GPIO_InitStructure);
#if QXW_LCM_ID == 210 || QXW_LCM_ID == 211 || QXW_LCM_ID == 220 || QXW_LCM_ID == 221
NVIC_InitStructure.NVIC_IRQChannel = EXTI3_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = EXTI3_IRQn_Priority;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE
NVIC_Init(&NVIC_InitStructure);
EXTI_InitStructure.EXTI_Line = EXTI_Line3; //外部中断线 ，使用第2根
EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; //中断模
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;//中断触发方式
EXTI_InitStructure.EXTI_LineCmd = ENABLE; //打开中断
EXTI_Init(&EXTI_InitStructure); //调用库函数给寄存器复制
CC2500_InterruptEnable(FALSE);
GPIO_EXTILineConfig(GPIO_PortSourceGPIOD, GPIO_PinSource3);
#elif QXW_LCM_ID == 212
NVIC_InitStructure.NVIC_IRQChannel = EXTI9_5_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = EXTI9_5_IRQn_Priority;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE
NVIC_Init(&NVIC_InitStructure);
EXTI_InitStructure.EXTI_Line = EXTI_Line6; //外部中断线 ，使用第2根
EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; //中断模
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;//中断触发方式
EXTI_InitStructure.EXTI_LineCmd = ENABLE; //打开中断
EXTI_Init(&EXTI_InitStructure); //调用库函数给寄存器复制
CC2500_InterruptEnable(FALSE);
GPIO_EXTILineConfig(GPIO_PortSourceGPIOD, GPIO_PinSource6);
#endif
return TRUE;
}
