/** * \brief Enable PLLB clock. * * \param mulb PLLB multiplier. * \param pllbcount PLLB counter. * \param divb Divider. */ void pmc_enable_pllbck(uint32_t mulb, uint32_t pllbcount, uint32_t divb) { pmc_disable_pllbck(); // Hardware BUG FIX : first disable the PLL to unlock the lock! // It occurs when re-enabling the PLL with the same parameters. PMC->CKGR_PLLBR = CKGR_PLLBR_DIVB(divb) | CKGR_PLLBR_PLLBCOUNT(pllbcount) | CKGR_PLLBR_MULB(mulb); while ((PMC->PMC_SR & PMC_SR_LOCKB) == 0); }
/** * \brief Enable PLLB clock. * * \param mulb PLLB multiplier. * \param pllbcount PLLB counter. * \param divb Divider. */ void pmc_enable_pllbck(uint32_t mulb, uint32_t pllbcount, uint32_t divb) { /* first disable the PLL to unlock the lock!*/ pmc_disable_pllbck(); PMC->CKGR_PLLBR = CKGR_PLLBR_DIVB(divb) | CKGR_PLLBR_PLLBCOUNT(pllbcount) | CKGR_PLLBR_MULB(mulb); while ((PMC->PMC_SR & PMC_SR_LOCKB) == 0); }
/** * \brief Configure 48MHz Clock for USB */ static void _ConfigureUsbClock(void) { /* Enable PLLB for USB */ PMC->CKGR_PLLBR = CKGR_PLLBR_DIVB(1) | CKGR_PLLBR_MULB(7) | CKGR_PLLBR_PLLBCOUNT_Msk; while((PMC->PMC_SR & PMC_SR_LOCKB) == 0); /* USB Clock uses PLLB */ PMC->PMC_USB = PMC_USB_USBDIV(1) /* /2 */ | PMC_USB_USBS; /* PLLB */ }
// Configure 48MHz Clock for USB void usb_configure_clock_48mhz(void) { // Use PLLB for USB #if (BOARD_MAINOSC == 16000000) PMC->CKGR_PLLBR = CKGR_PLLBR_DIVB(1) | CKGR_PLLBR_MULB(5) | CKGR_PLLBR_PLLBCOUNT_Msk; while((PMC->PMC_SR & PMC_SR_LOCKB) == 0); // divide by 2 use PLLB PMC->PMC_USB = PMC_USB_USBDIV(1) | PMC_USB_USBS; #elif (BOARD_MAINOSC == 12000000) PMC->CKGR_PLLBR = CKGR_PLLBR_DIVB(1) | CKGR_PLLBR_MULB(7) | CKGR_PLLBR_PLLBCOUNT_Msk; while((PMC->PMC_SR & PMC_SR_LOCKB) == 0); // divide by 2 use PLLB PMC->PMC_USB = PMC_USB_USBDIV(1) | PMC_USB_USBS; #endif }
/** * \brief Enable PLLB clock. * * \param mulb PLLB multiplier. * \param pllbcount PLLB counter. * \param divb Divider. */ void pmc_enable_pllbck(uint32_t mulb, uint32_t pllbcount, uint32_t divb) { /* first disable the PLL to unlock the lock */ pmc_disable_pllbck(); #if SAMG55 PMC->CKGR_PLLAR = CKGR_PLLAR_PLLAEN(divb) | CKGR_PLLAR_PLLACOUNT(pllbcount) | CKGR_PLLAR_MULA(mulb); #else PMC->CKGR_PLLBR = CKGR_PLLBR_DIVB(divb) | CKGR_PLLBR_PLLBCOUNT(pllbcount) | CKGR_PLLBR_MULB(mulb); #endif while ((PMC->PMC_SR & PMC_SR_LOCKB) == 0); }
/** * \brief Disable PLLB clock. */ void pmc_disable_pllbck(void) { PMC->CKGR_PLLBR = CKGR_PLLBR_MULB(0); }