/*--------------------------------------------------------------------------*/ void SYS_Init(void) { /*---------------------------------------------------------------------------------------------------------*/ /* Init System Clock */ /*---------------------------------------------------------------------------------------------------------*/ /* Enable Internal RC 22.1184 MHz clock */ CLK_EnableXtalRC(CLK_PWRCON_OSC22M_EN_Msk); /* Waiting for Internal RC clock ready */ CLK_WaitClockReady(CLK_CLKSTATUS_OSC22M_STB_Msk); /* Switch HCLK clock source to Internal RC and HCLK source divide 1 */ CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_HIRC, CLK_CLKDIV_HCLK(1)); #if (!CRYSTAL_LESS) /* Enable external XTAL 12 MHz clock */ CLK_EnableXtalRC(CLK_PWRCON_XTL12M_EN_Msk); /* Waiting for external XTAL clock ready */ CLK_WaitClockReady(CLK_CLKSTATUS_XTL12M_STB_Msk); /* Set core clock */ CLK_SetCoreClock(72000000); /* Select module clock source */ CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UART_S_HIRC, CLK_CLKDIV_UART(1)); CLK_SetModuleClock(USBD_MODULE, CLK_CLKSEL0_USB_S_PLL, CLK_CLKDIV_USB(3)); #else /* Enable Internal RC 48MHz clock */ CLK_EnableXtalRC(CLK_PWRCON_OSC48M_EN_Msk); /* Waiting for Internal RC clock ready */ CLK_WaitClockReady(CLK_CLKSTATUS_OSC48M_STB_Msk); /* Select module clock source */ CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UART_S_HIRC, CLK_CLKDIV_UART(1)); CLK_SetModuleClock(USBD_MODULE, CLK_CLKSEL0_USB_S_RC48M, CLK_CLKDIV_USB(1)); #endif /* Enable module clock */ CLK_EnableModuleClock(UART0_MODULE); CLK_EnableModuleClock(USBD_MODULE); /*---------------------------------------------------------------------------------------------------------*/ /* Init I/O Multi-function */ /*---------------------------------------------------------------------------------------------------------*/ /* Set GPB multi-function pins for UART0 RXD and TXD, and Clock Output */ SYS->GPB_MFP &= ~(SYS_GPB_MFP_PB0_Msk | SYS_GPB_MFP_PB1_Msk | SYS_GPB_MFP_PB8_Msk); SYS->ALT_MFP &= ~SYS_ALT_MFP_PB8_Msk; SYS->GPB_MFP |= (SYS_GPB_MFP_PB0_UART0_RXD | SYS_GPB_MFP_PB1_UART0_TXD | SYS_GPB_MFP_PB8_CLKO); SYS->ALT_MFP |= SYS_ALT_MFP_PB8_CLKO; /* Enable CLKO (PB.8) for monitor HCLK. CLKO = HCLK/8 Hz*/ EnableCLKO((2 << CLK_CLKSEL2_FRQDIV_S_Pos), 2); }
void main (void) { // set pll out 48Mhz, set cpu clock 48Mhz SYS_UnlockReg(); CLK_EnableXtalRC(CLK_PWRCON_XTL12M_EN_Msk); CLK_WaitClockReady(CLK_CLKSTATUS_XTL12M_STB_Msk); CLK_SetCoreClock(48000000); CLK_EnableModuleClock(USBD_MODULE); CLK_SetModuleClock(USBD_MODULE, 0, CLK_CLKDIV_USB(1)); DAP_Setup(); USBD_Open(&gsInfo, HID_ClassRequest, NULL); HID_Init(); balabala_hid_init(); USBD_Start(); NVIC_EnableIRQ(USBD_IRQn); while(1) { usbd_hid_process(); } }