예제 #1
0
void  CSP_IntVectDeref (CSP_INT_VECT  *p_vect)
{
#if (CSP_CFG_INT_ISR_ARG_EN == DEF_ENABLED)
    void          *p_int_arg;
#endif
    CPU_FNCT_PTR   int_isr_fnct;
#if (CSP_CFG_INT_ISR_EXEC_MEAS_EN == DEF_ENABLED) && \
    (CPU_CFG_TS_EN               == DEF_ENABLED)
    CPU_TS         ts;
    CPU_SR_ALLOC();
#endif


    int_isr_fnct =  p_vect->FnctPtr;
#if (CSP_CFG_INT_ISR_ARG_EN == DEF_ENABLED)
    p_int_arg    =  p_vect->ArgPtr;
#endif

   if (int_isr_fnct != (CPU_FNCT_PTR)0) {
#if (CSP_CFG_INT_ISR_EXEC_MEAS_EN == DEF_ENABLED) && \
    (CPU_CFG_TS_EN                == DEF_ENABLED)
        ts = CPU_TS_Get32();                                    /* Get current time stamp.                              */
#endif

#if (CSP_CFG_INT_NESTING_EN == DEF_ENABLED)
        CPU_IntEn();
#endif

#if (CSP_CFG_INT_ISR_ARG_EN == DEF_ENABLED)
        (*int_isr_fnct)(p_int_arg);                             /* Call interrupt handler                               */
#else
        (*int_isr_fnct)((void *)0);                             /* Call interrupt handler (default argument)            */
#endif

#if (CSP_CFG_INT_NESTING_EN == DEF_ENABLED)
        CPU_IntDis();
#endif

#if (CSP_CFG_INT_ISR_EXEC_MEAS_EN == DEF_ENABLED) && \
    (CPU_CFG_TS_EN                == DEF_ENABLED)
        ts = CPU_TS_Get32() - ts;                               /* Compute delta time between start and end.            */
                                                                /* Detect peak value                                    */
        CPU_CRITICAL_ENTER();

        if (p_vect->TimeMax < ts) {
            p_vect->TimeMax = ts;
        }

        p_vect->TimeCur = ts;

        CPU_CRITICAL_EXIT();
#endif
   }
}
예제 #2
0
/*CPSR/SPSR:SPSR 只有Arm模式才能识别
  b31
  N(neg) |Z(Zero) |C(Carry)| V(Over) |Q(饱和) | J |  Rsv(b25:b8)| GE[3:0](>=) | E(Endian)| A(禁止abort) | I(禁止IRQ) | F(禁止FIQ) | T(thumb/arm)| mode(usr/FIQ/IRQ/SVC/ABT/UNDEFINE/SYSTEM)
*/
VOID  BSP_GlobalIrqIntEnable (VOID)
{
// 清IRQbit使能IRQ全局中断      
 //OS_CPU_ARM_CONTROL_INT_DIS      EQU  0xC0                     ; Disable both FIQ and IRQ. 
 #ifdef USE_CORTEX_M3
    CPU_IntEn();
 #else
 __asm
   {   
      MRS     R0, CPSR
      BIC     R0, R0, #0x80
      MSR     CPSR_c, R0           
   }                
 #endif
}