static int __init octeon_mdiobus_probe(struct platform_device *pdev)
{
struct octeon_mdiobus *bus;
union cvmx_smix_en smi_en;
int i;
int err = -ENOENT;
bus = devm_kzalloc(&pdev->dev, sizeof(*bus), GFP_KERNEL);
if (!bus)
return -ENOMEM;
/* The platform_device id is our unit number. */
bus->unit = pdev->id;
bus->mii_bus = mdiobus_alloc();
if (!bus->mii_bus)
goto err;
smi_en.u64 = 0;
smi_en.s.en = 1;
cvmx_write_csr(CVMX_SMIX_EN(bus->unit), smi_en.u64);
/*
* Standard Octeon evaluation boards don't support phy
* interrupts, we need to poll.
*/
for (i = 0; i < PHY_MAX_ADDR; i++)
bus->phy_irq[i] = PHY_POLL;
bus->mii_bus->priv = bus;
bus->mii_bus->irq = bus->phy_irq;
bus->mii_bus->name = "mdio-octeon";
snprintf(bus->mii_bus->id, MII_BUS_ID_SIZE, "%x", bus->unit);
bus->mii_bus->parent = &pdev->dev;
bus->mii_bus->read = octeon_mdiobus_read;
bus->mii_bus->write = octeon_mdiobus_write;
dev_set_drvdata(&pdev->dev, bus);
err = mdiobus_register(bus->mii_bus);
if (err)
goto err_register;
dev_info(&pdev->dev, "Version " DRV_VERSION "\n");
return 0;
err_register:
mdiobus_free(bus->mii_bus);
err:
devm_kfree(&pdev->dev, bus);
smi_en.u64 = 0;
cvmx_write_csr(CVMX_SMIX_EN(bus->unit), smi_en.u64);
return err;
}
static int __exit octeon_mdiobus_remove(struct platform_device *pdev)
{
struct octeon_mdiobus *bus;
union cvmx_smix_en smi_en;
bus = dev_get_drvdata(&pdev->dev);
mdiobus_unregister(bus->mii_bus);
mdiobus_free(bus->mii_bus);
smi_en.u64 = 0;
cvmx_write_csr(CVMX_SMIX_EN(bus->unit), smi_en.u64);
return 0;
}
int n804_probe(void)
/* Returns: IMTHW_N804 or IMTHW_UNDEF.
* The detection is peformed based on the Product ID AVR register.
* Note, the save value can be found in CPLD ID register (address = 0).
*/
{
/*Enable access to the MDIO bus.*/
cvmx_write_csr(CVMX_SMIX_EN(N804_MDIO_BUS), 0x1);
/*Retrieve and analyze the Product ID.*/
uint8_t id = n804_cpld_read(N804_CPLD_SIG_L);
if (id != N804_SIGN_L) {
return IMTHW_UNDEF;
}
return IMTHW_N804;
}
