static void
__init_dma(struct saa9730_priv_data *spd)
{
unsigned long __base = spd->base;
__stop_dma(spd);
// reset DMA engine
SAA9730_DMATST |= SAA9730_DMATST_RESET;
// setup buffers
SAA9730_TXBUFA = CYGARC_PHYSICAL_ADDRESS((unsigned long)spd->tx_buffer[0][0]);
SAA9730_TXBUFB = CYGARC_PHYSICAL_ADDRESS((unsigned long)spd->tx_buffer[1][0]);
SAA9730_RXBUFA = CYGARC_PHYSICAL_ADDRESS((unsigned long)spd->rx_buffer[0][0]);
SAA9730_RXBUFB = CYGARC_PHYSICAL_ADDRESS((unsigned long)spd->rx_buffer[1][0]);
SAA9730_PKTCNT = ((SAA9730_TXPKTS_PER_BUFFER << 24) |
(SAA9730_TXPKTS_PER_BUFFER << 16) |
(SAA9730_RXPKTS_PER_BUFFER << 8) |
(SAA9730_RXPKTS_PER_BUFFER << 0));
SAA9730_OK2USE = 0;
__select_buffer(spd, 0);
// initialize DMA control register
SAA9730_DMACTL = SAA9730_DMACTL_BLKINT |
SAA9730_DMACTL_MAXXFER_ANY |
SAA9730_DMACTL_ENDIAN_LITTLE;
SAA9730_DMACTL |= SAA9730_DMACTL_RXINT;
SAA9730_DMACTL |= (1<<SAA9730_DMACTL_RXINTCNT_SHIFT);
SAA9730_DMACTL &= ~SAA9730_DMACTL_BLKINT;
#ifndef CYGPKG_REDBOOT
SAA9730_DMACTL |= SAA9730_DMACTL_TXINT;
#endif
SAA9730_TIMOUT = 200;
// accept broadcast packets */
SAA9730_CAMCTL = SAA9730_CAMCTL_BROADCAST |
SAA9730_CAMCTL_COMPARE;
SAA9730_TXCTL = 0;
SAA9730_RXCTL |= SAA9730_RXCTL_STRIPCRC;
SAA9730_CAMENA = 1;
}
// See if a range of FLASH addresses overlaps currently running code
bool
flash_code_overlaps(void *start, void *end)
{
extern char _stext[], _etext[];
unsigned long p_stext, pstart, p_etext, pend;
p_stext = CYGARC_PHYSICAL_ADDRESS((unsigned long)&_stext);
p_etext = CYGARC_PHYSICAL_ADDRESS((unsigned long)&_etext);
// if _stext/_etext in boot shadow region, convert to
// system flash address
if ((p_stext >= 0x1fc00000) && (p_etext <= 0x20000000)) {
p_stext -= 0x02000000;
p_etext -= 0x02000000;
}
pstart = CYGARC_PHYSICAL_ADDRESS((unsigned long)start);
pend = CYGARC_PHYSICAL_ADDRESS((unsigned long)end);
return (((p_stext >= pstart) && (p_stext < pend)) ||
((p_etext >= pstart) && (p_etext < pend)));
}
#include CYGHWR_MEMORY_LAYOUT_H
// Functions defined in this module
void _csb281_fs6377_init(int mode);
static void _csb281_i2c_init(void);
// The memory map is weakly defined, allowing the application to redefine
// it if necessary. The regions defined below are the minimum requirements.
CYGARC_MEMDESC_TABLE CYGBLD_ATTRIB_WEAK = {
// Mapping for the Cogent CSB281 development boards
CYGARC_MEMDESC_NOCACHE( 0x70000000, 0x10000000 ), // FLASH region, LCD, PS/2
CYGARC_MEMDESC_NOCACHE( 0xf0000000, 0x10000000 ), // PCI space, LEDS, control
CYGARC_MEMDESC_CACHE( CYGMEM_REGION_ram, CYGMEM_REGION_ram_SIZE ), // Main memory
// Main memory, mapped non-cacheable for PCI use
CYGARC_MEMDESC_NOCACHE_PA(CYGMEM_SECTION_pci_window,
CYGARC_PHYSICAL_ADDRESS(CYGMEM_SECTION_pci_window),
CYGMEM_SECTION_pci_window_SIZE),
CYGARC_MEMDESC_TABLE_END
};
//--------------------------------------------------------------------------
// Platform init code.
void
hal_platform_init(void)
{
cyg_uint32 bcsr, gcr, frr, eicr, iack;
int vec;
// Initialize I/O interfaces
hal_if_init();
