/** C function for SMI handler. To change all processor's SMMBase Register. **/ VOID EFIAPI SmmInitHandler ( VOID ) { UINT32 ApicId; UINTN Index; // // Update SMM IDT entries' code segment and load IDT // AsmWriteIdtr (&gcSmiIdtr); ApicId = GetApicId (); ASSERT (mNumberOfCpus <= mMaxNumberOfCpus); for (Index = 0; Index < mNumberOfCpus; Index++) { if (ApicId == (UINT32)gSmmCpuPrivate->ProcessorInfo[Index].ProcessorId) { // // Initialize SMM specific features on the currently executing CPU // SmmCpuFeaturesInitializeProcessor ( Index, mIsBsp, gSmmCpuPrivate->ProcessorInfo, &mCpuHotPlugData ); if (!mSmmS3Flag) { // // Check XD and BTS features on each processor on normal boot // CheckFeatureSupported (); } if (mIsBsp) { // // BSP rebase is already done above. // Initialize private data during S3 resume // InitializeMpSyncData (); } // // Hook return after RSM to set SMM re-based flag // SemaphoreHook (Index, &mRebased[Index]); return; } } ASSERT (FALSE); }
/** Check if XD and BTS features are supported by all processors. **/ VOID CheckProcessorFeature ( VOID ) { EFI_STATUS Status; EFI_MP_SERVICES_PROTOCOL *MpServices; Status = gBS->LocateProtocol (&gEfiMpServiceProtocolGuid, NULL, (VOID **)&MpServices); ASSERT_EFI_ERROR (Status); // // First detect if XD and BTS are supported // mXdSupported = TRUE; mBtsSupported = TRUE; // // Check if XD and BTS are supported on all processors. // CheckFeatureSupported (); // //Check on other processors if BSP supports this // if (mXdSupported || mBtsSupported) { MpServices->StartupAllAPs ( MpServices, (EFI_AP_PROCEDURE) CheckFeatureSupported, TRUE, NULL, 0, NULL, NULL ); } }