BOOL CDlgImportField::ImportGrid(int nGrid)
{
CGrid *pGrd = &(m_fldGrd[nGrid]);
CGrid grd;
GridInfo gi;
if(pGrd->IsEmpty()) {
gi = grd.GetInfoBrowse();
if( CheckGrid(gi) ) {
pGrd->Open( gi.strFilePath, gi.nType );
return TRUE;
}
}
else {
int ret = AfxMessageBox("Grid is not empty. Replace?", MB_ICONQUESTION | MB_YESNO);
if( ret == IDYES) {
gi = grd.GetInfoBrowse();
if( CheckGrid( gi) ) {
pGrd->Close();
pGrd->Open( gi.strFilePath, gi.nType );
return TRUE;
}
}
}
return FALSE;
}
void ConstructGrid (void)
{
int x, y, num;
do
{
for (x=0; x < 5; x++)
for (y=0; y < 5; y++)
grid[x][y]=EMPTY;
grid[0][0] = START; // start
grid[4][4] = FINISH; // finish
num=0;
while (num < 6)
{
x = rand()%5;
y = rand()%5;
if (grid[x][y] == EMPTY)
{
grid[x][y] = MINE;
num++;
}
}
}
while (CheckGrid() == 0);
}
/* Create and fill FPGA architecture grid. */
void
alloc_and_load_grid(INOUTP int *num_instances_type)
{
int i, j;
t_type_ptr type;
#ifdef SHOW_ARCH
FILE *dump;
#endif
/* To remove this limitation, change ylow etc. in t_rr_node to *
* * be ints instead. Used shorts to save memory. */
if((nx > 32766) || (ny > 32766))
{
printf("Error: nx and ny must be less than 32767, since the \n");
printf("router uses shorts (16-bit) to store coordinates.\n");
printf("nx: %d. ny: %d.\n", nx, ny);
exit(1);
}
assert(nx >= 1 && ny >= 1);
grid = (struct s_grid_tile **)alloc_matrix(0, (nx + 1),
0, (ny + 1),
sizeof(struct s_grid_tile));
/* Clear the full grid to have no type (NULL), no capacity, etc */
for(i = 0; i <= (nx + 1); ++i)
{
for(j = 0; j <= (ny + 1); ++j)
{
memset(&grid[i][j], 0, (sizeof(struct s_grid_tile)));
}
}
for(i = 0; i < num_types; i++)
{
num_instances_type[i] = 0;
}
/* Nothing goes in the corners. */
grid[0][0].type = grid[nx + 1][0].type = EMPTY_TYPE;
grid[0][ny + 1].type = grid[nx + 1][ny + 1].type = EMPTY_TYPE;
num_instances_type[EMPTY_TYPE->index] = 4;
for(i = 1; i <= nx; i++)
{
grid[i][0].blocks =
(int *)my_malloc(sizeof(int) * IO_TYPE->capacity);
grid[i][0].type = IO_TYPE;
grid[i][ny + 1].blocks =
(int *)my_malloc(sizeof(int) * IO_TYPE->capacity);
grid[i][ny + 1].type = IO_TYPE;
for(j = 0; j < IO_TYPE->capacity; j++)
{
grid[i][0].blocks[j] = EMPTY;
grid[i][ny + 1].blocks[j] = EMPTY;
}
}
for(i = 1; i <= ny; i++)
{
grid[0][i].blocks =
(int *)my_malloc(sizeof(int) * IO_TYPE->capacity);
grid[0][i].type = IO_TYPE;
grid[nx + 1][i].blocks =
(int *)my_malloc(sizeof(int) * IO_TYPE->capacity);
grid[nx + 1][i].type = IO_TYPE;
for(j = 0; j < IO_TYPE->capacity; j++)
{
grid[0][i].blocks[j] = EMPTY;
grid[nx + 1][i].blocks[j] = EMPTY;
}
}
num_instances_type[IO_TYPE->index] = 2 * IO_TYPE->capacity * (nx + ny);
for(i = 1; i <= nx; i++)
{ /* Interior (LUT) cells */
type = find_type_col(i);
for(j = 1; j <= ny; j++)
{
grid[i][j].type = type;
grid[i][j].offset = (j - 1) % type->height;
if(j + grid[i][j].type->height - 1 - grid[i][j].offset >
ny)
{
grid[i][j].type = EMPTY_TYPE;
grid[i][j].offset = 0;
}
if(type->capacity > 1)
{
printf(ERRTAG
"In FillArch() expected core blocks to have capacity <= 1 but "
"(%d, %d) has type '%s' and capacity %d\n",
i, j, grid[i][j].type->name,
grid[i][j].type->capacity);
exit(1);
}
grid[i][j].blocks = (int *)my_malloc(sizeof(int));
grid[i][j].blocks[0] = EMPTY;
if(grid[i][j].offset == 0)
{
num_instances_type[grid[i][j].type->index]++;
}
}
}
CheckGrid();
#ifdef SHOW_ARCH
/* DEBUG code */
dump = my_fopen("grid_type_dump.txt", "w", 0);
for(j = (ny + 1); j >= 0; --j)
{
for(i = 0; i <= (nx + 1); ++i)
{
fprintf(dump, "%c", grid[i][j].type->name[1]);
}
fprintf(dump, "\n");
}
fclose(dump);
#endif
}
/* Create and fill FPGA architecture grid. */
void alloc_and_load_grid(INOUTP int *num_instances_type, const t_arch *arch) {
int i, j;
t_type_ptr type;
#ifdef SHOW_ARCH
FILE *dump;
#endif
/* To remove this limitation, change ylow etc. in t_rr_node to *
* * be ints instead. Used shorts to save memory. */
if ((nx > 32766) || (ny > 32766)) {
vpr_printf(TIO_MESSAGE_ERROR, "nx and ny must be less than 32767, since the router uses shorts (16-bit) to store coordinates.\n");
vpr_printf(TIO_MESSAGE_ERROR, "nx: %d, ny: %d\n", nx, ny);
exit(1);
}
assert(nx >= 1 && ny >= 1);
grid = (struct s_grid_tile **) alloc_matrix(0, (nx + 1), 0, (ny + 1),
sizeof(struct s_grid_tile));
/* Clear the full grid to have no type (NULL), no capacity, etc */
for (i = 0; i <= (nx + 1); ++i) {
for (j = 0; j <= (ny + 1); ++j) {
memset(&grid[i][j], 0, (sizeof(struct s_grid_tile)));
}
}
for (i = 0; i < num_types; i++) {
num_instances_type[i] = 0;
}
/* Nothing goes in the corners. */
grid[0][0].type = grid[nx + 1][0].type = EMPTY_TYPE;
grid[0][ny + 1].type = grid[nx + 1][ny + 1].type = EMPTY_TYPE;
num_instances_type[EMPTY_TYPE->index] = 4;
for (i = 1; i <= nx; i++) {
grid[i][0].blocks = (int *) my_malloc(sizeof(int) * IO_TYPE->capacity);
grid[i][0].type = IO_TYPE;
grid[i][ny + 1].blocks = (int *) my_malloc(
sizeof(int) * IO_TYPE->capacity);
grid[i][ny + 1].type = IO_TYPE;
for (j = 0; j < IO_TYPE->capacity; j++) {
grid[i][0].blocks[j] = EMPTY;
grid[i][ny + 1].blocks[j] = EMPTY;
}
}
for (i = 1; i <= ny; i++) {
grid[0][i].blocks = (int *) my_malloc(sizeof(int) * IO_TYPE->capacity);
grid[0][i].type = IO_TYPE;
grid[nx + 1][i].blocks = (int *) my_malloc(
sizeof(int) * IO_TYPE->capacity);
grid[nx + 1][i].type = IO_TYPE;
for (j = 0; j < IO_TYPE->capacity; j++) {
grid[0][i].blocks[j] = EMPTY;
grid[nx + 1][i].blocks[j] = EMPTY;
}
}
num_instances_type[IO_TYPE->index] = 2 * IO_TYPE->capacity * (nx + ny);
for (i = 1; i <= nx; i++) { /* Interior (LUT) cells */
type = find_type_col(i);
for (j = 1; j <= ny; j++) {
grid[i][j].type = type;
if (type != IO_TYPE) {
int k;
grid[i][j].offset = (j - 1) % type->height;
if (j + grid[i][j].type->height - 1 - grid[i][j].offset > ny) {
grid[i][j].type = EMPTY_TYPE;
grid[i][j].offset = 0;
}
//if (type->capacity > 1) {
// vpr_printf(TIO_MESSAGE_ERROR, "in FillArch(), expected core blocks to have capacity <= 1 but (%d, %d) has type '%s' and capacity %d.\n",
// i, j, grid[i][j].type->name, grid[i][j].type->capacity);
// exit(1);
//}
grid[i][j].blocks = (int *) my_malloc(sizeof(int) * type->capacity);
for (k = 0; k < type->capacity; ++k) {
grid[i][j].blocks[k] = EMPTY;
if (grid[i][j].offset == 0) {
num_instances_type[grid[i][j].type->index]++;
}
}
}
else {
int k;
grid[i][j].blocks = (int *)my_malloc(sizeof(int) * IO_TYPE->capacity);
for(k = 0; k < IO_TYPE->capacity; k++)
{
grid[i][j].blocks[k] = EMPTY;
if(grid[i][j].offset == 0)
{
num_instances_type[IO_TYPE->index]++;
}
}
}
}
}
/* EH: Add support for overriding blocks */
for (i = 0; i < arch->num_overrides; i++)
{
int startx, starty, endx, endy, incx, incy;
int x, y, h;
int itype;
startx = arch->overrides[i].startx;
starty = arch->overrides[i].starty;
endx = arch->overrides[i].endx;
endy = arch->overrides[i].endy;
incx = arch->overrides[i].incx;
incy = arch->overrides[i].incy;
assert(startx >= 0 && startx <= nx+1);
assert(starty >= 0 && starty <= ny+1);
assert(endx >= 0 && endx <= (nx+1)+1);
assert(endy >= 0 && endy <= (ny+1)+1);
assert(incx > 0 && incx <= nx+1);
assert(incy > 0 && incy <= ny+1);
for (itype = 0; itype < num_types; itype++) {
if (strcmp(type_descriptors[itype].name, arch->overrides[i].type) == 0)
break;
}
if (itype == num_types) {
vpr_printf(TIO_MESSAGE_ERROR, "overrideslist type %s not recognised!\n", arch->overrides[i].type);
exit(1);
}
for (x = startx; x <= endx; x += incx)
{
for (y = starty; y <= endy; y += incy)
{
type = grid[x][y].type;
if (grid[x][y].offset == 0)
num_instances_type[type->index] -= type->capacity;
if (&type_descriptors[itype] == EMPTY_TYPE)
++num_instances_type[type_descriptors[itype].index];
else
num_instances_type[type_descriptors[itype].index] += type_descriptors[itype].capacity;
for (h = 0; h < type_descriptors[itype].height; ++h) {
assert(y+h <= (ny+1));
grid[x][y+h].type = &type_descriptors[itype];
grid[x][y+h].offset = h;
}
}
}
}
CheckGrid();
#ifdef SHOW_ARCH
/* DEBUG code */
dump = my_fopen("grid_type_dump.txt", "w", 0);
for (j = (ny + 1); j >= 0; --j)
{
for (i = 0; i <= (nx + 1); ++i)
{
fprintf(dump, "%c", grid[i][j].type->name[1]);
}
fprintf(dump, "\n");
}
fclose(dump);
#endif
}
