/* Setup master controller */
static void setupMaster(void)
{
SPIM_DELAY_CONFIG_T masterDelay;
/* Initialize SPI controller */
Chip_SPI_Init(LPC_SPIMASTERPORT);
/* Call to initialize first SPI controller for mode0, master mode, MSB first */
Chip_SPI_ConfigureSPI(LPC_SPIMASTERPORT, SPI_MODE_MASTER | /* Enable master mode */
SPI_CLOCK_CPHA0_CPOL0 | /* Set Clock polarity to 0 */
SPI_CFG_MSB_FIRST_EN |/* Enable MSB first option */
SPI_CFG_SPOL_LO); /* Chipselect is active low */
/* Setup master clock rate, slave clock doesn't need to be setup */
Chip_SPIM_SetClockRate(LPC_SPIMASTERPORT, LPCMASTERCLOCKRATE);
/* Setup master delay (all chip selects) */
masterDelay.PreDelay = 0xD;
masterDelay.PostDelay = 0xD;
masterDelay.FrameDelay = 0xD;
masterDelay.TransferDelay = 0xD;
Chip_SPIM_DelayConfig(LPC_SPIMASTERPORT, &masterDelay);
/* For the SPI controller configured in master mode, enable SPI master interrupts
for interrupt service. Do not enable SPI_INTENSET_TXDYEN. */
Chip_SPI_EnableInts(LPC_SPIMASTERPORT, (SPI_INTENSET_RXDYEN |
SPI_INTENSET_RXOVEN | SPI_INTENSET_TXUREN | SPI_INTENSET_SSAEN |
SPI_INTENSET_SSDEN));
/* Setup master transfer callbacks in the transfer descriptor */
spiMasterXfer.pCB = &spiMasterCallbacks;
}
/* Setup slave controller */
static void setupSlave(void)
{
/* Initialize SPI controller */
Chip_SPI_Init(LPC_SPISLAVEPORT);
/* Call to initialize first SPI controller for mode0, master mode, MSB first */
Chip_SPI_ConfigureSPI(LPC_SPISLAVEPORT, SPI_MODE_SLAVE |/* Enable slave mode */
SPI_CLOCK_CPHA0_CPOL0 | /* Set Clock polarity to 0 */
SPI_CFG_MSB_FIRST_EN |/* Enable MSB first option */
SPI_CFG_SPOL_LO); /* Chipselect is active low */
/* Initialize SPI controllers */
Chip_SPI_Init(LPC_SPISLAVEPORT);
/* Setup slave controller for 8-bit transfer. Sizes can be altered later
for each slave select in the slave select assertion callback once the
transfer starts if needed. The master slave transfer size is setup as
part of the master transfer description in the options field. */
Chip_SPI_SetXferSize(LPC_SPISLAVEPORT, 16);
/* For the SPI controller configured in slave mode, enable SPI slave interrupts
for interrupt service. Do not enable SPI_INTENSET_TXDYEN. */
Chip_SPI_EnableInts(LPC_SPISLAVEPORT, (SPI_INTENSET_RXDYEN |
SPI_INTENSET_RXOVEN | SPI_INTENSET_TXUREN | SPI_INTENSET_SSAEN |
SPI_INTENSET_SSDEN));
/* Setup slave transfer callbacks in the transfer descriptor */
spiSlaveXfer.pCB = &spiSlaveCallbacks;
}
/* Disable/Enable Interrupt */
void Chip_SPI_Int_Cmd(LPC_SPI_T *pSPI, uint32_t IntMask, FunctionalState NewState)
{
if (NewState == ENABLE) {
Chip_SPI_EnableInts(pSPI, IntMask);
}
else {
Chip_SPI_DisableInts(pSPI, IntMask);
}
}
