void cs8556_reinitialize_table(void)
{
int count = 0 ;
ulong addr0 = 0x0000 ;
ulong addr1 = 0x0100 ;
char* table0 = cs8556_getTable0();
char* table1 = cs8556_getTable1();
DBG_DETAIL("Start\n");
DBG_DETAIL("cs8556: cs8556_i2c_write START.\n");
for(count = 0; count < encoder_table_size; count++)
{
cs8556_i2c_write(addr0++, table0[count]);
cs8556_i2c_write(addr1++, table1[count]);
}
DBG_DETAIL("cs8556: cs8556_i2c_write END.\n");
cs8556_dumpRegs();
DBG_DETAIL("End\n");
}
void govw_set_timing(vpp_clock_t *timing,unsigned int pixel_clock)
{
int tg_bk;
DBG_MSG("govw set timing\n");
timing->read_cycle = ( timing->read_cycle < WMT_GOVW_RCYC_MIN )? WMT_GOVW_RCYC_MIN:timing->read_cycle;
timing->read_cycle = ( timing->read_cycle > 255 )? 0xFF:timing->read_cycle;
tg_bk = vppif_reg32_read(GOVW_TG_ENABLE);
vppif_reg32_write(GOVW_TG_ENABLE,0);
vppif_reg32_write(GOVW_TG_RDCYC,timing->read_cycle);
vppif_reg32_write(GOVW_TG_H_ALLPIXEL,timing->total_pixel_of_line);
vppif_reg32_write(GOVW_TG_H_ACTBG,timing->begin_pixel_of_active);
vppif_reg32_write(GOVW_TG_H_ACTEND,timing->end_pixel_of_active);
vppif_reg32_write(GOVW_TG_V_ALLLINE,timing->total_line_of_frame);
vppif_reg32_write(GOVW_TG_V_ACTBG,timing->begin_line_of_active);
vppif_reg32_write(GOVW_TG_V_ACTEND,timing->end_line_of_active);
vppif_reg32_write(GOVW_TG_VBIE,timing->line_number_between_VBIS_VBIE);
//vppif_reg32_write(GOVW_TG_PVBI,timing->line_number_between_PVBI_VBIS);
vppif_reg32_write(GOVW_TG_PVBI,10);
vppif_reg32_write(GOVW_TG_ENABLE,tg_bk);
DBG_DETAIL("H beg %d,end %d,total %d\n",
timing->begin_pixel_of_active,timing->end_pixel_of_active,timing->total_pixel_of_line);
DBG_DETAIL("V beg %d,end %d,total %d\n",
timing->begin_line_of_active,timing->end_line_of_active,timing->total_line_of_frame);
}
void scl_set_timing(vpp_clock_t *timing,unsigned int pixel_clock)
{
#if 1
timing->read_cycle = WMT_SCL_RCYC_MIN;
#else
timing->read_cycle = scl_set_clock(pixel_clock * 2) - 1;
timing->read_cycle = ( timing->read_cycle < WMT_SCL_RCYC_MIN )? WMT_SCL_RCYC_MIN:timing->read_cycle;
timing->read_cycle = ( timing->read_cycle > 255 )? 0xFF:timing->read_cycle;
#endif
vppif_reg32_write(SCL_TG_RDCYC, timing->read_cycle);
vppif_reg32_write(SCL_READCYC_1T,(timing->read_cycle)? 0:1);
vppif_reg32_write(SCL_TG_H_ALLPIXEL, timing->total_pixel_of_line);
vppif_reg32_write(SCL_TG_H_ACTBG, timing->begin_pixel_of_active);
vppif_reg32_write(SCL_TG_H_ACTEND, timing->end_pixel_of_active);
vppif_reg32_write(SCL_TG_V_ALLLINE, timing->total_line_of_frame);
vppif_reg32_write(SCL_TG_V_ACTBG, timing->begin_line_of_active);
vppif_reg32_write(SCL_TG_V_ACTEND, timing->end_line_of_active);
vppif_reg32_write(SCL_TG_VBIE, timing->line_number_between_VBIS_VBIE);
vppif_reg32_write(SCL_TG_PVBI, timing->line_number_between_PVBI_VBIS);
DBG_DETAIL("H beg %d,end %d,total %d\n",
timing->begin_pixel_of_active,timing->end_pixel_of_active,timing->total_pixel_of_line);
DBG_DETAIL("V beg %d,end %d,total %d\n",
timing->begin_line_of_active,timing->end_line_of_active,timing->total_line_of_frame);
}
char *vout_get_edid(int no)
{
vout_t *vo;
int ret;
DBG_DETAIL("(%d)\n",no);
if( (vo = vout_get_entry(no)) == 0 ){
return 0;
}
if( vo->status & VPP_VOUT_STS_EDID ){
DBG_MSG("edid exist\n");
return vo->edid;
}
vout_change_status(vo,VPP_VOUT_STS_EDID,0);
#ifdef CONFIG_VOUT_EDID_ALLOC
if( vo->edid == 0 ){
// DBG_MSG("edid buf alloc\n");
vo->edid = (char *) kmalloc(128*EDID_BLOCK_MAX,GFP_KERNEL);
if( !vo->edid ){
DBG_ERR("edid buf alloc\n");
return 0;
}
}
#endif
ret = 1;
if( vo->dev && vo->dev->get_edid ){
ret = vo->dev->get_edid(vo->edid);
}
else {
if( vo->inf->get_edid ){
ret = vo->inf->get_edid(vo,(int)vo->edid);
}
}
if( ret == 0 ){
vout_info_t *info;
DBG_DETAIL("edid read\n");
vout_change_status(vo,VPP_VOUT_STS_EDID,1);
if( (info = vout_get_info_entry((g_vpp.virtual_display)?1:no)) ){
info->force_config = 1;
}
return vo->edid;
}
else {
DBG_ERR("read edid fail\n");
}
#ifdef CONFIG_VOUT_EDID_ALLOC
if( vo->edid ){
kfree(vo->edid);
vo->edid = 0;
}
#endif
return 0;
}
static int hwdac_pcm_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
{
DBG_DETAIL();
return 0;
}
/*
* initialise the hwdac driver
* register the mixer and dsp interfaces with the kernel
*/
static int wmt_hwdac_init(struct snd_soc_device *socdev)
{
struct snd_soc_codec *codec = socdev->card->codec;
int ret = 0;
DBG_DETAIL();
codec->name = "HWDAC";
codec->owner = THIS_MODULE;
codec->dai = &hwdac_dai;
codec->num_dai = 1;
/* register pcms */
ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
if (ret < 0) {
printk(KERN_ERR "hwdac: failed to create pcms\n");
goto pcm_err;
}
ret = snd_soc_init_card(socdev);
if (ret < 0) {
printk(KERN_ERR "hwdac: failed to register card\n");
goto card_err;
}
return ret;
card_err:
snd_soc_free_pcms(socdev);
pcm_err:
return ret;
}
static void vo_do_plug
(
void *ptr /*!<; // work input data */
)
#endif
{
vout_t *vo;
int plugin;
if( vo_plug_func == 0 )
return;
vo = vout_get_entry(vo_plug_vout);
govrh_set_dvo_enable(vo->govr,1);
plugin = vo_plug_func(1);
govrh_set_dvo_enable(vo->govr,plugin);
vout_change_status(vo,VPP_VOUT_STS_PLUGIN,plugin);
vo_plug_flag = 0;
DBG_DETAIL("vo_do_plug %d\n",plugin);
vppif_reg32_write(GPIO_BASE_ADDR+0x300+VPP_VOINT_NO,0x80,7,1); // GPIO irq enable
vppif_reg32_write(GPIO_BASE_ADDR+0x80,0x1<<VPP_VOINT_NO,VPP_VOINT_NO,0x0); // GPIO input mode
#ifdef __KERNEL__
vpp_netlink_notify(USER_PID,DEVICE_PLUG_IN,plugin);
vpp_netlink_notify(WP_PID,DEVICE_PLUG_IN,plugin);
#endif
return;
}
int vout_chkplug(int no)
{
vout_t *vo;
vout_inf_t *inf;
int ret = 0;
DBG_DETAIL("(%d)\n",no);
if( (vo = vout_get_entry(no)) == 0 ){
return 0;
}
if( vo->inf == 0 ){
return 0;
}
if( (inf = vout_inf_get_entry(vo->inf->mode)) == 0 ){
return 0;
}
if( vo->dev && vo->dev->check_plugin ){
ret = vo->dev->check_plugin(0);
}
else {
ret = inf->chkplug(vo,0);
}
vout_change_status(vo,VPP_VOUT_STS_PLUGIN,ret);
return ret;
}
static int __devexit wmt_pdm_pcm_platform_remove(struct platform_device *pdev)
{
DBG_DETAIL();
snd_soc_unregister_platform(&pdev->dev);
return 0;
}
static int wmt_pdm_pcm_open(struct snd_pcm_substream *substream)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
struct snd_pcm_runtime *runtime = substream->runtime;
struct audio_stream_a *s = runtime->private_data;
int ret;
DBG_DETAIL();
if (!cpu_dai->active) {
audio_dma_request(&s[0], audio_dma_callback);
audio_dma_request(&s[1], audio_dma_callback);
}
snd_soc_set_runtime_hwparams(substream, &wmt_pdm_pcm_hardware);
/* Ensure that buffer size is a multiple of period size */
ret = snd_pcm_hw_constraint_integer(runtime,
SNDRV_PCM_HW_PARAM_PERIODS);
if (ret < 0)
goto out;
out:
return ret;
}
static int wmt_pdm_pcm_preallocate_dma_buffer(struct snd_pcm *pcm,
int stream)
{
struct snd_pcm_substream *substream = pcm->streams[stream].substream;
struct snd_dma_buffer *buf = &substream->dma_buffer;
size_t size = wmt_pdm_pcm_hardware.buffer_bytes_max;
DBG_DETAIL();
buf->dev.type = SNDRV_DMA_TYPE_DEV;
buf->dev.dev = pcm->card->dev;
buf->private_data = NULL;
buf->area = dma_alloc_writecombine(pcm->card->dev, size,
&buf->addr, GFP_KERNEL);
if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
/* allocate buffer for format transfer */
dump_buf[0].area = dma_alloc_writecombine(pcm->card->dev, (4 * size),
&(dump_buf[stream].addr), GFP_KERNEL);
}
printk("buf_area = %x, buf_addr = %x", (unsigned int)buf->area, buf->addr);
if (!buf->area)
return -ENOMEM;
buf->bytes = size;
return 0;
}
static int wmt_pdm_pcm_new(struct snd_card *card, struct snd_soc_dai *dai,
struct snd_pcm *pcm)
{
int ret = 0;
DBG_DETAIL();
if (!card->dev->dma_mask)
card->dev->dma_mask = &wmt_pdm_pcm_dmamask;
if (!card->dev->coherent_dma_mask)
card->dev->coherent_dma_mask = DMA_BIT_MASK(32);
if (dai->driver->playback.channels_min) {
ret = wmt_pdm_pcm_preallocate_dma_buffer(pcm,
SNDRV_PCM_STREAM_PLAYBACK);
if (ret)
goto out;
}
if (dai->driver->capture.channels_min) {
ret = wmt_pdm_pcm_preallocate_dma_buffer(pcm,
SNDRV_PCM_STREAM_CAPTURE);
if (ret)
goto out;
}
out:
return ret;
}
static void wmt_pdm_pcm_free_dma_buffers(struct snd_pcm *pcm)
{
struct snd_pcm_substream *substream;
struct snd_dma_buffer *buf;
int stream;
DBG_DETAIL();
for (stream = 0; stream < 2; stream++) {
substream = pcm->streams[stream].substream;
if (!substream)
continue;
buf = &substream->dma_buffer;
if (!buf->area)
continue;
dma_free_writecombine(pcm->card->dev, buf->bytes,
buf->area, buf->addr);
if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
dma_free_writecombine(pcm->card->dev, 4 * buf->bytes,
dump_buf[stream].area, dump_buf[stream].addr);
}
buf->area = NULL;
}
}
static int wmt_pdm_pcm_resume(struct snd_soc_dai *dai)
{
struct snd_pcm_runtime *runtime = dai->runtime;
struct audio_stream_a *prtd;
struct audio_stream_a *s;
DBG_DETAIL();
if (!runtime)
return 0;
prtd = runtime->private_data;
s = &prtd[SNDRV_PCM_STREAM_PLAYBACK];
audio_setup_dma(s, SNDRV_PCM_STREAM_PLAYBACK);
if (s->active) {
wmt_resume_dma(s->dmach) ;
}
s = &prtd[SNDRV_PCM_STREAM_CAPTURE];
audio_setup_dma(s, SNDRV_PCM_STREAM_CAPTURE);
if (s->active) {
wmt_resume_dma(s->dmach) ;
}
return 0;
}
int vout_check_info(unsigned int mask,vout_info_t *info)
{
vpp_timing_t *p_timing;
int no = VPP_VOUT_NUM;
int i;
DBG_DETAIL("(0x%x)\n",mask);
for(i=0;i<VPP_VOUT_NUM;i++){
if( (mask & (0x1 << i)) == 0 )
continue;
if( no == VPP_VOUT_NUM ){
no = i; // get first vo
}
if( vout_chkplug(i) ){
no = i;
break;
}
}
if( (p_timing = vout_find_video_mode(no,info)) == 0 ){
DBG_ERR("no support mode\n");
return -1;
}
return 0;
}
int vout_set_mode(int no,vout_inf_mode_t mode)
{
vout_t *vo;
DBG_DETAIL("(%d,%d)\n",no,mode);
if( vout_query_inf_support(no,mode)==0 ){
DBG_ERR("not support this interface(%d,%d)\n",no,mode);
return -1;
}
vo = vout_get_entry(no);
if( vo->inf ){
if( vo->inf->mode == mode )
return 0;
vo->inf->uninit(vo,0);
vout_change_status(vo,VPP_VOUT_STS_ACTIVE,0);
if( vo->dev )
vo->dev->set_power_down(1);
}
vo->inf = vout_inf_get_entry(mode);
vo->dev = ( vo->ext_dev && (vo->ext_dev->mode == mode) )? vo->ext_dev:0;
vo->inf->init(vo,0);
vout_change_status(vo,VPP_VOUT_STS_ACTIVE,1);
return 0;
}
void lvds_set_rgb_type(int bpp)
{
int mode;
int mode_change = 0x2;
DBG_DETAIL("(%d)\n", bpp);
/* 0:888, 1-555, 2-666, 3-565 */
switch (bpp) {
case 15:
mode = 1;
break;
case 16:
mode = 3;
break;
case 18:
mode = 2;
break;
case 24:
default:
mode = 0;
mode_change = 0x0;
break;
}
#if 1 /* IGS default */
mode = 4;
#endif
lvds_regs->status.b.test = mode_change;
lvds_regs->igs.b.bpp_type = mode;
}
static int wmt_pdm_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
{
struct snd_pcm_runtime *runtime = substream->runtime;
int stream_id = substream->pstr->stream;
struct audio_stream_a *prtd = runtime->private_data;
struct audio_stream_a *s = &prtd[stream_id];
int ret = 0;
DBG_DETAIL();
DPRINTK("Enter, cmd=%d", cmd);
spin_lock(&s->dma_lock);
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_RESUME:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
s->active = 1;
audio_process_dma(s);
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
s->active = 0;
audio_stop_dma(s);
/*prtd->period_index = -1;*/
break;
default:
ret = -EINVAL;
}
spin_unlock(&s->dma_lock);
return ret;
}
static int wmt_pdm_pcm_hw_free(struct snd_pcm_substream *substream)
{
DBG_DETAIL();
snd_pcm_set_runtime_buffer(substream, NULL);
return 0;
}
/*----------------------- Function Body --------------------------------------*/
void lvds_set_power_down(int pwrdn)
{
DBG_DETAIL("(%d)\n", pwrdn);
lvds_regs->test.b.pd = pwrdn;
mdelay(1);
lvds_regs->test2.b.pd_l2ha = pwrdn;
}
static int __devexit hwdac_platform_remove(struct platform_device *pdev)
{
DBG_DETAIL();
snd_soc_unregister_codec(&pdev->dev);
return 0;
}
/* audio_setup_dma()
*
* Just a simple funcion to control DMA setting for AC'97 audio
*/
static void audio_setup_dma(struct audio_stream_a *s, int stream_id)
{
#ifdef CONFIG_SND_WMT_SOC_AC97
struct snd_pcm_runtime *runtime = s->stream->runtime;
#endif
DBG_DETAIL();
#ifdef CONFIG_SND_WMT_SOC_I2S
if (!strcmp(wmt_dai_name, "i2s")) {
if (stream_id == SNDRV_PCM_STREAM_PLAYBACK)
s->dma_cfg.DefaultCCR = I2S_TX_DMA_32BITS_CFG ;
else
s->dma_cfg.DefaultCCR = I2S_RX_DMA_32BITS_CFG ;
}
#endif
#ifdef CONFIG_SND_WMT_SOC_AC97
if (!strcmp(wmt_dai_name, "ac97")) {
if (stream_id == SNDRV_PCM_STREAM_PLAYBACK) {
/* From memory to device */
switch (runtime->channels * runtime->format) {
case 1:
s->dma_cfg.DefaultCCR = AC97_TX_DMA_8BITS_CFG; /* setup 1 bytes*/
break ;
case 2:
s->dma_cfg.DefaultCCR = AC97_TX_DMA_16BITS_CFG; /* setup 2 bytes*/
break ;
case 4:
s->dma_cfg.DefaultCCR = AC97_TX_DMA_32BITS_CFG; /* setup 4 byte*/
break ;
}
}
else {
/* From device to memory */
switch (runtime->channels * runtime->format) {
case 1:
s->dma_cfg.DefaultCCR = AC97_RX_DMA_8BITS_CFG ; /* setup 1 bytes*/
break ;
case 2:
s->dma_cfg.DefaultCCR = AC97_RX_DMA_16BITS_CFG ; /* setup 2 bytes*/
break ;
case 4:
s->dma_cfg.DefaultCCR = AC97_RX_DMA_32BITS_CFG ; /* setup 4 byte*/
break ;
}
}
}
#endif
s->dma_cfg.ChunkSize = 1;
if (stream_id == SNDRV_PCM_STREAM_PLAYBACK) {
pcm_out_dma_cfg = &s->dma_cfg;
}
//DPRINTK("s pointer: %d. audio dma %d cfg.DefaultCCR 0x%x ", (int)s, s->dmach, (unsigned int)s->dma_cfg.DefaultCCR);
//DPRINTK("cfg.ChunkSize 0x%x ", s->dma_cfg.ChunkSize);
wmt_setup_dma(s->dmach, s->dma_cfg) ;
}
void cs8556_set_power_down(int enable)
{
if( cs8556_not_ready )
return;
DBG_DETAIL("cs8556_set_power_down(%d)\n",enable);
//cs8556_reinitialize_table();
}
int vout_config(unsigned int mask,vout_info_t *info)
{
vout_t *vo;
vpp_timing_t *p_timing;
int no = VPP_VOUT_NUM;
int i;
unsigned int govr_mask = 0;
DBG_DETAIL("(0x%x)\n",mask);
if( mask == 0 )
return 0;
for(i=0;i<VPP_VOUT_NUM;i++){
if( (mask & (0x1 << i)) == 0 )
continue;
if( no == VPP_VOUT_NUM ){
no = i; // get first vo
}
if( vout_chkplug(i) ){
no = i;
break;
}
}
if( (p_timing = vout_find_video_mode(no,info)) == 0 ){
return -1;
}
info->option = p_timing->option;
for(i=0;i<VPP_VOUT_NUM;i++){
if( (mask & (0x1 << i)) == 0 )
continue;
if( (vo = vout_get_entry(i)) == 0 )
continue;
if( vo->govr == 0 )
continue;
if( (govr_mask & (0x1 << vo->govr->mod)) == 0 ){
govrh_set_timing(vo->govr,p_timing);
govr_mask |= (0x1 << vo->govr->mod);
}
if( vo->inf ){
vo->inf->config(vo,(int)info);
if( vo->dev )
vo->dev->config(info);
}
}
return 0;
}
static int audio_dma_free(struct audio_stream_a *s)
{
int err = 0;
DBG_DETAIL();
wmt_free_dma(s->dmach);
s->dmach = NULL_DMA;
return err;
}
int cs8556_set_mode(unsigned int *option)
{
vpp_datawidht_t dwidth;
if( cs8556_not_ready )
return -1;
dwidth = option[1] & BIT0;
DBG_DETAIL("cs8556_set_mode(%d)\n",(dwidth)?24:12);
return 0;
}
static int wmt_pdm_pcm_mmap(struct snd_pcm_substream *substream,
struct vm_area_struct *vma)
{
struct snd_pcm_runtime *runtime = substream->runtime;
DBG_DETAIL();
return dma_mmap_writecombine(substream->pcm->card->dev, vma,
runtime->dma_area,
runtime->dma_addr,
runtime->dma_bytes);
}
/* this may get called several times by oss emulation */
static int wmt_pdm_pcm_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
struct snd_pcm_runtime *runtime = substream->runtime;
int err = 0;
DBG_DETAIL();
snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
runtime->dma_bytes = params_buffer_bytes(params);
return err;
}
/* power down chip */
static int hwdac_remove(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
struct snd_soc_codec *codec = socdev->card->codec;
DBG_DETAIL();
snd_soc_free_pcms(socdev);
kfree(codec);
return 0;
}
static int audio_dma_request(struct audio_stream_a *s, void (*callback) (void *))
{
int err;
err = 0;
DBG_DETAIL();
//DPRINTK("s pointer: %d, dmach: %d, id: %s, dma_dev: %d", (int)s, s->dmach, s->id, s->dma_dev);
err = wmt_request_dma(&s->dmach, s->id, s->dma_dev, callback, s);
if (err < 0)
printk(KERN_ERR "Unable to grab audio dma 0x%x\n", s->dmach);
return err;
}
