void board_add_ram_info(int use_default) { PPC4xx_SYS_INFO board_cfg; u32 val; mfsdram(DDR0_22, val); val &= DDR0_22_CTRL_RAW_MASK; switch (val) { case DDR0_22_CTRL_RAW_ECC_DISABLE: puts(" (ECC disabled"); break; case DDR0_22_CTRL_RAW_ECC_CHECK_ONLY: puts(" (ECC check only"); break; case DDR0_22_CTRL_RAW_NO_ECC_RAM: puts(" (no ECC ram"); break; case DDR0_22_CTRL_RAW_ECC_ENABLE: puts(" (ECC enabled"); break; } get_sys_info(&board_cfg); printf(", %d MHz", (board_cfg.freqPLB * 2) / 1000000); mfsdram(DDR0_03, val); val = DDR0_03_CASLAT_DECODE(val); printf(", CL%d)", val); }
void board_add_ram_info(int use_default) { PPC4xx_SYS_INFO board_cfg; u32 val; if (is_ecc_enabled()) puts(" (ECC"); else puts(" (ECC not"); get_sys_info(&board_cfg); printf(" enabled, %ld MHz", (board_cfg.freqPLB * 2) / 1000000); mfsdram(DDR0_03, val); val = DDR0_03_CASLAT_DECODE(val); printf(", CL%d)", val); }