static int dma8237_do_operation(int which, int channel) { int done; UINT8 data; UINT8 mode; mode = dma[which].chan[channel].mode; switch(DMA_MODE_OPERATION(mode)) { case 1: data = dma[which].intf->channel_read_func[channel](); dma[which].intf->memory_write_func(channel, dma[which].chan[channel].address, data); dma[which].chan[channel].address += DMA_MODE_DIRECTION(mode); dma[which].chan[channel].count--; done = (dma[which].chan[channel].count == 0xFFFF); break; case 2: data = dma[which].intf->memory_read_func(channel, dma[which].chan[channel].address); dma[which].intf->channel_write_func[channel](data); dma[which].chan[channel].address += DMA_MODE_DIRECTION(mode); dma[which].chan[channel].count--; done = (dma[which].chan[channel].count == 0xFFFF); break; default: done = TRUE; break; } return done; }
void i8237_device::i8237_advance() { int channel = m_service_channel; int mode = m_chan[channel].m_mode; switch ( DMA_MODE_OPERATION( mode ) ) { case DMA8237_VERIFY_TRANSFER: case DMA8237_WRITE_TRANSFER: case DMA8237_READ_TRANSFER: m_chan[channel].m_high_address_changed = 0; if ( DMA_MODE_DIRECTION( mode ) ) { m_chan[channel].m_address -= 1; if ( ( m_chan[channel].m_address & 0xFF ) == 0xFF ) { m_chan[channel].m_high_address_changed = 1; } } else { m_chan[channel].m_address += 1; if ( ( m_chan[channel].m_address & 0xFF ) == 0x00 ) { m_chan[channel].m_high_address_changed = 1; } } m_chan[channel].m_count--; if ( m_chan[channel].m_count == 0xFFFF ) { /* Set TC bit for this channel */ m_status |= ( 0x01 << channel ); if ( DMA_MODE_AUTO_INIT( mode ) ) { m_chan[channel].m_address = m_chan[channel].m_base_address; m_chan[channel].m_count = m_chan[channel].m_base_count; m_chan[channel].m_high_address_changed = 1; } else { m_mask |= ( 0x01 << channel ); } } break; case DMA8237_ILLEGAL_TRANSFER: break; } }
void i8237_device::i8237_do_write() { int channel = m_service_channel; switch( DMA_MODE_OPERATION( m_chan[ channel ].m_mode ) ) { case DMA8237_WRITE_TRANSFER: m_out_memw_func(m_chan[ channel ].m_address, m_temporary_data); break; case DMA8237_READ_TRANSFER: m_chan[channel].m_out_iow_func(0, m_temporary_data); break; case DMA8237_VERIFY_TRANSFER: case DMA8237_ILLEGAL_TRANSFER: break; } }
void i8237_device::i8237_do_read() { int channel = m_service_channel; switch( DMA_MODE_OPERATION( m_chan[ channel ].m_mode ) ) { case DMA8237_WRITE_TRANSFER: m_temporary_data = m_chan[channel].m_in_ior_func(0); break; case DMA8237_READ_TRANSFER: m_temporary_data = m_in_memr_func(m_chan[ channel ].m_address); break; case DMA8237_VERIFY_TRANSFER: case DMA8237_ILLEGAL_TRANSFER: break; } }
static UINT8 dma8237_read(int which, offs_t offset) { UINT8 data = 0xFF; UINT8 mode; dma8237_verify(which); offset &= 0x0F; switch(offset) { case 0: case 2: case 4: case 6: /* DMA address register */ data = dma[which].chan[offset / 2].address >> (dma[which].msb ? 8 : 0); prepare_msb_flip(which); /* hack simulating refresh activity for 'ibmxt' BIOS; I do not know * why this is needed; but in any case, the ibmxt driver does not load * if this code is not present */ mode = dma[which].chan[0].mode; if ((DMA_MODE_OPERATION(mode) == 2) && (offset == 0)) { dma[which].chan[0].address++; dma[which].chan[0].count--; } break; case 1: case 3: case 5: case 7: /* DMA count register */ data = dma[which].chan[offset / 2].count >> (dma[which].msb ? 8 : 0); prepare_msb_flip(which); break; case 8: /* DMA status register */ data = (UINT8) dma[which].status; break; case 10: /* DMA mask register */ data = dma[which].mask; break; case 13: /* DMA master clear */ data = dma[which].temp; break; case 9: /* DMA write request register */ case 11: /* DMA mode register */ case 12: /* DMA clear byte pointer flip-flop */ case 14: /* DMA clear mask register */ case 15: /* DMA write mask register */ data = 0xFF; break; } return data; }