// protected by sem_early_suspend
DISP_STATUS dsi_capture_framebuffer(UINT32 pvbuf, UINT32 bpp)
{
DSI_CHECK_RET(DSI_WaitForNotBusy());
DDMS_capturing=1;
if(lcm_params->dsi.mode == CMD_MODE)
{
LCD_CHECK_RET(LCD_EnableDCtoDsi(FALSE));
#ifndef MT65XX_NEW_DISP
LCD_CHECK_RET(LCD_Capture_Framebuffer(pvbuf, bpp));
#else
DSI_CHECK_RET(DSI_Capture_Framebuffer(pvbuf, bpp, true));//cmd mode
#endif
}
else
{
#ifndef MT65XX_NEW_DISP
DPI_CHECK_RET(DPI_Capture_Framebuffer(pvbuf, bpp));
#else
DSI_CHECK_RET(DSI_Capture_Framebuffer(pvbuf, bpp, false));//video mode
#endif
}
if(lcm_params->dsi.mode == CMD_MODE)
{
LCD_CHECK_RET(LCD_EnableDCtoDsi(TRUE));
}
DDMS_capturing=0;
return DISP_STATUS_OK;
}
// protected by sem_early_suspend
DISP_STATUS dsi_capture_framebuffer(UINT32 pvbuf, UINT32 bpp)
{
DSI_CHECK_RET(DSI_WaitForNotBusy());
DDMS_capturing=1;
if(lcm_params->dsi.mode == CMD_MODE)
{
LCD_CHECK_RET(LCD_EnableDCtoDsi(FALSE));
LCD_CHECK_RET(LCD_Capture_Framebuffer(pvbuf, bpp));
}
else
{
DPI_CHECK_RET(DPI_Capture_Framebuffer(pvbuf, bpp));
}
if(lcm_params->dsi.mode == CMD_MODE)
{
LCD_CHECK_RET(LCD_EnableDCtoDsi(TRUE));
}
DDMS_capturing=0;
return DISP_STATUS_OK;
}
UINT32 mt65xx_disp_get_lcd_time(void)
{
#if 0
UINT32 time0, time1, lcd_time;
mt65xx_disp_update(0, 0, CFG_DISPLAY_WIDTH, CFG_DISPLAY_HEIGHT);
LCD_CHECK_RET(LCD_WaitForNotBusy());
time0 = gpt4_tick2time_us(gpt4_get_current_tick());
LCD_CHECK_RET(LCD_StartTransfer(FALSE));
if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode==CMD_MODE) {
DSI_clk_HS_mode(1);
DSI_CHECK_RET(DSI_EnableClk());
}
else if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode!=CMD_MODE) {
DSI_clk_HS_mode(1);
DPI_CHECK_RET(DPI_EnableClk());
DSI_CHECK_RET(DSI_EnableClk());
}
LCD_CHECK_RET(LCD_WaitForNotBusy());
time1 = gpt4_tick2time_us(gpt4_get_current_tick());
lcd_time = time1 - time0;
printf("lcd one %d \n", lcd_time);
if(0 != lcd_time)
return (100000000/lcd_time);
else
#endif
return (6000);
}
DISP_STATUS DISP_UpdateScreen(UINT32 x, UINT32 y, UINT32 width, UINT32 height)
{
LCD_CHECK_RET(LCD_WaitForNotBusy());
if ((lcm_drv->update) &&
((lcm_params->type==LCM_TYPE_DBI) || ((lcm_params->type==LCM_TYPE_DSI) && (lcm_params->dsi.mode==CMD_MODE))))
{
lcm_drv->update(x, y, width, height);
}
LCD_CHECK_RET(LCD_SetRoiWindow(x, y, width, height));
LCD_CHECK_RET(LCD_FBSetStartCoord(x, y));
LCD_CHECK_RET(LCD_StartTransfer(FALSE));
if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode==CMD_MODE) {
DSI_clk_HS_mode(1);
DSI_CHECK_RET(DSI_EnableClk());
}
else if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode!=CMD_MODE) {
DSI_clk_HS_mode(1);
DPI_CHECK_RET(DPI_EnableClk());
DSI_CHECK_RET(DSI_EnableClk());
}
return DISP_STATUS_OK;
}
static DISP_STATUS dpi_enable_power(BOOL enable)
{
if (enable) {
DPI_CHECK_RET(DPI_PowerOn());
init_mipi_pll();//for MT6573 and later chip, Must re-init mipi pll for dpi, because pll register have located in
//MMSYS1 except MT6516
init_io_pad();
LCD_CHECK_RET(LCD_PowerOn());
DPI_CHECK_RET(DPI_EnableClk());
} else {
DPI_CHECK_RET(DPI_DisableClk());
DPI_CHECK_RET(DPI_PowerOff());
LCD_CHECK_RET(LCD_PowerOff());
DPI_mipi_switch(false);
}
return DISP_STATUS_OK;
}
int disphal_panel_enable(const LCM_DRIVER *lcm_drv, struct mutex* pLcmCmdMutex, BOOL enable)
{
if (enable)
{
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
{
DSI_SetMode(CMD_MODE);
}
mutex_lock(pLcmCmdMutex);
//#ifdef MTK_DISP_CONFIG_SUPPORT
if(get_fbconfig_start_lcm_config())
{
fbconfig_apply_new_lcm_setting();
//do not call lcm_init if you have ever started LCM config until you reset lcm config ;
}
else
//#endif
lcm_drv->resume();
mutex_unlock(pLcmCmdMutex);
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
{
//DSI_clk_HS_mode(1);
DSI_WaitForNotBusy();
DSI_SetMode(lcm_params->dsi.mode);
}
}
else
{
LCD_CHECK_RET(LCD_WaitForNotBusy());
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode == CMD_MODE)
DSI_CHECK_RET(DSI_WaitForNotBusy());
if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
{
DPI_CHECK_RET(DPI_DisableClk());
//msleep(200);
DSI_Reset();
DSI_clk_HS_mode(0);
DSI_SetMode(CMD_MODE);
}
mutex_lock(pLcmCmdMutex);
//#ifdef MTK_DISP_CONFIG_SUPPORT
if(get_fbconfig_start_lcm_config())
{
fbconfig_apply_new_lcm_setting();
//do not call lcm_init if you have ever started LCM config until you reset lcm config ;
}
else
//#endif
lcm_drv->suspend();
mutex_unlock(pLcmCmdMutex);
}
return 0;
}
DISP_STATUS DISP_SetInterruptCallback(DISP_INTERRUPT_EVENTS eventID, DISP_INTERRUPT_CALLBACK_STRUCT *pCBStruct)
{
UINT32 offset;
ASSERT(pCBStruct != NULL);
if(eventID >= DISP_LCD_INTERRUPT_EVENTS_START && eventID <= DISP_LCD_INTERRUPT_EVENTS_END )
{
///register callback
offset = eventID - DISP_LCD_INTERRUPT_EVENTS_START;
DISP_CallbackArray[offset].pFunc = pCBStruct->pFunc;
DISP_CallbackArray[offset].pParam = pCBStruct->pParam;
LCD_CHECK_RET(LCD_SetInterruptCallback(_DISP_InterruptCallbackProxy));
LCD_CHECK_RET(LCD_EnableInterrupt(eventID));
}
else if(eventID >= DISP_DSI_INTERRUPT_EVENTS_START && eventID <= DISP_DSI_INTERRUPT_EVENTS_END )
{
///register callback
offset = eventID - DISP_DSI_INTERRUPT_EVENTS_START + DISP_LCD_INTERRUPT_EVENTS_NUMBER;
DISP_CallbackArray[offset].pFunc = pCBStruct->pFunc;
DISP_CallbackArray[offset].pParam = pCBStruct->pParam;
DSI_CHECK_RET(DSI_SetInterruptCallback(_DISP_InterruptCallbackProxy));
DSI_CHECK_RET(DSI_EnableInterrupt(eventID));
}
else if(eventID >= DISP_DPI_INTERRUPT_EVENTS_START && eventID <= DISP_DPI_INTERRUPT_EVENTS_END )
{
offset = eventID - DISP_DPI_INTERRUPT_EVENTS_START + DISP_LCD_INTERRUPT_EVENTS_NUMBER + DISP_DSI_INTERRUPT_EVENTS_NUMBER;
DISP_CallbackArray[offset].pFunc = pCBStruct->pFunc;
DISP_CallbackArray[offset].pParam = pCBStruct->pParam;
DPI_CHECK_RET(DPI_SetInterruptCallback(_DISP_InterruptCallbackProxy));
DPI_CHECK_RET(DPI_EnableInterrupt(eventID));
}
else
{
printk("Invalid event id: %d\n", eventID);
ASSERT(0);
return DISP_STATUS_ERROR; ///TODO: error log
}
return DISP_STATUS_OK;
}
// protected by sem_flipping, sem_early_suspend, sem_overlay_buffer, sem_update_screen
static DISP_STATUS dsi_update_screen(BOOL isMuextLocked)
{
disp_drv_dsi_init_context();
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
//DSI_CHECK_RET(DSI_handle_TE());
DSI_SetMode(lcm_params->dsi.mode);
#ifndef MT65XX_NEW_DISP
LCD_CHECK_RET(LCD_StartTransfer(FALSE, isMuextLocked));
#endif
if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode == CMD_MODE && !DDMS_capturing) {
//if(1 != lcm_params->dsi.compatibility_for_nvk)
if(1)
{
DSI_clk_HS_mode(1);
}
#ifndef MT65XX_NEW_DISP
DSI_CHECK_RET(DSI_Start());
#else
DSI_CHECK_RET(DSI_StartTransfer(isMuextLocked));
#endif
}
else if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE && !DDMS_capturing)
{
DSI_clk_HS_mode(1);
#ifndef MT65XX_NEW_DISP
DPI_CHECK_RET(DPI_EnableClk());
DSI_CHECK_RET(DSI_Start());
#else
DSI_CHECK_RET(DSI_StartTransfer(isMuextLocked));
#endif
#ifndef BUILD_UBOOT
is_video_mode_running = true;
if(lcm_params->dsi.noncont_clock)
DSI_set_noncont_clk(true, lcm_params->dsi.noncont_clock_period);
if(lcm_params->dsi.lcm_int_te_monitor)
DSI_set_int_TE(true, lcm_params->dsi.lcm_int_te_period);
#endif
}
if (DDMS_capturing)
DISP_LOG_PRINT(ANDROID_LOG_INFO, "DSI", "[DISP] kernel - dsi_update_screen. DDMS is capturing. Skip one frame. \n");
return DISP_STATUS_OK;
}
DISP_STATUS DISP_PanelEnable(BOOL enable)
{
static BOOL s_enabled = FALSE;
disp_drv_init_context();
if (!lcm_drv->suspend || !lcm_drv->resume) {
return DISP_STATUS_NOT_IMPLEMENTED;
}
if (enable && !s_enabled) {
s_enabled = TRUE;
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
{
DSI_SetMode(CMD_MODE);
}
lcm_drv->resume();
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
{
//DSI_clk_HS_mode(1);
DSI_SetMode(lcm_params->dsi.mode);
//DPI_CHECK_RET(DPI_EnableClk());
//DSI_CHECK_RET(DSI_EnableClk());
}
}
else if (!enable && s_enabled)
{
LCD_CHECK_RET(LCD_WaitForNotBusy());
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode == CMD_MODE)
DSI_CHECK_RET(DSI_WaitForNotBusy());
s_enabled = FALSE;
if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
{
DPI_CHECK_RET(DPI_DisableClk());
udelay(200*1000);
DSI_Reset();
DSI_clk_HS_mode(0);
DSI_SetMode(CMD_MODE);
}
lcm_drv->suspend();
}
return DISP_STATUS_OK;
}
DISP_STATUS DISP_FM_Desense(unsigned long freq)
{
DISP_STATUS ret = DISP_STATUS_OK;
if(LCM_TYPE_DBI == lcm_params->type){//DBI
DISP_LOG("DISP_FM_Desense():DBI interface\n");
LCD_CHECK_RET(LCD_FM_Desense(ctrl_if, freq));
}
else if(LCM_TYPE_DPI == lcm_params->type){//DPI
DISP_LOG("DISP_FM_Desense():DPI interface\n");
DPI_CHECK_RET(DPI_FM_Desense(freq));
}
else{// DSI
DISP_LOG("DISP_FM_Desense():DSI driver not ready\n");
}
return ret;
}
DISP_STATUS DISP_Change_Update(unsigned int speed)
{
DISP_STATUS ret = DISP_STATUS_OK;
if(LCM_TYPE_DBI == lcm_params->type){//DBI
DISP_LOG("DISP_Change_Update():DBI interface\n");
LCD_CHECK_RET(LCD_Change_WriteCycle(ctrl_if, speed));
}
else if(LCM_TYPE_DPI == lcm_params->type){//DPI
DISP_LOG("DISP_Change_Update():DPI interface\n");
DPI_CHECK_RET(DPI_Change_CLK(speed));
}
else{// DSI
DISP_LOG("DISP_Change_Update():DSI driver not ready\n");
}
return ret;
}
DISP_STATUS DISP_Reset_Update()
{
DISP_STATUS ret = DISP_STATUS_OK;
if(LCM_TYPE_DBI == lcm_params->type){//DBI
DISP_LOG("DISP_Reset_Update():DBI interface\n");
LCD_CHECK_RET(LCD_Reset_WriteCycle(ctrl_if));
}
else if(LCM_TYPE_DPI == lcm_params->type){//DPI
DISP_LOG("DISP_Reset_Update():DPI interface\n");
DPI_CHECK_RET(DPI_Reset_CLK());
}
else{// DSI
DISP_LOG("DISP_Reset_Update():DSI driver not ready\n");
}
return ret;
}
int disphal_panel_enable(const LCM_DRIVER *lcm_drv, struct mutex* pLcmCmdMutex, BOOL enable)
{
if (enable)
{
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
{
DSI_SetMode(CMD_MODE);
}
mutex_lock(pLcmCmdMutex);
lcm_drv->resume();
if(lcm_drv->check_status)
lcm_drv->check_status();
DSI_LP_Reset();
mutex_unlock(pLcmCmdMutex);
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
{
//DSI_clk_HS_mode(1);
DSI_WaitForNotBusy();
DSI_SetMode(lcm_params->dsi.mode);
}
}
else
{
LCD_CHECK_RET(LCD_WaitForNotBusy());
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode == CMD_MODE)
DSI_CHECK_RET(DSI_WaitForNotBusy());
if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
{
DPI_CHECK_RET(DPI_DisableClk());
//msleep(200);
//DSI_Reset();
DSI_clk_HS_mode(0);
DSI_SetMode(CMD_MODE);
}
mutex_lock(pLcmCmdMutex);
lcm_drv->suspend();
mutex_unlock(pLcmCmdMutex);
}
return 0;
}
// protected by sem_flipping, sem_early_suspend, sem_overlay_buffer, sem_update_screen
static DISP_STATUS dsi_update_screen(void)
{
disp_drv_dsi_init_context();
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
//DSI_CHECK_RET(DSI_handle_TE());
DSI_SetMode(lcm_params->dsi.mode);
LCD_CHECK_RET(LCD_StartTransfer(FALSE));
if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode == CMD_MODE && !DDMS_capturing) {
DSI_clk_HS_mode(1);
DSI_CHECK_RET(DSI_EnableClk());
}
else if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE && !DDMS_capturing)
{
#ifndef BUILD_UBOOT
spin_lock(&g_handle_esd_lock);
#endif
DSI_clk_HS_mode(1);
DPI_CHECK_RET(DPI_EnableClk());
DSI_CHECK_RET(DSI_EnableClk());
#ifndef BUILD_UBOOT
dsi_vdo_streaming = true;
if(lcm_params->dsi.noncont_clock)
DSI_set_noncont_clk(true, lcm_params->dsi.noncont_clock_period);
if(lcm_params->dsi.lcm_int_te_monitor)
DSI_set_int_TE(true, lcm_params->dsi.lcm_int_te_period);
spin_unlock(&g_handle_esd_lock);
#endif
}
if (DDMS_capturing)
DISP_LOG_PRINT(ANDROID_LOG_INFO, "DSI", "[DISP] kernel - dsi_update_screen. DDMS is capturing. Skip one frame. \n");
return DISP_STATUS_OK;
}
// called by "esd_recovery_kthread"
// protected by sem_early_suspend, sem_update_screen
void dsi_esd_reset(void)
{
/// we assume the power is on here
/// what we need is some setting for LCM init
if(lcm_params->dsi.mode == CMD_MODE) {
DSI_clk_HS_mode(0);
DSI_clk_ULP_mode(0);
DSI_lane0_ULP_mode(0);
}
else {
DSI_SetMode(CMD_MODE);
DSI_clk_HS_mode(0);
// clock/data lane go to Ideal
DSI_Reset();
DPI_CHECK_RET(DPI_DisableClk());
}
}
DISP_STATUS disphal_reset_update(void)
{
DISP_STATUS ret = DISP_STATUS_OK;
if(LCM_TYPE_DBI == lcm_params->type)
{//DBI
LCD_CHECK_RET(LCD_Reset_WriteCycle(ctrl_if));
}
else if(LCM_TYPE_DPI == lcm_params->type)
{//DPI
DPI_CHECK_RET(DPI_Reset_CLK());
}
else if(LCM_TYPE_DSI == lcm_params->type)
{// DSI
DSI_CHECK_RET(DSI_Reset_CLK());
}
else
{
ret = DISP_STATUS_ERROR;
}
return ret;
}
DISP_STATUS disphal_fm_desense(unsigned long freq)
{
DISP_STATUS ret = DISP_STATUS_OK;
if(LCM_TYPE_DBI == lcm_params->type)
{//DBI
LCD_CHECK_RET(LCD_FM_Desense(ctrl_if, freq));
}
else if(LCM_TYPE_DPI == lcm_params->type)
{//DPI
DPI_CHECK_RET(DPI_FM_Desense(freq));
}
else if(LCM_TYPE_DSI == lcm_params->type)
{// DSI
DSI_CHECK_RET(DSI_FM_Desense(freq));
}
else
{
ret = DISP_STATUS_ERROR;
}
return ret;
}
DISP_STATUS disphal_change_updatespeed(unsigned int speed)
{
DISP_STATUS ret = DISP_STATUS_OK;
if(LCM_TYPE_DBI == lcm_params->type)
{//DBI
LCD_CHECK_RET(LCD_Change_WriteCycle(ctrl_if, speed));
}
else if(LCM_TYPE_DPI == lcm_params->type)
{//DPI
DPI_CHECK_RET(DPI_Change_CLK(speed));
}
else if(LCM_TYPE_DSI == lcm_params->type)
{// DSI
DSI_CHECK_RET(DSI_Change_CLK(speed));
}
else
{
ret = DISP_STATUS_ERROR;
}
return ret;
}
static void init_dpi(BOOL isDpiPoweredOn)
{
const LCM_DPI_PARAMS *dpi = &(lcm_params->dpi);
UINT32 i;
DPI_CHECK_RET(DPI_Init(isDpiPoweredOn));
DPI_CHECK_RET(DPI_ConfigHsync((DPI_POLARITY)dpi->hsync_pol,
dpi->hsync_pulse_width,
dpi->hsync_back_porch,
dpi->hsync_front_porch));
DPI_CHECK_RET(DPI_ConfigVsync((DPI_POLARITY)dpi->vsync_pol,
dpi->vsync_pulse_width,
dpi->vsync_back_porch,
dpi->vsync_front_porch));
DPI_CHECK_RET(DPI_FBSetSize(DISP_GetScreenWidth(), DISP_GetScreenHeight()));
DPI_CHECK_RET(DPI_OutputSetting());
DPI_CHECK_RET(DPI_EnableClk());
}
static void init_io_driving_current(void)
{
DPI_CHECK_RET(DPI_Set_DrivingCurrent(lcm_params));
}
/* Will only be used in hdmi_drv_init(), this means that will only be use in ioctl(MTK_HDMI_AUDIO_VIDEO_ENABLE) */
/*static*/ void hdmi_dpi_config_clock(void)
{
int ret = 0;
RET_VOID_IF(p->output_mode == HDMI_OUTPUT_MODE_DPI_BYPASS);
ret = enable_pll(TVDPLL, "HDMI");
if(ret)
{
HDMI_LOG("enable_pll fail!!\n");
}
printk("[hdmi]720p 60Hz\n");
//ret = pll_fsel(TVDPLL, 0x800B6C4E);
OUTREG32(TVDPLL_CON1, 0x800B6C4E); //148.5MHz
OUTREG32(TVDPLL_CON0, 0x80000081);
//OUTREG32(TVDPLL_CON0, 0x80000081);
//OUTREG32(DISPSYS_BASE+0x038, 0x1); // rdma0_out_sel, 2 for DPI0
//OUTREG32(DISPSYS_BASE+0x05c, 0x1); // DPI0_SEL, 0 is from rdma0
ASSERT(!ret);
clk_pol = HDMI_POLARITY_FALLING;
de_pol = HDMI_POLARITY_RISING;
hsync_pol = HDMI_POLARITY_RISING;
vsync_pol = HDMI_POLARITY_RISING;;
hsync_front_porch = 110;
hsync_pulse_width = 40;
hsync_back_porch = 220;
vsync_front_porch = 5;
vsync_pulse_width = 5;
vsync_back_porch = 20;
dpi_clk_div = 2;
dpi_clk_duty = 1;
rgb_order = hdmi_params->rgb_order;
intermediat_buffer_num = 4;
// dpi clock configuration using MIPITX
//if(hdmi_params->dpi_port == HDMI_DPI_OUTPUT_PORT_0)
{
DPI_CHECK_RET(DPI_Init(FALSE));
DPI_CHECK_RET(DPI_ConfigPixelClk(clk_pol, dpi_clk_div, dpi_clk_duty));
DPI_CHECK_RET(DPI_ConfigDataEnable(de_pol));
DPI_CHECK_RET(DPI_ConfigHsync(hsync_pol, hsync_pulse_width, hsync_back_porch, hsync_front_porch));
DPI_CHECK_RET(DPI_ConfigVsync(vsync_pol, vsync_pulse_width, vsync_back_porch, vsync_front_porch));
DPI_CHECK_RET(DPI_FBSetSize(1280, 720));
//if (LCM_COLOR_ORDER_BGR == rgb_order)
if (HDMI_COLOR_ORDER_BGR == rgb_order)
{
DPI_CHECK_RET(DPI_SetRGBOrder(DPI_RGB_ORDER_RGB, DPI_RGB_ORDER_BGR));
}
else
{
DPI_CHECK_RET(DPI_SetRGBOrder(DPI_RGB_ORDER_RGB, DPI_RGB_ORDER_RGB));
}
//DPI_Internal_Pattern(1, 5);
DPI_CHECK_RET(DPI_EnableClk());
p->is_clock_on = true;
}
}
DISP_STATUS DISP_PanelEnable(BOOL enable)
{
static BOOL s_enabled = TRUE;
DISP_STATUS ret = DISP_STATUS_OK;
DISP_LOG("panel is %s\n", enable?"enabled":"disabled");
if (down_interruptible(&sem_update_screen)) {
DISP_LOG("ERROR: Can't get sem_update_screen in DISP_PanelEnable()\n");
return DISP_STATUS_ERROR;
}
disp_drv_init_context();
is_lcm_in_suspend_mode = enable ? FALSE : TRUE;
if (!lcm_drv->suspend || !lcm_drv->resume) {
ret = DISP_STATUS_NOT_IMPLEMENTED;
goto End;
}
if (enable && !s_enabled) {
s_enabled = TRUE;
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
{
DSI_SetMode(CMD_MODE);
}
lcm_drv->resume();
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
{
//DSI_clk_HS_mode(1);
DSI_SetMode(lcm_params->dsi.mode);
//DPI_CHECK_RET(DPI_EnableClk());
//DSI_CHECK_RET(DSI_EnableClk());
msleep(200);
}
}
else if (!enable && s_enabled)
{
LCD_CHECK_RET(LCD_WaitForNotBusy());
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode == CMD_MODE)
DSI_CHECK_RET(DSI_WaitForNotBusy());
s_enabled = FALSE;
if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
{
DPI_CHECK_RET(DPI_DisableClk());
//msleep(200);
DSI_Reset();
DSI_clk_HS_mode(0);
DSI_SetMode(CMD_MODE);
}
lcm_drv->suspend();
}
End:
up(&sem_update_screen);
return ret;
}
// protected by sem_early_suspend, sem_update_screen
static DISP_STATUS dsi_enable_power(BOOL enable)
{
disp_drv_dsi_init_context();
if(lcm_params->dsi.mode == CMD_MODE) {
if (enable) {
#if 0
// Switch bus to MIPI TX.
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
DSI_PHY_clk_switch(TRUE, lcm_params);
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
DSI_CHECK_RET(DSI_PowerOn());
DSI_WaitForNotBusy();
DSI_clk_HS_mode(0);
DSI_clk_ULP_mode(0);
DSI_lane0_ULP_mode(0);
DSI_Reset();
LCD_CHECK_RET(LCD_PowerOn());
#else
#ifndef MT65XX_NEW_DISP
DSI_PHY_clk_switch(TRUE, lcm_params);
DSI_CHECK_RET(DSI_PowerOn());
if(Need_Wait_ULPS())
Wait_ULPS_Mode();
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
#else
// enable MMSYS CG
DSI_CHECK_RET(DSI_PowerOn());
// initialize clock setting
DSI_PHY_clk_setting(lcm_params);
// initialize dsi timing
DSI_PHY_TIMCONFIG(lcm_params);
// restore dsi register
DSI_CHECK_RET(DSI_RestoreRegisters());
// enable sleep-out mode
DSI_CHECK_RET(DSI_SleepOut());
// enter HS mode
DSI_PHY_clk_switch(TRUE, lcm_params);
// enter wakeup
DSI_CHECK_RET(DSI_Wakeup());
// enable clock
DSI_CHECK_RET(DSI_EnableClk());
// engine reset
DSI_Reset();
#endif
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
#ifndef MT65XX_NEW_DISP
Wait_WakeUp();
#endif
#endif
}
else {
// backup dsi register
DSI_CHECK_RET(DSI_WaitForEngineNotBusy());
DSI_CHECK_RET(DSI_BackupRegisters());
// enter ULPS mode
DSI_clk_ULP_mode(1);
DSI_lane0_ULP_mode(1);
mdelay(1);
// disable engine clock
DSI_CHECK_RET(DSI_DisableClk());
// disable CG
DSI_CHECK_RET(DSI_PowerOff());
// disable mipi pll
DSI_PHY_clk_switch(FALSE, lcm_params);
// Switch bus to GPIO, then power level will be decided by GPIO setting.
DSI_CHECK_RET(DSI_enable_MIPI_txio(FALSE));
}
}
else {
if (enable) {
#if 0
// Switch bus to MIPI TX.
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
DSI_PHY_clk_switch(TRUE, lcm_params);
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
DSI_CHECK_RET(DSI_PowerOn());
DSI_clk_ULP_mode(0);
DSI_lane0_ULP_mode(0);
DSI_clk_HS_mode(0);
DSI_Reset();
DPI_CHECK_RET(DPI_PowerOn());
LCD_CHECK_RET(LCD_PowerOn());
#else
#ifndef MT65XX_NEW_DISP
DSI_PHY_clk_switch(TRUE, lcm_params);
DSI_CHECK_RET(DSI_PowerOn());
if(Need_Wait_ULPS())
Wait_ULPS_Mode();
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
#else
needStartDSI = true;
// enable MMSYS CG
DSI_CHECK_RET(DSI_PowerOn());
// initialize clock setting
DSI_PHY_clk_setting(lcm_params);
// initialize dsi timing
DSI_PHY_TIMCONFIG(lcm_params);
// restore dsi register
DSI_CHECK_RET(DSI_RestoreRegisters());
// enable sleep-out mode
DSI_CHECK_RET(DSI_SleepOut());
// enter HS mode
DSI_PHY_clk_switch(TRUE, lcm_params);
// enter wakeup
DSI_CHECK_RET(DSI_Wakeup());
// enable clock
DSI_CHECK_RET(DSI_EnableClk());
// engine reset
DSI_Reset();
#endif
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
#ifndef MT65XX_NEW_DISP
Wait_WakeUp();
#endif
#endif
}
else {
#ifndef BUILD_UBOOT
is_video_mode_running = false;
if(lcm_params->dsi.noncont_clock)
DSI_set_noncont_clk(false, lcm_params->dsi.noncont_clock_period);
if(lcm_params->dsi.lcm_int_te_monitor)
DSI_set_int_TE(false, lcm_params->dsi.lcm_int_te_period);
#endif
// backup dsi register
DSI_CHECK_RET(DSI_WaitForEngineNotBusy());
DSI_CHECK_RET(DSI_BackupRegisters());
// enter ULPS mode
DSI_clk_ULP_mode(1);
DSI_lane0_ULP_mode(1);
mdelay(1);
// disable engine clock
DSI_CHECK_RET(DSI_DisableClk());
// disable CG
DSI_CHECK_RET(DSI_PowerOff());
// disable mipi pll
DSI_PHY_clk_switch(FALSE, lcm_params);
// Switch bus to GPIO, then power level will be decided by GPIO setting.
DSI_CHECK_RET(DSI_enable_MIPI_txio(FALSE));
}
}
return DISP_STATUS_OK;
}
static void init_dpi(BOOL isDpiPoweredOn)
{
const LCM_DPI_PARAMS *dpi = &(lcm_params->dpi);
UINT32 i;
DPI_CHECK_RET(DPI_Init(isDpiPoweredOn));
DPI_CHECK_RET(DPI_EnableSeqOutput(FALSE));
DPI_CHECK_RET(DPI_ConfigPixelClk((DPI_POLARITY)dpi->clk_pol,
dpi->dpi_clk_div, dpi->dpi_clk_duty));
DPI_CHECK_RET(DPI_ConfigDataEnable((DPI_POLARITY)dpi->de_pol));
DPI_CHECK_RET(DPI_ConfigHsync((DPI_POLARITY)dpi->hsync_pol,
dpi->hsync_pulse_width,
dpi->hsync_back_porch,
dpi->hsync_front_porch));
DPI_CHECK_RET(DPI_ConfigVsync((DPI_POLARITY)dpi->vsync_pol,
dpi->vsync_pulse_width,
dpi->vsync_back_porch,
dpi->vsync_front_porch));
#ifdef MT65XX_NEW_DISP
DPI_CHECK_RET(DPI_ConfigLVDS(lcm_params));
#endif
DPI_CHECK_RET(DPI_FBSetSize(DISP_GetScreenWidth(), DISP_GetScreenHeight()));
for (i = 0; i < dpi->intermediat_buffer_num; ++ i)
{
DPI_CHECK_RET(DPI_FBSetAddress(DPI_FB_0 + i, s_tmpBuffers[i].pa));
DPI_CHECK_RET(DPI_FBSetPitch(DPI_FB_0 + i, s_tmpBuffers[i].pitchInBytes));
DPI_CHECK_RET(DPI_FBEnable(DPI_FB_0 + i, TRUE));
}
DPI_CHECK_RET(DPI_FBSetFormat(dpiTmpBufFormat));
DPI_CHECK_RET(DPI_FBSyncFlipWithLCD(TRUE));
if (LCM_COLOR_ORDER_BGR == dpi->rgb_order) {
DPI_CHECK_RET(DPI_SetRGBOrder(DPI_RGB_ORDER_RGB, DPI_RGB_ORDER_BGR));
} else {
DPI_CHECK_RET(DPI_SetRGBOrder(DPI_RGB_ORDER_RGB, DPI_RGB_ORDER_RGB));
}
DPI_CHECK_RET(DPI_EnableClk());
}
static void init_mipi_pll(void)
{
DPI_CHECK_RET(DPI_Init_PLL(lcm_params));
}
static void init_dpi(BOOL isDpiPoweredOn)
{
const LCM_DSI_PARAMS *dsi = &(lcm_params->dsi);
UINT32 i;
DPI_CHECK_RET(DPI_Init(isDpiPoweredOn));
DPI_CHECK_RET(DPI_EnableSeqOutput(FALSE));
DPI_CHECK_RET(DPI_FBSetSize(DISP_GetScreenWidth(), DISP_GetScreenHeight()));
for (i = 0; i < lcm_params->dsi.intermediat_buffer_num; ++ i)
{
DPI_CHECK_RET(DPI_FBSetAddress(DPI_FB_0 + i, s_tmpBuffers[i].pa));
DPI_CHECK_RET(DPI_FBSetPitch(DPI_FB_0 + i, s_tmpBuffers[i].pitchInBytes));
DPI_CHECK_RET(DPI_FBEnable(DPI_FB_0 + i, TRUE));
}
DPI_CHECK_RET(DPI_FBSetFormat(get_dsi_tmp_buffer_format()));
DPI_CHECK_RET(DPI_FBSyncFlipWithLCD(TRUE));
if (LCM_COLOR_ORDER_BGR == dsi->data_format.color_order) {
DPI_CHECK_RET(DPI_SetRGBOrder(DPI_RGB_ORDER_RGB, DPI_RGB_ORDER_BGR));
} else {
DPI_CHECK_RET(DPI_SetRGBOrder(DPI_RGB_ORDER_RGB, DPI_RGB_ORDER_RGB));
}
DPI_CHECK_RET(DPI_SetDSIMode(TRUE));
}
static void init_mipi_pll(void)
{
DPI_CHECK_RET(DPI_Init_PLL(lcm_params->dpi.mipi_pll_clk_ref,
lcm_params->dpi.mipi_pll_clk_div1,lcm_params->dpi.mipi_pll_clk_div2));
}
// protected by sem_early_suspend, sem_update_screen
static DISP_STATUS dsi_enable_power(BOOL enable)
{
disp_drv_dsi_init_context();
if(lcm_params->dsi.mode == CMD_MODE) {
if (enable) {
#if 0
// Switch bus to MIPI TX.
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
DSI_PHY_clk_switch(1);
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
DSI_CHECK_RET(DSI_PowerOn());
DSI_WaitForNotBusy();
DSI_clk_HS_mode(0);
DSI_clk_ULP_mode(0);
DSI_lane0_ULP_mode(0);
DSI_Reset();
LCD_CHECK_RET(LCD_PowerOn());
#else
DSI_PHY_clk_switch(1);
DSI_CHECK_RET(DSI_PowerOn());
if(Need_Wait_ULPS())
Wait_ULPS_Mode();
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
Wait_WakeUp();
LCD_CHECK_RET(LCD_PowerOn());
#endif
} else {
LCD_CHECK_RET(LCD_PowerOff());
DSI_clk_HS_mode(0);
DSI_lane0_ULP_mode(1);
DSI_clk_ULP_mode(1);
DSI_CHECK_RET(DSI_PowerOff());
DSI_PHY_clk_switch(0);
// Switch bus to GPIO, then power level will be decided by GPIO setting.
DSI_CHECK_RET(DSI_enable_MIPI_txio(FALSE));
}
} else {
#if 0
#ifndef BUILD_UBOOT
spin_lock(&g_handle_esd_lock);
#endif
#endif
if (enable) {
#if 0
// Switch bus to MIPI TX.
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
DSI_PHY_clk_switch(1);
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
DSI_CHECK_RET(DSI_PowerOn());
DSI_clk_ULP_mode(0);
DSI_lane0_ULP_mode(0);
DSI_clk_HS_mode(0);
DSI_Reset();
DPI_CHECK_RET(DPI_PowerOn());
LCD_CHECK_RET(LCD_PowerOn());
#else
DSI_PHY_clk_switch(1);
DSI_CHECK_RET(DSI_PowerOn());
if(Need_Wait_ULPS())
Wait_ULPS_Mode();
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
Wait_WakeUp();
DPI_CHECK_RET(DPI_PowerOn());
LCD_CHECK_RET(LCD_PowerOn());
#endif
} else {
#ifndef BUILD_UBOOT
dsi_vdo_streaming = false;
if(lcm_params->dsi.noncont_clock)
DSI_set_noncont_clk(false, lcm_params->dsi.noncont_clock_period);
if(lcm_params->dsi.lcm_int_te_monitor)
DSI_set_int_TE(false, lcm_params->dsi.lcm_int_te_period);
#endif
LCD_CHECK_RET(LCD_PowerOff());
DPI_CHECK_RET(DPI_PowerOff());
DSI_lane0_ULP_mode(1);
DSI_clk_ULP_mode(1);
DSI_CHECK_RET(DSI_PowerOff());
DSI_PHY_clk_switch(0);
// Switch bus to GPIO, then power level will be decided by GPIO setting.
DSI_CHECK_RET(DSI_enable_MIPI_txio(FALSE));
}
#if 0
#ifndef BUILD_UBOOT
spin_unlock(&g_handle_esd_lock);
#endif
#endif
}
return DISP_STATUS_OK;
}
// protected by sem_early_suspend, sem_update_screen
static DISP_STATUS dsi_enable_power(BOOL enable)
{
disp_drv_dsi_init_context();
if(lcm_params->dsi.mode == CMD_MODE) {
if (enable) {
#if 0
// Switch bus to MIPI TX.
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
DSI_PHY_clk_switch(1);
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
DSI_CHECK_RET(DSI_PowerOn());
DSI_WaitForNotBusy();
DSI_clk_HS_mode(0);
DSI_clk_ULP_mode(0);
DSI_lane0_ULP_mode(0);
DSI_Reset();
LCD_CHECK_RET(LCD_PowerOn());
#else
DSI_PHY_clk_switch(1);
#ifndef MT65XX_NEW_DISP
DSI_CHECK_RET(DSI_PowerOn());
if(Need_Wait_ULPS())
Wait_ULPS_Mode();
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
#else
if(lcm_params->dsi.pll_select == 1)
{
ASSERT(0 == enable_pll(LVDSPLL,"mtk_dsi"));
}
DSI_PHY_clk_setting(lcm_params);
DSI_CHECK_RET(DSI_PowerOn());
DSI_clk_ULP_mode(0);
DSI_lane0_ULP_mode(0);
// DSI_clk_HS_mode(1);
#endif
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
#ifndef MT65XX_NEW_DISP
Wait_WakeUp();
LCD_CHECK_RET(LCD_PowerOn());
#endif
#endif
} else {
#ifndef MT65XX_NEW_DISP
LCD_CHECK_RET(LCD_PowerOff());
#endif
DSI_clk_HS_mode(0);
DSI_lane0_ULP_mode(1);
DSI_clk_ULP_mode(1);
// DSI_CHECK_RET(DSI_PowerOff());
DSI_PHY_clk_switch(0);
DSI_CHECK_RET(DSI_PowerOff());
// Switch bus to GPIO, then power level will be decided by GPIO setting.
DSI_CHECK_RET(DSI_enable_MIPI_txio(FALSE));
if(lcm_params->dsi.pll_select == 1)
ASSERT(0 == disable_pll(LVDSPLL,"mtk_dsi"));
}
} else {
if (enable) {
#if 0
// Switch bus to MIPI TX.
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
DSI_PHY_clk_switch(1);
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
DSI_CHECK_RET(DSI_PowerOn());
DSI_clk_ULP_mode(0);
DSI_lane0_ULP_mode(0);
DSI_clk_HS_mode(0);
DSI_Reset();
DPI_CHECK_RET(DPI_PowerOn());
LCD_CHECK_RET(LCD_PowerOn());
#else
DSI_PHY_clk_switch(1);
#ifndef MT65XX_NEW_DISP
DSI_CHECK_RET(DSI_PowerOn());
if(Need_Wait_ULPS())
Wait_ULPS_Mode();
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
#else
needStartDSI = true;
if(lcm_params->dsi.pll_select == 1)
{
ASSERT(0 == enable_pll(LVDSPLL,"mtk_dsi"));
}
DSI_PHY_clk_setting(lcm_params);
DSI_CHECK_RET(DSI_PowerOn());
DSI_clk_ULP_mode(0);
DSI_lane0_ULP_mode(0);
DSI_clk_HS_mode(0);
#endif
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
#ifndef MT65XX_NEW_DISP
Wait_WakeUp();
DPI_CHECK_RET(DPI_PowerOn());
LCD_CHECK_RET(LCD_PowerOn());
#endif
#endif
} else {
#ifndef BUILD_UBOOT
is_video_mode_running = false;
#ifndef MT65XX_NEW_DISP
if(lcm_params->dsi.noncont_clock)
DSI_set_noncont_clk(false, lcm_params->dsi.noncont_clock_period);
if(lcm_params->dsi.lcm_int_te_monitor)
DSI_set_int_TE(false, lcm_params->dsi.lcm_int_te_period);
#endif
#endif
#ifndef MT65XX_NEW_DISP
LCD_CHECK_RET(LCD_PowerOff());
DPI_CHECK_RET(DPI_PowerOff());
#endif
#if 1
DSI_lane0_ULP_mode(1);
DSI_clk_ULP_mode(1);
DSI_CHECK_RET(DSI_PowerOff());
#endif
DSI_PHY_clk_switch(0);
// Switch bus to GPIO, then power level will be decided by GPIO setting.
DSI_CHECK_RET(DSI_enable_MIPI_txio(FALSE));
if(lcm_params->dsi.pll_select == 1)
ASSERT(0 == disable_pll(LVDSPLL,"mtk_dsi"));
}
}
return DISP_STATUS_OK;
}