void dsim_reg_set_config(u32 mode, u32 data_lane_cnt) { u32 val; u32 mask; if (mode == VIDEO_MODE) { val = DSIM_CONFIG_VIDEO_MODE | DSIM_CONFIG_BURST_MODE | DSIM_CONFIG_HFP_DISABLE | DSIM_CONFIG_MFLUSH_VS; } else if (mode == COMMAND_MODE) { val = DSIM_CONFIG_CLKLANE_STOP_START; /* In Command mode Clk lane stop disable */ } else { dsim_err("This DDI is not MIPI interface.\n"); return; } val |= DSIM_CONFIG_EOT_R03_DISABLE | DSIM_CONFIG_NUM_OF_DATA_LANE(data_lane_cnt - 1) | DSIM_CONFIG_PIXEL_FORMAT(DSIM_PIXEL_FORMAT_RGB24); mask = DSIM_CONFIG_CLKLANE_STOP_START | DSIM_CONFIG_MFLUSH_VS | DSIM_CONFIG_EOT_R03_DISABLE | DSIM_CONFIG_BURST_MODE | DSIM_CONFIG_VIDEO_MODE | DSIM_CONFIG_HFP_DISABLE | DSIM_CONFIG_PIXEL_FORMAT_MASK | DSIM_CONFIG_NUM_OF_DATA_LANE_MASK; dsim_write_mask(DSIM_CONFIG, val, mask); }
void dsim_reg_set_config(u32 id, u32 mode, u32 data_lane_cnt) { u32 val = 0; u32 mask; if (mode == DECON_VIDEO_MODE) { val = DSIM_CONFIG_VIDEO_MODE; } else if (mode == DECON_MIPI_COMMAND_MODE) { val &= ~(DSIM_CONFIG_CLKLANE_STOP_START); /* In Command mode, Clklane_Stop/Start must be disabled */ } else { dsim_err("This DDI is not MIPI interface.\n"); return; } val |= DSIM_CONFIG_BURST_MODE | DSIM_CONFIG_EOT_R03_DISABLE | DSIM_CONFIG_HFP_DISABLE | DSIM_CONFIG_NUM_OF_DATA_LANE(data_lane_cnt - 1) | DSIM_CONFIG_PIXEL_FORMAT(DSIM_PIXEL_FORMAT_RGB24); mask = DSIM_CONFIG_NONCONTINUOUS_CLOCK_LANE | DSIM_CONFIG_CLKLANE_STOP_START | DSIM_CONFIG_EOT_R03_DISABLE | DSIM_CONFIG_BURST_MODE | DSIM_CONFIG_VIDEO_MODE | DSIM_CONFIG_HFP_DISABLE | DSIM_CONFIG_PIXEL_FORMAT_MASK | DSIM_CONFIG_NUM_OF_DATA_LANE_MASK; dsim_write_mask(id, DSIM_CONFIG, val, mask); }