// protected by sem_early_suspend, sem_update_screen
static DISP_STATUS dsi_enable_power(BOOL enable)
{
    disp_drv_dsi_init_context();
    
    if(lcm_params->dsi.mode == CMD_MODE) {
    
        if (enable) {
            #if 0
                // Switch bus to MIPI TX.
                DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
                DSI_PHY_clk_switch(TRUE, lcm_params);
                DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
                DSI_CHECK_RET(DSI_PowerOn());
                DSI_WaitForNotBusy();		
                DSI_clk_HS_mode(0);
                DSI_clk_ULP_mode(0);			
                DSI_lane0_ULP_mode(0);	
                DSI_Reset();
                LCD_CHECK_RET(LCD_PowerOn());

            #else
                #ifndef MT65XX_NEW_DISP
                    DSI_PHY_clk_switch(TRUE, lcm_params); 
                    DSI_CHECK_RET(DSI_PowerOn());
                    if(Need_Wait_ULPS())
                        Wait_ULPS_Mode();
                    
                    DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);

                #else
                    // enable MMSYS CG
                    DSI_CHECK_RET(DSI_PowerOn());

                    // initialize clock setting
                    DSI_PHY_clk_setting(lcm_params);
					
					// initialize dsi timing
                    DSI_PHY_TIMCONFIG(lcm_params);

                    // restore dsi register
                    DSI_CHECK_RET(DSI_RestoreRegisters());

                    // enable sleep-out mode
                    DSI_CHECK_RET(DSI_SleepOut());

                    // enter HS mode
                    DSI_PHY_clk_switch(TRUE, lcm_params); 

                    // enter wakeup
                    DSI_CHECK_RET(DSI_Wakeup());

                    // enable clock
                    DSI_CHECK_RET(DSI_EnableClk());

                    // engine reset
                    DSI_Reset();
                #endif
                DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
                
                #ifndef MT65XX_NEW_DISP
                    Wait_WakeUp();
                #endif
            
            #endif
        }
        else {
            // backup dsi register
            DSI_CHECK_RET(DSI_WaitForEngineNotBusy());
            DSI_CHECK_RET(DSI_BackupRegisters());

            // enter ULPS mode
            DSI_clk_ULP_mode(1);
            DSI_lane0_ULP_mode(1);
            mdelay(1);
            
            // disable engine clock
            DSI_CHECK_RET(DSI_DisableClk());
            
            // disable CG
            DSI_CHECK_RET(DSI_PowerOff());

            // disable mipi pll
            DSI_PHY_clk_switch(FALSE, lcm_params);

            // Switch bus to GPIO, then power level will be decided by GPIO setting.
            DSI_CHECK_RET(DSI_enable_MIPI_txio(FALSE));
        }
    } 
    else {
        if (enable) {
            #if 0
                // Switch bus to MIPI TX.
                DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
                DSI_PHY_clk_switch(TRUE, lcm_params);
                DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
                DSI_CHECK_RET(DSI_PowerOn());			
                DSI_clk_ULP_mode(0);			
                DSI_lane0_ULP_mode(0);
                DSI_clk_HS_mode(0);	
                DSI_Reset();
                DPI_CHECK_RET(DPI_PowerOn());
                LCD_CHECK_RET(LCD_PowerOn());
            #else
                #ifndef MT65XX_NEW_DISP
                    DSI_PHY_clk_switch(TRUE, lcm_params); 
                    DSI_CHECK_RET(DSI_PowerOn());
                    if(Need_Wait_ULPS())
                        Wait_ULPS_Mode();
                    
                    DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
                #else
                    needStartDSI = true;

                    // enable MMSYS CG
                    DSI_CHECK_RET(DSI_PowerOn());

                    // initialize clock setting
                    DSI_PHY_clk_setting(lcm_params);
					
					// initialize dsi timing
                    DSI_PHY_TIMCONFIG(lcm_params);

                    // restore dsi register
                    DSI_CHECK_RET(DSI_RestoreRegisters());

                    // enable sleep-out mode
                    DSI_CHECK_RET(DSI_SleepOut());
                    
                    // enter HS mode
                    DSI_PHY_clk_switch(TRUE, lcm_params); 

                    // enter wakeup
                    DSI_CHECK_RET(DSI_Wakeup());

                    // enable clock
                    DSI_CHECK_RET(DSI_EnableClk());

                    // engine reset
                    DSI_Reset();

                #endif
                DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
                
                #ifndef MT65XX_NEW_DISP
                    Wait_WakeUp();
                #endif
            #endif
        }
        else {
            #ifndef BUILD_UBOOT
                is_video_mode_running = false;
                
                if(lcm_params->dsi.noncont_clock)
                    DSI_set_noncont_clk(false, lcm_params->dsi.noncont_clock_period);
                
                if(lcm_params->dsi.lcm_int_te_monitor)
                    DSI_set_int_TE(false, lcm_params->dsi.lcm_int_te_period);
            #endif

            // backup dsi register
            DSI_CHECK_RET(DSI_WaitForEngineNotBusy());
            DSI_CHECK_RET(DSI_BackupRegisters());

            // enter ULPS mode
            DSI_clk_ULP_mode(1);
            DSI_lane0_ULP_mode(1);
            mdelay(1);

            // disable engine clock
            DSI_CHECK_RET(DSI_DisableClk());

            // disable CG
            DSI_CHECK_RET(DSI_PowerOff());

            // disable mipi pll
            DSI_PHY_clk_switch(FALSE, lcm_params);

            // Switch bus to GPIO, then power level will be decided by GPIO setting.
            DSI_CHECK_RET(DSI_enable_MIPI_txio(FALSE));
        }
    }
    
    return DISP_STATUS_OK;
}
예제 #2
0
// protected by sem_early_suspend, sem_update_screen
static DISP_STATUS dsi_enable_power(BOOL enable)
{
	disp_drv_dsi_init_context();

	if(lcm_params->dsi.mode == CMD_MODE)
	{
		if (enable)
		{
			// enable MMSYS CG
			DSI_CHECK_RET(DSI_PowerOn());

			// initialize clock setting
			DSI_PHY_clk_setting(lcm_params);

			// restore dsi register
			DSI_CHECK_RET(DSI_RestoreRegisters());

			// enable sleep-out mode
			DSI_CHECK_RET(DSI_SleepOut());

			// enter HS mode
			DSI_PHY_clk_switch(1);

			// enter wakeup
			DSI_CHECK_RET(DSI_Wakeup());

			// enable clock
			DSI_CHECK_RET(DSI_EnableClk());

			DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
			DSI_Reset();
		}
		else
		{
			// backup dsi register
			DSI_CHECK_RET(DSI_WaitForNotBusy());
			DSI_CHECK_RET(DSI_BackupRegisters());

			// enter ULPS mode
			DSI_clk_ULP_mode(1);
			DSI_lane0_ULP_mode(1);
			DSI_clk_HS_mode(0);
			// disable clock
			DSI_CHECK_RET(DSI_DisableClk());
			DSI_CHECK_RET(DSI_PowerOff());

			// disable mipi pll
			DSI_PHY_clk_switch(0);

			// Switch bus to GPIO, then power level will be decided by GPIO setting.
			DSI_CHECK_RET(DSI_enable_MIPI_txio(FALSE));
		}
	}
	else
	{
		if (enable)
		{
			// enable MMSYS CG
			DSI_CHECK_RET(DSI_PowerOn());

			// initialize clock setting
			DSI_PHY_clk_setting(lcm_params);

			// restore dsi register
			DSI_CHECK_RET(DSI_RestoreRegisters());

			// enable sleep-out mode
			DSI_CHECK_RET(DSI_SleepOut());

			// enter HS mode
			DSI_PHY_clk_switch(1);

			// enter wakeup
			DSI_CHECK_RET(DSI_Wakeup());
			DSI_clk_HS_mode(0);
			// enable clock
			DSI_CHECK_RET(DSI_EnableClk());

			DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
			DSI_Reset();
			needStartDSI = true;
		}
		else
		{
			is_video_mode_running = false;

			// backup dsi register
			DSI_CHECK_RET(DSI_WaitForNotBusy());
			DSI_CHECK_RET(DSI_BackupRegisters());

			// enter ULPS mode
			DSI_clk_ULP_mode(1);
			DSI_lane0_ULP_mode(1);

			// disable clock
			DSI_CHECK_RET(DSI_DisableClk());
			DSI_CHECK_RET(DSI_PowerOff());

			// disable mipi pll
			DSI_PHY_clk_switch(0);

			// Switch bus to GPIO, then power level will be decided by GPIO setting.
			DSI_CHECK_RET(DSI_enable_MIPI_txio(FALSE));
	    	}
	}

	return DISP_STATUS_OK;
}