static int send_write_data_cmd(struct seq_file *s, void *unused)
{
struct tegra_dc_dsi_data *dsi = s->private;
struct tegra_dc *dc = dsi->dc;
int err;
u8 del = 100;
struct tegra_dsi_cmd user_command[] = {
DSI_CMD_SHORT(data_id, command_value, command_value1),
DSI_DLY_MS(20),
};
if (!dsi->enabled) {
seq_puts(s, "DSI controller suspended\n");
return 0;
}
seq_printf(s, "data_id taken :0x%x\n", data_id);
seq_printf(s, "command value taken :0x%x\n", command_value);
seq_printf(s, "second command value taken :0x%x\n", command_value1);
err = tegra_dsi_write_data(dc, dsi, user_command, del);
return err;
}
static int send_host_cmd_v_blank_dcs(struct seq_file *s, void *unused)
{
struct tegra_dc_dsi_data *dsi = s->private;
int err;
struct tegra_dsi_cmd user_command[] = {
DSI_CMD_SHORT(data_id, command_value, command_value1),
DSI_DLY_MS(20),
};
if (!dsi->enabled) {
seq_puts(s, "DSI controller suspended\n");
return 0;
}
seq_printf(s, "data_id taken :0x%x\n", data_id);
seq_printf(s, "command value taken :0x%x\n", command_value);
seq_printf(s, "second command value taken :0x%x\n", command_value1);
err = tegra_dsi_start_host_cmd_v_blank_dcs(dsi, user_command);
return err;
}
case TEGRA_DC_STEREO_PORTRAIT:
gpio_set_value(TEGRA_GPIO_PH2, ENTERPRISE_STEREO_PORTRAIT);
break;
}
}
#ifdef CONFIG_TEGRA_DC
static int enterprise_dsi_panel_postsuspend(void)
{
/* Do nothing for enterprise dsi panel */
return 0;
}
#endif
static struct tegra_dsi_cmd dsi_init_cmd[]= {
DSI_CMD_SHORT(0x05, 0x11, 0x00),
DSI_DLY_MS(20),
#if(DC_CTRL_MODE & TEGRA_DC_OUT_ONE_SHOT_MODE)
DSI_CMD_SHORT(0x15, 0x35, 0x00),
#endif
DSI_CMD_SHORT(0x05, 0x29, 0x00),
DSI_DLY_MS(20),
};
static struct tegra_dsi_cmd dsi_early_suspend_cmd[] = {
DSI_CMD_SHORT(0x05, 0x28, 0x00),
DSI_DLY_MS(20),
#if(DC_CTRL_MODE & TEGRA_DC_OUT_ONE_SHOT_MODE)
DSI_CMD_SHORT(0x05, 0x34, 0x00),
#endif
};
static u8 panel_ce10[] = {
0x79, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40};
static u8 panel_ce11[] = {0x7a, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0};
static u8 panel_ce12[] = {0x7b, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0};
static u8 panel_ce13[] = {0x7c, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0};
static struct tegra_dsi_cmd dsi_l_720p_5_init_cmd[] = {
DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_dsi_config),
DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_disp_ctrl1),
DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_disp_ctrl2),
DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_internal_clk),
/* panel power control 1 */
DSI_CMD_SHORT(DSI_GENERIC_SHORT_WRITE_2_PARAMS, 0xc1, 0x0),
DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_pwr_ctrl3),
DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_pwr_ctrl4),
DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_positive_gamma_red),
DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_negetive_gamma_red),
DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_positive_gamma_green),
DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_negetive_gamma_green),
DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_positive_gamma_blue),
DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_negetive_gamma_blue),
DSI_CMD_SHORT(DSI_DCS_WRITE_1_PARAM, DSI_DCS_SET_ADDR_MODE, 0x08),
/* panel OTP 2 */
DSI_CMD_SHORT(DSI_GENERIC_SHORT_WRITE_2_PARAMS, 0xf9, 0x0),
248, 249, 250, 251, 252, 253, 254, 255,
};
#if DC_CTRL_MODE & TEGRA_DC_OUT_ONE_SHOT_MODE
static u8 fbuf_mode_sel[] = {0x10, 0x00, 0x2A}; /* left-right */
#else
static u8 fbuf_mode_sel[] = {0x10, 0x00, 0x17}; /* odd-even, DRAM through */
#endif
static u8 __maybe_unused mipi_if_sel[] = {0x10, 0x01, 0x01}; /* cmd mode */
static u8 __maybe_unused smode[] = {0x10, 0x07, 0x07}; /* vsync mode */
static struct tegra_dsi_cmd dsi_s_wqxga_10_1_init_cmd[] = {
DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, fbuf_mode_sel),
DSI_DLY_MS(20),
DSI_CMD_SHORT(DSI_DCS_WRITE_0_PARAM, DSI_DCS_NO_OP, 0x0),
DSI_DLY_MS(20),
#if DC_CTRL_MODE & TEGRA_DC_OUT_ONE_SHOT_MODE
DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, mipi_if_sel),
DSI_DLY_MS(20),
DSI_CMD_SHORT(DSI_DCS_WRITE_0_PARAM, DSI_DCS_NO_OP, 0x0),
DSI_DLY_MS(20),
#endif
#if !(DC_CTRL_MODE & TEGRA_DC_OUT_ONE_SHOT_MODE)
DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, smode),
DSI_DLY_MS(20),
DSI_CMD_SHORT(DSI_DCS_WRITE_0_PARAM, DSI_DCS_NO_OP, 0x0),
DSI_DLY_MS(20),
#endif
147, 148, 149, 150, 151, 152, 154, 155, 156, 157, 159, 160,
161, 162, 162, 163, 164, 165, 166, 167, 167, 168, 169, 170,
170, 171, 171, 172, 173, 173, 174, 174, 175, 175, 176, 176,
177, 177, 178, 178, 179, 179, 180, 182, 191, 192, 194, 195,
196, 198, 199, 200, 201, 201, 202, 203, 203, 204, 204, 205,
206, 206, 207, 208, 208, 209, 210, 216, 221, 221, 222, 222,
223, 224, 224, 225, 226, 226, 227, 228, 228, 229, 230, 238,
241, 241, 242, 243, 243, 244, 244, 245, 246, 246, 247, 248,
248, 249, 250, 255
};
#endif
static struct tegra_dsi_cmd dsi_p_900x1440_7_0_init_cmd[] = {
/* no init command required */
DSI_CMD_SHORT(DSI_DCS_WRITE_0_PARAM, DSI_DCS_EXIT_SLEEP_MODE, 0x0),
DSI_DLY_MS(120),
DSI_CMD_SHORT(DSI_DCS_WRITE_0_PARAM, DSI_DCS_SET_DISPLAY_ON, 0x0),
DSI_DLY_MS(100),
};
static struct tegra_dsi_out dsi_p_900x1440_7_0_pdata = {
.controller_vs = DSI_VS_1,
.n_data_lanes = 4,
.video_burst_mode = TEGRA_DSI_VIDEO_NONE_BURST_MODE,
.pixel_format = TEGRA_DSI_PIXEL_FORMAT_24BIT_P,
.refresh_rate = 60,
.virtual_channel = TEGRA_DSI_VIRTUAL_CHANNEL_0,
.dsi_instance = DSI_INSTANCE_0,
.panel_reset = DSI_PANEL_RESET,
}
dsi_s_1080p_5_gpio_requested = true;
return 0;
fail:
return err;
}
static u8 panel_internal[] = {0x51, 0x0f, 0xff};
static struct tegra_dsi_cmd dsi_s_1080p_5_init_cmd[] = {
DSI_CMD_SHORT(DSI_GENERIC_SHORT_WRITE_2_PARAMS, 0xb0, 0x04),
DSI_CMD_SHORT(DSI_DCS_WRITE_0_PARAM, DSI_DCS_NO_OP, 0x0),
DSI_CMD_SHORT(DSI_DCS_WRITE_0_PARAM, DSI_DCS_NO_OP, 0x0),
DSI_CMD_SHORT(DSI_GENERIC_SHORT_WRITE_2_PARAMS, 0xd6, 0x01),
DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, panel_internal),
DSI_CMD_SHORT(DSI_GENERIC_SHORT_WRITE_2_PARAMS, 0x53, 0x04),
DSI_CMD_SHORT(DSI_DCS_WRITE_0_PARAM, DSI_DCS_SET_DISPLAY_ON, 0x0),
DSI_CMD_SHORT(DSI_DCS_WRITE_0_PARAM, DSI_DCS_EXIT_SLEEP_MODE, 0x0),
DSI_DLY_MS(10),
DSI_SEND_FRAME(7),
};
static struct tegra_dsi_cmd dsi_s_1080p_5_suspend_cmd[] = {
DSI_CMD_SHORT(DSI_DCS_WRITE_0_PARAM, DSI_DCS_SET_DISPLAY_OFF, 0x0),
DSI_DLY_MS(50),
DSI_CMD_SHORT(DSI_DCS_WRITE_0_PARAM, DSI_DCS_ENTER_SLEEP_MODE, 0x0),
err = regulator_disable(cardhu_dsi_reg);
if (err < 0)
printk(KERN_ERR
"DSI regulator avdd_dsi_csi disable failed\n");
regulator_put(cardhu_dsi_reg);
cardhu_dsi_reg = NULL;
}
if (is_panel_218)
gpio_free(AVDD_LCD);
return err;
}
static struct tegra_dsi_cmd dsi_init_cmd[] = {
DSI_CMD_SHORT(0x05, 0x11, 0x00),
DSI_DLY_MS(150),
#if (DC_CTRL_MODE & TEGRA_DC_OUT_ONE_SHOT_MODE)
DSI_CMD_SHORT(0x15, 0x35, 0x00),
#endif
DSI_CMD_SHORT(0x05, 0x29, 0x00),
DSI_DLY_MS(20),
};
u8 password_array[] = {0xb9, 0xff, 0x83, 0x92};
static struct tegra_dsi_cmd dsi_init_cmd_1506[] = {
DSI_CMD_SHORT(0x05, 0x11, 0x00),
DSI_DLY_MS(150),
DSI_CMD_LONG(0x39, password_array),
DSI_DLY_MS(10),
{199, 199, 199},
{153, 153, 153},
{116, 116, 116},
{85, 85, 85},
{59, 59, 59},
{36, 36, 36},
{17, 17, 17},
{0, 0, 0},
},
},
.sd_brightness = &sd_brightness,
.use_vpulse2 = true,
};
static struct tegra_dsi_cmd dsi_lgd_wxga_7_0_init_cmd[] = {
DSI_CMD_SHORT(0x15, 0x01, 0x0),
DSI_DLY_MS(20),
DSI_CMD_SHORT(0x15, 0xAE, 0x0B),
DSI_CMD_SHORT(0x15, 0xEE, 0xEA),
DSI_CMD_SHORT(0x15, 0xEF, 0x5F),
DSI_CMD_SHORT(0x15, 0xF2, 0x68),
DSI_CMD_SHORT(0x15, 0xEE, 0x0),
DSI_CMD_SHORT(0x15, 0xEF, 0x0),
};
static struct tegra_dsi_cmd dsi_lgd_wxga_7_0_late_resume_cmd[] = {
DSI_CMD_SHORT(0x15, 0x10, 0x0),
DSI_DLY_MS(120),
};
static struct tegra_dsi_cmd dsi_lgd_wxga_7_0_early_suspend_cmd[] = {
{36, 36, 36},
{17, 17, 17},
{0, 0, 0},
},
},
.sd_brightness = &sd_brightness,
.use_vpulse2 = true,
};
static u8 ce[] = {0xCE, 0x5D, 0x40, 0x48, 0x56, 0x67, 0x78,
0x88, 0x98, 0xA7, 0xB5, 0xC3, 0xD1, 0xDE,
0xE9, 0xF2, 0xFA, 0xFF, 0x05, 0x00, 0x04,
0x04, 0x00, 0x20};
static struct tegra_dsi_cmd dsi_j_qxga_8_9_init_cmd[] = {
DSI_CMD_SHORT(DSI_GENERIC_SHORT_WRITE_2_PARAMS, 0xB0, 0x04),
DSI_CMD_LONG(DSI_GENERIC_LONG_WRITE, ce),
DSI_CMD_SHORT(DSI_GENERIC_SHORT_WRITE_2_PARAMS, 0xD6, 0x01),
DSI_CMD_SHORT(DSI_GENERIC_SHORT_WRITE_2_PARAMS, 0xB0, 0x03),
DSI_CMD_VBLANK_SHORT(DSI_DCS_WRITE_0_PARAM, DSI_DCS_EXIT_SLEEP_MODE, 0x0, CMD_NOT_CLUBBED),
DSI_DLY_MS(120),
DSI_CMD_VBLANK_SHORT(DSI_DCS_WRITE_1_PARAM, 0x53, 0x24, CMD_CLUBBED),
DSI_CMD_VBLANK_SHORT(DSI_DCS_WRITE_1_PARAM, 0x55, 0x00, CMD_CLUBBED),
DSI_CMD_VBLANK_SHORT(DSI_DCS_WRITE_1_PARAM, 0x35, 0x00, CMD_CLUBBED),
DSI_CMD_VBLANK_SHORT(DSI_DCS_WRITE_0_PARAM, DSI_DCS_SET_DISPLAY_ON, 0x0, CMD_CLUBBED),
};
static struct tegra_dsi_cmd dsi_j_qxga_8_9_suspend_cmd[] = {