u_int decode_fpu(unsigned int Fpu_register[], unsigned int trap_counts[]) { unsigned int current_ir, excp; int target, exception_index = 1; boolean inexact; unsigned int aflags; unsigned int bflags; unsigned int excptype; /* Keep stats on how many floating point exceptions (based on type) * that happen. Want to keep this overhead low, but still provide * some information to the customer. All exits from this routine * need to restore Fpu_register[0] */ bflags=(Fpu_register[0] & 0xf8000000); Fpu_register[0] &= 0x07ffffff; /* exception_index is used to index the exception register queue. It * always points at the last register that contains a valid exception. A * zero value implies no exceptions (also the initialized value). Setting * the T-bit resets the exception_index to zero. */ /* * Check for reserved-op exception. A reserved-op exception does not * set any exception registers nor does it set the T-bit. If the T-bit * is not set then a reserved-op exception occurred. * * At some point, we may want to report reserved op exceptions as * illegal instructions. */ if (!Is_tbit_set()) { update_trap_counts(Fpu_register, aflags, bflags, trap_counts); return SIGNALCODE(SIGILL, ILL_COPROC); } /* * Is a coprocessor op. * * Now we need to determine what type of exception occurred. */ for (exception_index=1; exception_index<=MAX_EXCP_REG; exception_index++) { current_ir = Excp_instr(exception_index); /* * On PA89: there are 5 different unimplemented exception * codes: 0x1, 0x9, 0xb, 0x3, and 0x23. PA-RISC 2.0 adds * another, 0x2b. Only these have the low order bit set. */ excptype = Excp_type(exception_index); if (excptype & UNIMPLEMENTEDEXCEPTION) { /* * Clear T-bit and exception register so that * we can tell if a trap really occurs while * emulating the instruction. */ Clear_tbit(); Clear_excp_register(exception_index); /* * Now emulate this instruction. If a trap occurs, * fpudispatch will return a non-zero number */ excp = fpudispatch(current_ir,excptype,0,Fpu_register); /* accumulate the status flags, don't lose them as in hpux */ if (excp) { /* * We now need to make sure that the T-bit and the * exception register contain the correct values * before continuing. */ /* * Set t-bit since it might still be needed for a * subsequent real trap (I don't understand fully -PB) */ Set_tbit(); /* some of the following code uses * Excp_type(exception_index) so fix that up */ Set_exceptiontype_and_instr_field(excp,current_ir, Fpu_register[exception_index]); if (excp == UNIMPLEMENTEDEXCEPTION) { /* * it is really unimplemented, so restore the * TIMEX extended unimplemented exception code */ excp = excptype; update_trap_counts(Fpu_register, aflags, bflags, trap_counts); return SIGNALCODE(SIGILL, ILL_COPROC); } /* some of the following code uses excptype, so * fix that up too */ excptype = excp; } /* handle exceptions other than the real UNIMPLIMENTED the * same way as if the hardware had caused them */ if (excp == NOEXCEPTION) /* For now use 'break', should technically be 'continue' */ break; } /* * In PA89, the underflow exception has been extended to encode * additional information. The exception looks like pp01x0, * where x is 1 if inexact and pp represent the inexact bit (I) * and the round away bit (RA) */ if (excptype & UNDERFLOWEXCEPTION) { /* check for underflow trap enabled */ if (Is_underflowtrap_enabled()) { update_trap_counts(Fpu_register, aflags, bflags, trap_counts); return SIGNALCODE(SIGFPE, FPE_FLTUND); } else { /* * Isn't a real trap; we need to * return the default value. */ target = current_ir & fivebits; #ifndef lint if (Ibit(Fpu_register[exception_index])) inexact = TRUE; else inexact = FALSE; #endif switch (Excp_format()) { case SGL: /* * If ra (round-away) is set, will * want to undo the rounding done * by the hardware. */ if (Rabit(Fpu_register[exception_index])) Sgl_decrement(Fpu_sgl(target)); /* now denormalize */ sgl_denormalize(&Fpu_sgl(target),&inexact,Rounding_mode()); break; case DBL: /* * If ra (round-away) is set, will * want to undo the rounding done * by the hardware. */ if (Rabit(Fpu_register[exception_index])) Dbl_decrement(Fpu_dblp1(target),Fpu_dblp2(target)); /* now denormalize */ dbl_denormalize(&Fpu_dblp1(target),&Fpu_dblp2(target), &inexact,Rounding_mode()); break; } if (inexact) Set_underflowflag(); /* * Underflow can generate an inexact * exception. If inexact trap is enabled, * want to do an inexact trap, otherwise * set inexact flag. */ if (inexact && Is_inexacttrap_enabled()) { /* * Set exception field of exception register * to inexact, parm field to zero. * Underflow bit should be cleared. */ Set_exceptiontype(Fpu_register[exception_index], INEXACTEXCEPTION); Set_parmfield(Fpu_register[exception_index],0); update_trap_counts(Fpu_register, aflags, bflags, trap_counts); return SIGNALCODE(SIGFPE, FPE_FLTRES); } else { /* * Exception register needs to be cleared. * Inexact flag needs to be set if inexact. */ Clear_excp_register(exception_index); if (inexact) Set_inexactflag(); } } continue; } switch(Excp_type(exception_index)) { case OVERFLOWEXCEPTION: case OVERFLOWEXCEPTION | INEXACTEXCEPTION: /* check for overflow trap enabled */ update_trap_counts(Fpu_register, aflags, bflags, trap_counts); if (Is_overflowtrap_enabled()) { update_trap_counts(Fpu_register, aflags, bflags, trap_counts); return SIGNALCODE(SIGFPE, FPE_FLTOVF); } else { /* * Isn't a real trap; we need to * return the default value. */ target = current_ir & fivebits; switch (Excp_format()) { case SGL: Sgl_setoverflow(Fpu_sgl(target)); break; case DBL: Dbl_setoverflow(Fpu_dblp1(target),Fpu_dblp2(target)); break; } Set_overflowflag(); /* * Overflow always generates an inexact * exception. If inexact trap is enabled, * want to do an inexact trap, otherwise * set inexact flag. */ if (Is_inexacttrap_enabled()) { /* * Set exception field of exception * register to inexact. Overflow * bit should be cleared. */ Set_exceptiontype(Fpu_register[exception_index], INEXACTEXCEPTION); update_trap_counts(Fpu_register, aflags, bflags, trap_counts); return SIGNALCODE(SIGFPE, FPE_FLTRES); } else { /* * Exception register needs to be cleared. * Inexact flag needs to be set. */ Clear_excp_register(exception_index); Set_inexactflag(); } } break; case INVALIDEXCEPTION: case OPC_2E_INVALIDEXCEPTION: update_trap_counts(Fpu_register, aflags, bflags, trap_counts); return SIGNALCODE(SIGFPE, FPE_FLTINV); case DIVISIONBYZEROEXCEPTION: update_trap_counts(Fpu_register, aflags, bflags, trap_counts); return SIGNALCODE(SIGFPE, FPE_FLTDIV); case INEXACTEXCEPTION: update_trap_counts(Fpu_register, aflags, bflags, trap_counts); return SIGNALCODE(SIGFPE, FPE_FLTRES); default: update_trap_counts(Fpu_register, aflags, bflags, trap_counts); printk("%s(%d) Unknown FPU exception 0x%x\n", __FILE__, __LINE__, Excp_type(exception_index)); return SIGNALCODE(SIGILL, ILL_COPROC); case NOEXCEPTION: /* no exception */ /* * Clear exception register in case * other fields are non-zero. */ Clear_excp_register(exception_index); break; } } /* * No real exceptions occurred. */ Clear_tbit(); update_trap_counts(Fpu_register, aflags, bflags, trap_counts); return(NOTRAP); }
int dbl_fmpy( dbl_floating_point *srcptr1, dbl_floating_point *srcptr2, dbl_floating_point *dstptr, unsigned int *status) { register unsigned int opnd1p1, opnd1p2, opnd2p1, opnd2p2; register unsigned int opnd3p1, opnd3p2, resultp1, resultp2; register int dest_exponent, count; register boolean inexact = FALSE, guardbit = FALSE, stickybit = FALSE; boolean is_tiny; Dbl_copyfromptr(srcptr1,opnd1p1,opnd1p2); Dbl_copyfromptr(srcptr2,opnd2p1,opnd2p2); /* * set sign bit of result */ if (Dbl_sign(opnd1p1) ^ Dbl_sign(opnd2p1)) Dbl_setnegativezerop1(resultp1); else Dbl_setzerop1(resultp1); /* * check first operand for NaN's or infinity */ if (Dbl_isinfinity_exponent(opnd1p1)) { if (Dbl_iszero_mantissa(opnd1p1,opnd1p2)) { if (Dbl_isnotnan(opnd2p1,opnd2p2)) { if (Dbl_iszero_exponentmantissa(opnd2p1,opnd2p2)) { /* * invalid since operands are infinity * and zero */ if (Is_invalidtrap_enabled()) return(INVALIDEXCEPTION); Set_invalidflag(); Dbl_makequietnan(resultp1,resultp2); Dbl_copytoptr(resultp1,resultp2,dstptr); return(NOEXCEPTION); } /* * return infinity */ Dbl_setinfinity_exponentmantissa(resultp1,resultp2); Dbl_copytoptr(resultp1,resultp2,dstptr); return(NOEXCEPTION); } } else { /* * is NaN; signaling or quiet? */ if (Dbl_isone_signaling(opnd1p1)) { /* trap if INVALIDTRAP enabled */ if (Is_invalidtrap_enabled()) return(INVALIDEXCEPTION); /* make NaN quiet */ Set_invalidflag(); Dbl_set_quiet(opnd1p1); } /* * is second operand a signaling NaN? */ else if (Dbl_is_signalingnan(opnd2p1)) { /* trap if INVALIDTRAP enabled */ if (Is_invalidtrap_enabled()) return(INVALIDEXCEPTION); /* make NaN quiet */ Set_invalidflag(); Dbl_set_quiet(opnd2p1); Dbl_copytoptr(opnd2p1,opnd2p2,dstptr); return(NOEXCEPTION); } /* * return quiet NaN */ Dbl_copytoptr(opnd1p1,opnd1p2,dstptr); return(NOEXCEPTION); } } /* * check second operand for NaN's or infinity */ if (Dbl_isinfinity_exponent(opnd2p1)) { if (Dbl_iszero_mantissa(opnd2p1,opnd2p2)) { if (Dbl_iszero_exponentmantissa(opnd1p1,opnd1p2)) { /* invalid since operands are zero & infinity */ if (Is_invalidtrap_enabled()) return(INVALIDEXCEPTION); Set_invalidflag(); Dbl_makequietnan(opnd2p1,opnd2p2); Dbl_copytoptr(opnd2p1,opnd2p2,dstptr); return(NOEXCEPTION); } /* * return infinity */ Dbl_setinfinity_exponentmantissa(resultp1,resultp2); Dbl_copytoptr(resultp1,resultp2,dstptr); return(NOEXCEPTION); } /* * is NaN; signaling or quiet? */ if (Dbl_isone_signaling(opnd2p1)) { /* trap if INVALIDTRAP enabled */ if (Is_invalidtrap_enabled()) return(INVALIDEXCEPTION); /* make NaN quiet */ Set_invalidflag(); Dbl_set_quiet(opnd2p1); } /* * return quiet NaN */ Dbl_copytoptr(opnd2p1,opnd2p2,dstptr); return(NOEXCEPTION); } /* * Generate exponent */ dest_exponent = Dbl_exponent(opnd1p1) + Dbl_exponent(opnd2p1) -DBL_BIAS; /* * Generate mantissa */ if (Dbl_isnotzero_exponent(opnd1p1)) { /* set hidden bit */ Dbl_clear_signexponent_set_hidden(opnd1p1); } else { /* check for zero */ if (Dbl_iszero_mantissa(opnd1p1,opnd1p2)) { Dbl_setzero_exponentmantissa(resultp1,resultp2); Dbl_copytoptr(resultp1,resultp2,dstptr); return(NOEXCEPTION); } /* is denormalized, adjust exponent */ Dbl_clear_signexponent(opnd1p1); Dbl_leftshiftby1(opnd1p1,opnd1p2); Dbl_normalize(opnd1p1,opnd1p2,dest_exponent); } /* opnd2 needs to have hidden bit set with msb in hidden bit */ if (Dbl_isnotzero_exponent(opnd2p1)) { Dbl_clear_signexponent_set_hidden(opnd2p1); } else { /* check for zero */ if (Dbl_iszero_mantissa(opnd2p1,opnd2p2)) { Dbl_setzero_exponentmantissa(resultp1,resultp2); Dbl_copytoptr(resultp1,resultp2,dstptr); return(NOEXCEPTION); } /* is denormalized; want to normalize */ Dbl_clear_signexponent(opnd2p1); Dbl_leftshiftby1(opnd2p1,opnd2p2); Dbl_normalize(opnd2p1,opnd2p2,dest_exponent); } /* Multiply two source mantissas together */ /* make room for guard bits */ Dbl_leftshiftby7(opnd2p1,opnd2p2); Dbl_setzero(opnd3p1,opnd3p2); /* * Four bits at a time are inspected in each loop, and a * simple shift and add multiply algorithm is used. */ for (count=1;count<=DBL_P;count+=4) { stickybit |= Dlow4p2(opnd3p2); Dbl_rightshiftby4(opnd3p1,opnd3p2); if (Dbit28p2(opnd1p2)) { /* Twoword_add should be an ADDC followed by an ADD. */ Twoword_add(opnd3p1, opnd3p2, opnd2p1<<3 | opnd2p2>>29, opnd2p2<<3); } if (Dbit29p2(opnd1p2)) { Twoword_add(opnd3p1, opnd3p2, opnd2p1<<2 | opnd2p2>>30, opnd2p2<<2); } if (Dbit30p2(opnd1p2)) { Twoword_add(opnd3p1, opnd3p2, opnd2p1<<1 | opnd2p2>>31, opnd2p2<<1); } if (Dbit31p2(opnd1p2)) { Twoword_add(opnd3p1, opnd3p2, opnd2p1, opnd2p2); } Dbl_rightshiftby4(opnd1p1,opnd1p2); } if (Dbit3p1(opnd3p1)==0) { Dbl_leftshiftby1(opnd3p1,opnd3p2); } else { /* result mantissa >= 2. */ dest_exponent++; } /* check for denormalized result */ while (Dbit3p1(opnd3p1)==0) { Dbl_leftshiftby1(opnd3p1,opnd3p2); dest_exponent--; } /* * check for guard, sticky and inexact bits */ stickybit |= Dallp2(opnd3p2) << 25; guardbit = (Dallp2(opnd3p2) << 24) >> 31; inexact = guardbit | stickybit; /* align result mantissa */ Dbl_rightshiftby8(opnd3p1,opnd3p2); /* * round result */ if (inexact && (dest_exponent>0 || Is_underflowtrap_enabled())) { Dbl_clear_signexponent(opnd3p1); switch (Rounding_mode()) { case ROUNDPLUS: if (Dbl_iszero_sign(resultp1)) Dbl_increment(opnd3p1,opnd3p2); break; case ROUNDMINUS: if (Dbl_isone_sign(resultp1)) Dbl_increment(opnd3p1,opnd3p2); break; case ROUNDNEAREST: if (guardbit) { if (stickybit || Dbl_isone_lowmantissap2(opnd3p2)) Dbl_increment(opnd3p1,opnd3p2); } } if (Dbl_isone_hidden(opnd3p1)) dest_exponent++; } Dbl_set_mantissa(resultp1,resultp2,opnd3p1,opnd3p2); /* * Test for overflow */ if (dest_exponent >= DBL_INFINITY_EXPONENT) { /* trap if OVERFLOWTRAP enabled */ if (Is_overflowtrap_enabled()) { /* * Adjust bias of result */ Dbl_setwrapped_exponent(resultp1,dest_exponent,ovfl); Dbl_copytoptr(resultp1,resultp2,dstptr); if (inexact) if (Is_inexacttrap_enabled()) return (OVERFLOWEXCEPTION | INEXACTEXCEPTION); else Set_inexactflag(); return (OVERFLOWEXCEPTION); } inexact = TRUE; Set_overflowflag(); /* set result to infinity or largest number */ Dbl_setoverflow(resultp1,resultp2); } /* * Test for underflow */ else if (dest_exponent <= 0) { /* trap if UNDERFLOWTRAP enabled */ if (Is_underflowtrap_enabled()) { /* * Adjust bias of result */ Dbl_setwrapped_exponent(resultp1,dest_exponent,unfl); Dbl_copytoptr(resultp1,resultp2,dstptr); if (inexact) if (Is_inexacttrap_enabled()) return (UNDERFLOWEXCEPTION | INEXACTEXCEPTION); else Set_inexactflag(); return (UNDERFLOWEXCEPTION); } /* Determine if should set underflow flag */ is_tiny = TRUE; if (dest_exponent == 0 && inexact) { switch (Rounding_mode()) { case ROUNDPLUS: if (Dbl_iszero_sign(resultp1)) { Dbl_increment(opnd3p1,opnd3p2); if (Dbl_isone_hiddenoverflow(opnd3p1)) is_tiny = FALSE; Dbl_decrement(opnd3p1,opnd3p2); } break; case ROUNDMINUS: if (Dbl_isone_sign(resultp1)) { Dbl_increment(opnd3p1,opnd3p2); if (Dbl_isone_hiddenoverflow(opnd3p1)) is_tiny = FALSE; Dbl_decrement(opnd3p1,opnd3p2); } break; case ROUNDNEAREST: if (guardbit && (stickybit || Dbl_isone_lowmantissap2(opnd3p2))) { Dbl_increment(opnd3p1,opnd3p2); if (Dbl_isone_hiddenoverflow(opnd3p1)) is_tiny = FALSE; Dbl_decrement(opnd3p1,opnd3p2); } break; } } /* * denormalize result or set to signed zero */ stickybit = inexact; Dbl_denormalize(opnd3p1,opnd3p2,dest_exponent,guardbit, stickybit,inexact); /* return zero or smallest number */ if (inexact) { switch (Rounding_mode()) { case ROUNDPLUS: if (Dbl_iszero_sign(resultp1)) { Dbl_increment(opnd3p1,opnd3p2); } break; case ROUNDMINUS: if (Dbl_isone_sign(resultp1)) { Dbl_increment(opnd3p1,opnd3p2); } break; case ROUNDNEAREST: if (guardbit && (stickybit || Dbl_isone_lowmantissap2(opnd3p2))) { Dbl_increment(opnd3p1,opnd3p2); } break; } if (is_tiny) Set_underflowflag(); } Dbl_set_exponentmantissa(resultp1,resultp2,opnd3p1,opnd3p2); } else Dbl_set_exponent(resultp1,dest_exponent); /* check for inexact */ Dbl_copytoptr(resultp1,resultp2,dstptr); if (inexact) { if (Is_inexacttrap_enabled()) return(INEXACTEXCEPTION); else Set_inexactflag(); } return(NOEXCEPTION); }
int dbl_fdiv (dbl_floating_point * srcptr1, dbl_floating_point * srcptr2, dbl_floating_point * dstptr, unsigned int *status) { register unsigned int opnd1p1, opnd1p2, opnd2p1, opnd2p2; register unsigned int opnd3p1, opnd3p2, resultp1, resultp2; register int dest_exponent, count; register boolean inexact = FALSE, guardbit = FALSE, stickybit = FALSE; boolean is_tiny; Dbl_copyfromptr(srcptr1,opnd1p1,opnd1p2); Dbl_copyfromptr(srcptr2,opnd2p1,opnd2p2); /* * set sign bit of result */ if (Dbl_sign(opnd1p1) ^ Dbl_sign(opnd2p1)) Dbl_setnegativezerop1(resultp1); else Dbl_setzerop1(resultp1); /* * check first operand for NaN's or infinity */ if (Dbl_isinfinity_exponent(opnd1p1)) { if (Dbl_iszero_mantissa(opnd1p1,opnd1p2)) { if (Dbl_isnotnan(opnd2p1,opnd2p2)) { if (Dbl_isinfinity(opnd2p1,opnd2p2)) { /* * invalid since both operands * are infinity */ if (Is_invalidtrap_enabled()) return(INVALIDEXCEPTION); Set_invalidflag(); Dbl_makequietnan(resultp1,resultp2); Dbl_copytoptr(resultp1,resultp2,dstptr); return(NOEXCEPTION); } /* * return infinity */ Dbl_setinfinity_exponentmantissa(resultp1,resultp2); Dbl_copytoptr(resultp1,resultp2,dstptr); return(NOEXCEPTION); } } else { /* * is NaN; signaling or quiet? */ if (Dbl_isone_signaling(opnd1p1)) { /* trap if INVALIDTRAP enabled */ if (Is_invalidtrap_enabled()) return(INVALIDEXCEPTION); /* make NaN quiet */ Set_invalidflag(); Dbl_set_quiet(opnd1p1); } /* * is second operand a signaling NaN? */ else if (Dbl_is_signalingnan(opnd2p1)) { /* trap if INVALIDTRAP enabled */ if (Is_invalidtrap_enabled()) return(INVALIDEXCEPTION); /* make NaN quiet */ Set_invalidflag(); Dbl_set_quiet(opnd2p1); Dbl_copytoptr(opnd2p1,opnd2p2,dstptr); return(NOEXCEPTION); } /* * return quiet NaN */ Dbl_copytoptr(opnd1p1,opnd1p2,dstptr); return(NOEXCEPTION); } } /* * check second operand for NaN's or infinity */ if (Dbl_isinfinity_exponent(opnd2p1)) { if (Dbl_iszero_mantissa(opnd2p1,opnd2p2)) { /* * return zero */ Dbl_setzero_exponentmantissa(resultp1,resultp2); Dbl_copytoptr(resultp1,resultp2,dstptr); return(NOEXCEPTION); } /* * is NaN; signaling or quiet? */ if (Dbl_isone_signaling(opnd2p1)) { /* trap if INVALIDTRAP enabled */ if (Is_invalidtrap_enabled()) return(INVALIDEXCEPTION); /* make NaN quiet */ Set_invalidflag(); Dbl_set_quiet(opnd2p1); } /* * return quiet NaN */ Dbl_copytoptr(opnd2p1,opnd2p2,dstptr); return(NOEXCEPTION); } /* * check for division by zero */ if (Dbl_iszero_exponentmantissa(opnd2p1,opnd2p2)) { if (Dbl_iszero_exponentmantissa(opnd1p1,opnd1p2)) { /* invalid since both operands are zero */ if (Is_invalidtrap_enabled()) return(INVALIDEXCEPTION); Set_invalidflag(); Dbl_makequietnan(resultp1,resultp2); Dbl_copytoptr(resultp1,resultp2,dstptr); return(NOEXCEPTION); } if (Is_divisionbyzerotrap_enabled()) return(DIVISIONBYZEROEXCEPTION); Set_divisionbyzeroflag(); Dbl_setinfinity_exponentmantissa(resultp1,resultp2); Dbl_copytoptr(resultp1,resultp2,dstptr); return(NOEXCEPTION); } /* * Generate exponent */ dest_exponent = Dbl_exponent(opnd1p1) - Dbl_exponent(opnd2p1) + DBL_BIAS; /* * Generate mantissa */ if (Dbl_isnotzero_exponent(opnd1p1)) { /* set hidden bit */ Dbl_clear_signexponent_set_hidden(opnd1p1); } else { /* check for zero */ if (Dbl_iszero_mantissa(opnd1p1,opnd1p2)) { Dbl_setzero_exponentmantissa(resultp1,resultp2); Dbl_copytoptr(resultp1,resultp2,dstptr); return(NOEXCEPTION); } /* is denormalized, want to normalize */ Dbl_clear_signexponent(opnd1p1); Dbl_leftshiftby1(opnd1p1,opnd1p2); Dbl_normalize(opnd1p1,opnd1p2,dest_exponent); } /* opnd2 needs to have hidden bit set with msb in hidden bit */ if (Dbl_isnotzero_exponent(opnd2p1)) { Dbl_clear_signexponent_set_hidden(opnd2p1); } else { /* is denormalized; want to normalize */ Dbl_clear_signexponent(opnd2p1); Dbl_leftshiftby1(opnd2p1,opnd2p2); while (Dbl_iszero_hiddenhigh7mantissa(opnd2p1)) { dest_exponent+=8; Dbl_leftshiftby8(opnd2p1,opnd2p2); } if (Dbl_iszero_hiddenhigh3mantissa(opnd2p1)) { dest_exponent+=4; Dbl_leftshiftby4(opnd2p1,opnd2p2); } while (Dbl_iszero_hidden(opnd2p1)) { dest_exponent++; Dbl_leftshiftby1(opnd2p1,opnd2p2); } } /* Divide the source mantissas */ /* * A non-restoring divide algorithm is used. */ Twoword_subtract(opnd1p1,opnd1p2,opnd2p1,opnd2p2); Dbl_setzero(opnd3p1,opnd3p2); for (count=1; count <= DBL_P && (opnd1p1 || opnd1p2); count++) { Dbl_leftshiftby1(opnd1p1,opnd1p2); Dbl_leftshiftby1(opnd3p1,opnd3p2); if (Dbl_iszero_sign(opnd1p1)) { Dbl_setone_lowmantissap2(opnd3p2); Twoword_subtract(opnd1p1,opnd1p2,opnd2p1,opnd2p2); } else { Twoword_add(opnd1p1, opnd1p2, opnd2p1, opnd2p2); } } if (count <= DBL_P) { Dbl_leftshiftby1(opnd3p1,opnd3p2); Dbl_setone_lowmantissap2(opnd3p2); Dbl_leftshift(opnd3p1,opnd3p2,(DBL_P-count)); if (Dbl_iszero_hidden(opnd3p1)) { Dbl_leftshiftby1(opnd3p1,opnd3p2); dest_exponent--; } } else { if (Dbl_iszero_hidden(opnd3p1)) { /* need to get one more bit of result */ Dbl_leftshiftby1(opnd1p1,opnd1p2); Dbl_leftshiftby1(opnd3p1,opnd3p2); if (Dbl_iszero_sign(opnd1p1)) { Dbl_setone_lowmantissap2(opnd3p2); Twoword_subtract(opnd1p1,opnd1p2,opnd2p1,opnd2p2); } else { Twoword_add(opnd1p1,opnd1p2,opnd2p1,opnd2p2); } dest_exponent--; } if (Dbl_iszero_sign(opnd1p1)) guardbit = TRUE; stickybit = Dbl_allp1(opnd1p1) || Dbl_allp2(opnd1p2); } inexact = guardbit | stickybit; /* * round result */ if (inexact && (dest_exponent > 0 || Is_underflowtrap_enabled())) { Dbl_clear_signexponent(opnd3p1); switch (Rounding_mode()) { case ROUNDPLUS: if (Dbl_iszero_sign(resultp1)) Dbl_increment(opnd3p1,opnd3p2); break; case ROUNDMINUS: if (Dbl_isone_sign(resultp1)) Dbl_increment(opnd3p1,opnd3p2); break; case ROUNDNEAREST: if (guardbit && (stickybit || Dbl_isone_lowmantissap2(opnd3p2))) { Dbl_increment(opnd3p1,opnd3p2); } } if (Dbl_isone_hidden(opnd3p1)) dest_exponent++; } Dbl_set_mantissa(resultp1,resultp2,opnd3p1,opnd3p2); /* * Test for overflow */ if (dest_exponent >= DBL_INFINITY_EXPONENT) { /* trap if OVERFLOWTRAP enabled */ if (Is_overflowtrap_enabled()) { /* * Adjust bias of result */ Dbl_setwrapped_exponent(resultp1,dest_exponent,ovfl); Dbl_copytoptr(resultp1,resultp2,dstptr); if (inexact) if (Is_inexacttrap_enabled()) return(OVERFLOWEXCEPTION | INEXACTEXCEPTION); else Set_inexactflag(); return(OVERFLOWEXCEPTION); } Set_overflowflag(); /* set result to infinity or largest number */ Dbl_setoverflow(resultp1,resultp2); inexact = TRUE; } /* * Test for underflow */ else if (dest_exponent <= 0) { /* trap if UNDERFLOWTRAP enabled */ if (Is_underflowtrap_enabled()) { /* * Adjust bias of result */ Dbl_setwrapped_exponent(resultp1,dest_exponent,unfl); Dbl_copytoptr(resultp1,resultp2,dstptr); if (inexact) if (Is_inexacttrap_enabled()) return(UNDERFLOWEXCEPTION | INEXACTEXCEPTION); else Set_inexactflag(); return(UNDERFLOWEXCEPTION); } /* Determine if should set underflow flag */ is_tiny = TRUE; if (dest_exponent == 0 && inexact) { switch (Rounding_mode()) { case ROUNDPLUS: if (Dbl_iszero_sign(resultp1)) { Dbl_increment(opnd3p1,opnd3p2); if (Dbl_isone_hiddenoverflow(opnd3p1)) is_tiny = FALSE; Dbl_decrement(opnd3p1,opnd3p2); } break; case ROUNDMINUS: if (Dbl_isone_sign(resultp1)) { Dbl_increment(opnd3p1,opnd3p2); if (Dbl_isone_hiddenoverflow(opnd3p1)) is_tiny = FALSE; Dbl_decrement(opnd3p1,opnd3p2); } break; case ROUNDNEAREST: if (guardbit && (stickybit || Dbl_isone_lowmantissap2(opnd3p2))) { Dbl_increment(opnd3p1,opnd3p2); if (Dbl_isone_hiddenoverflow(opnd3p1)) is_tiny = FALSE; Dbl_decrement(opnd3p1,opnd3p2); } break; } } /* * denormalize result or set to signed zero */ stickybit = inexact; Dbl_denormalize(opnd3p1,opnd3p2,dest_exponent,guardbit, stickybit,inexact); /* return rounded number */ if (inexact) { switch (Rounding_mode()) { case ROUNDPLUS: if (Dbl_iszero_sign(resultp1)) { Dbl_increment(opnd3p1,opnd3p2); } break; case ROUNDMINUS: if (Dbl_isone_sign(resultp1)) { Dbl_increment(opnd3p1,opnd3p2); } break; case ROUNDNEAREST: if (guardbit && (stickybit || Dbl_isone_lowmantissap2(opnd3p2))) { Dbl_increment(opnd3p1,opnd3p2); } break; } if (is_tiny) Set_underflowflag(); } Dbl_set_exponentmantissa(resultp1,resultp2,opnd3p1,opnd3p2); } else Dbl_set_exponent(resultp1,dest_exponent); Dbl_copytoptr(resultp1,resultp2,dstptr); /* check for inexact */ if (inexact) { if (Is_inexacttrap_enabled()) return(INEXACTEXCEPTION); else Set_inexactflag(); } return(NOEXCEPTION); }
int dbl_fdiv (dbl_floating_point * srcptr1, dbl_floating_point * srcptr2, dbl_floating_point * dstptr, unsigned int *status) { register unsigned int opnd1p1, opnd1p2, opnd2p1, opnd2p2; register unsigned int opnd3p1, opnd3p2, resultp1, resultp2; register int dest_exponent, count; register boolean inexact = FALSE, guardbit = FALSE, stickybit = FALSE; boolean is_tiny; Dbl_copyfromptr(srcptr1,opnd1p1,opnd1p2); Dbl_copyfromptr(srcptr2,opnd2p1,opnd2p2); /* */ if (Dbl_sign(opnd1p1) ^ Dbl_sign(opnd2p1)) Dbl_setnegativezerop1(resultp1); else Dbl_setzerop1(resultp1); /* */ if (Dbl_isinfinity_exponent(opnd1p1)) { if (Dbl_iszero_mantissa(opnd1p1,opnd1p2)) { if (Dbl_isnotnan(opnd2p1,opnd2p2)) { if (Dbl_isinfinity(opnd2p1,opnd2p2)) { /* */ if (Is_invalidtrap_enabled()) return(INVALIDEXCEPTION); Set_invalidflag(); Dbl_makequietnan(resultp1,resultp2); Dbl_copytoptr(resultp1,resultp2,dstptr); return(NOEXCEPTION); } /* */ Dbl_setinfinity_exponentmantissa(resultp1,resultp2); Dbl_copytoptr(resultp1,resultp2,dstptr); return(NOEXCEPTION); } } else { /* */ if (Dbl_isone_signaling(opnd1p1)) { /* */ if (Is_invalidtrap_enabled()) return(INVALIDEXCEPTION); /* */ Set_invalidflag(); Dbl_set_quiet(opnd1p1); } /* */ else if (Dbl_is_signalingnan(opnd2p1)) { /* */ if (Is_invalidtrap_enabled()) return(INVALIDEXCEPTION); /* */ Set_invalidflag(); Dbl_set_quiet(opnd2p1); Dbl_copytoptr(opnd2p1,opnd2p2,dstptr); return(NOEXCEPTION); } /* */ Dbl_copytoptr(opnd1p1,opnd1p2,dstptr); return(NOEXCEPTION); } } /* */ if (Dbl_isinfinity_exponent(opnd2p1)) { if (Dbl_iszero_mantissa(opnd2p1,opnd2p2)) { /* */ Dbl_setzero_exponentmantissa(resultp1,resultp2); Dbl_copytoptr(resultp1,resultp2,dstptr); return(NOEXCEPTION); } /* */ if (Dbl_isone_signaling(opnd2p1)) { /* */ if (Is_invalidtrap_enabled()) return(INVALIDEXCEPTION); /* */ Set_invalidflag(); Dbl_set_quiet(opnd2p1); } /* */ Dbl_copytoptr(opnd2p1,opnd2p2,dstptr); return(NOEXCEPTION); } /* */ if (Dbl_iszero_exponentmantissa(opnd2p1,opnd2p2)) { if (Dbl_iszero_exponentmantissa(opnd1p1,opnd1p2)) { /* */ if (Is_invalidtrap_enabled()) return(INVALIDEXCEPTION); Set_invalidflag(); Dbl_makequietnan(resultp1,resultp2); Dbl_copytoptr(resultp1,resultp2,dstptr); return(NOEXCEPTION); } if (Is_divisionbyzerotrap_enabled()) return(DIVISIONBYZEROEXCEPTION); Set_divisionbyzeroflag(); Dbl_setinfinity_exponentmantissa(resultp1,resultp2); Dbl_copytoptr(resultp1,resultp2,dstptr); return(NOEXCEPTION); } /* */ dest_exponent = Dbl_exponent(opnd1p1) - Dbl_exponent(opnd2p1) + DBL_BIAS; /* */ if (Dbl_isnotzero_exponent(opnd1p1)) { /* */ Dbl_clear_signexponent_set_hidden(opnd1p1); } else { /* */ if (Dbl_iszero_mantissa(opnd1p1,opnd1p2)) { Dbl_setzero_exponentmantissa(resultp1,resultp2); Dbl_copytoptr(resultp1,resultp2,dstptr); return(NOEXCEPTION); } /* */ Dbl_clear_signexponent(opnd1p1); Dbl_leftshiftby1(opnd1p1,opnd1p2); Dbl_normalize(opnd1p1,opnd1p2,dest_exponent); } /* */ if (Dbl_isnotzero_exponent(opnd2p1)) { Dbl_clear_signexponent_set_hidden(opnd2p1); } else { /* */ Dbl_clear_signexponent(opnd2p1); Dbl_leftshiftby1(opnd2p1,opnd2p2); while (Dbl_iszero_hiddenhigh7mantissa(opnd2p1)) { dest_exponent+=8; Dbl_leftshiftby8(opnd2p1,opnd2p2); } if (Dbl_iszero_hiddenhigh3mantissa(opnd2p1)) { dest_exponent+=4; Dbl_leftshiftby4(opnd2p1,opnd2p2); } while (Dbl_iszero_hidden(opnd2p1)) { dest_exponent++; Dbl_leftshiftby1(opnd2p1,opnd2p2); } } /* */ /* */ Twoword_subtract(opnd1p1,opnd1p2,opnd2p1,opnd2p2); Dbl_setzero(opnd3p1,opnd3p2); for (count=1; count <= DBL_P && (opnd1p1 || opnd1p2); count++) { Dbl_leftshiftby1(opnd1p1,opnd1p2); Dbl_leftshiftby1(opnd3p1,opnd3p2); if (Dbl_iszero_sign(opnd1p1)) { Dbl_setone_lowmantissap2(opnd3p2); Twoword_subtract(opnd1p1,opnd1p2,opnd2p1,opnd2p2); } else { Twoword_add(opnd1p1, opnd1p2, opnd2p1, opnd2p2); } } if (count <= DBL_P) { Dbl_leftshiftby1(opnd3p1,opnd3p2); Dbl_setone_lowmantissap2(opnd3p2); Dbl_leftshift(opnd3p1,opnd3p2,(DBL_P-count)); if (Dbl_iszero_hidden(opnd3p1)) { Dbl_leftshiftby1(opnd3p1,opnd3p2); dest_exponent--; } } else { if (Dbl_iszero_hidden(opnd3p1)) { /* */ Dbl_leftshiftby1(opnd1p1,opnd1p2); Dbl_leftshiftby1(opnd3p1,opnd3p2); if (Dbl_iszero_sign(opnd1p1)) { Dbl_setone_lowmantissap2(opnd3p2); Twoword_subtract(opnd1p1,opnd1p2,opnd2p1,opnd2p2); } else { Twoword_add(opnd1p1,opnd1p2,opnd2p1,opnd2p2); } dest_exponent--; } if (Dbl_iszero_sign(opnd1p1)) guardbit = TRUE; stickybit = Dbl_allp1(opnd1p1) || Dbl_allp2(opnd1p2); } inexact = guardbit | stickybit; /* */ if (inexact && (dest_exponent > 0 || Is_underflowtrap_enabled())) { Dbl_clear_signexponent(opnd3p1); switch (Rounding_mode()) { case ROUNDPLUS: if (Dbl_iszero_sign(resultp1)) Dbl_increment(opnd3p1,opnd3p2); break; case ROUNDMINUS: if (Dbl_isone_sign(resultp1)) Dbl_increment(opnd3p1,opnd3p2); break; case ROUNDNEAREST: if (guardbit && (stickybit || Dbl_isone_lowmantissap2(opnd3p2))) { Dbl_increment(opnd3p1,opnd3p2); } } if (Dbl_isone_hidden(opnd3p1)) dest_exponent++; } Dbl_set_mantissa(resultp1,resultp2,opnd3p1,opnd3p2); /* */ if (dest_exponent >= DBL_INFINITY_EXPONENT) { /* */ if (Is_overflowtrap_enabled()) { /* */ Dbl_setwrapped_exponent(resultp1,dest_exponent,ovfl); Dbl_copytoptr(resultp1,resultp2,dstptr); if (inexact) if (Is_inexacttrap_enabled()) return(OVERFLOWEXCEPTION | INEXACTEXCEPTION); else Set_inexactflag(); return(OVERFLOWEXCEPTION); } Set_overflowflag(); /* */ Dbl_setoverflow(resultp1,resultp2); inexact = TRUE; } /* */ else if (dest_exponent <= 0) { /* */ if (Is_underflowtrap_enabled()) { /* */ Dbl_setwrapped_exponent(resultp1,dest_exponent,unfl); Dbl_copytoptr(resultp1,resultp2,dstptr); if (inexact) if (Is_inexacttrap_enabled()) return(UNDERFLOWEXCEPTION | INEXACTEXCEPTION); else Set_inexactflag(); return(UNDERFLOWEXCEPTION); } /* */ is_tiny = TRUE; if (dest_exponent == 0 && inexact) { switch (Rounding_mode()) { case ROUNDPLUS: if (Dbl_iszero_sign(resultp1)) { Dbl_increment(opnd3p1,opnd3p2); if (Dbl_isone_hiddenoverflow(opnd3p1)) is_tiny = FALSE; Dbl_decrement(opnd3p1,opnd3p2); } break; case ROUNDMINUS: if (Dbl_isone_sign(resultp1)) { Dbl_increment(opnd3p1,opnd3p2); if (Dbl_isone_hiddenoverflow(opnd3p1)) is_tiny = FALSE; Dbl_decrement(opnd3p1,opnd3p2); } break; case ROUNDNEAREST: if (guardbit && (stickybit || Dbl_isone_lowmantissap2(opnd3p2))) { Dbl_increment(opnd3p1,opnd3p2); if (Dbl_isone_hiddenoverflow(opnd3p1)) is_tiny = FALSE; Dbl_decrement(opnd3p1,opnd3p2); } break; } } /* */ stickybit = inexact; Dbl_denormalize(opnd3p1,opnd3p2,dest_exponent,guardbit, stickybit,inexact); /* */ if (inexact) { switch (Rounding_mode()) { case ROUNDPLUS: if (Dbl_iszero_sign(resultp1)) { Dbl_increment(opnd3p1,opnd3p2); } break; case ROUNDMINUS: if (Dbl_isone_sign(resultp1)) { Dbl_increment(opnd3p1,opnd3p2); } break; case ROUNDNEAREST: if (guardbit && (stickybit || Dbl_isone_lowmantissap2(opnd3p2))) { Dbl_increment(opnd3p1,opnd3p2); } break; } if (is_tiny) Set_underflowflag(); } Dbl_set_exponentmantissa(resultp1,resultp2,opnd3p1,opnd3p2); } else Dbl_set_exponent(resultp1,dest_exponent); Dbl_copytoptr(resultp1,resultp2,dstptr); /* */ if (inexact) { if (Is_inexacttrap_enabled()) return(INEXACTEXCEPTION); else Set_inexactflag(); } return(NOEXCEPTION); }