/*
* edmaHwi() - Interrupt service routine for the DMA transfer. It is
* triggered when a complete DMA receive frame has been
* transferred. The edmaHwi ISR is inserted into the interrupt
* vector table at compile time through a setting in the DSP/BIOS
* configuration under Scheduling --> HWI --> HWI_INT8. edmaHwi
* uses the DSP/BIOS Dispatcher to save register state and make
* sure the ISR co-exists with other DSP/BIOS functions.
*/
void edmaHwi(void)
{
static Uint32 pingOrPong = PING; // Ping-pong state variable
static Int16 xmtdone = 0, rcvdone = 0;
/* Check CIPR to see which transfer completed */
if (EDMA_intTest(gXmtChan))
{
EDMA_intClear(gXmtChan);
xmtdone = 1;
}
if (EDMA_intTest(gRcvChan))
{
EDMA_intClear(gRcvChan);
rcvdone = 1;
}
/* If both transfers complete, signal processBufferSwi to handle */
if (xmtdone && rcvdone)
{
if (pingOrPong==PING)
{
SWI_or(&processBufferSwi, PING);
pingOrPong = PONG;
} else
{
SWI_or(&processBufferSwi, PONG);
pingOrPong = PING;
}
rcvdone = 0;
xmtdone = 0;
}
}
void HWI_handleEDMAInterrupt(){
if(EDMA_intTest(tccTrxPing)) {
EDMA_intClear(tccTrxPing);
SWI_post(&procPing);
}
else if(EDMA_intTest(tccTrxPong)) {
EDMA_intClear(tccTrxPong);
SWI_post(&procPong);
}
}
void EDMA_ISR(void)
{
static int rcvPingDone=0; //static
static int rcvPongDone=0;
static int xmtPingDone=0;
static int xmtPongDone=0;
if(EDMA_intTest(tccRcvPing)) {
EDMA_intClear(tccRcvPing); // clear is mandatory
rcvPingDone=1;
}
else if(EDMA_intTest(tccRcvPong)) {
EDMA_intClear(tccRcvPong);
rcvPongDone=1;
}
if(EDMA_intTest(tccXmtPing)) {
EDMA_intClear(tccXmtPing);
xmtPingDone=1;
}
else if(EDMA_intTest(tccXmtPong)) {
EDMA_intClear(tccXmtPong);
xmtPongDone=1;
}
if(rcvPingDone && xmtPingDone) {
rcvPingDone=0;
xmtPingDone=0;
// processing in SWI
SWI_post(&SWI_Ping);
}
else if(rcvPongDone && xmtPongDone) {
rcvPongDone=0;
xmtPongDone=0;
// processing in SWI
SWI_post(&SWI_Pong);
}
}
void EDMA_interrupt_service(void)
{
//LOG_printf(&myLog, "EDMA interrupt");
static volatile int rcvPingDone=0;
static volatile int rcvPongDone=0;
static volatile int rcvPengDone=0;
static volatile int xmtPingDone=0;
static volatile int xmtPongDone=0;
static volatile int xmtPengDone=0;
if(EDMA_intTest(tccRcvPing))
{
EDMA_intClear(tccRcvPing); /* clear is mandatory */
rcvPingDone=1;
}
else if(EDMA_intTest(tccRcvPong)) // EIGEN!!!: Richtiges Flag verwendet?
{
EDMA_intClear(tccRcvPong);
rcvPongDone=1;
}
else if(EDMA_intTest(tccRcvPeng)) // EIGEN!!!: Richtiges Flag verwendet?
{
EDMA_intClear(tccRcvPeng);
rcvPengDone=1;
}
if(EDMA_intTest(tccXmtPing)) // EIGEN!!!: Richtiges Flag verwendet?
{
EDMA_intClear(tccXmtPing);
xmtPingDone=1;
}
else if(EDMA_intTest(tccXmtPong)) // EIGEN!!!: Richtiges Flag verwendet?
{
EDMA_intClear(tccXmtPong);
xmtPongDone=1;
}
else if(EDMA_intTest(tccXmtPeng)) // EIGEN!!!: Richtiges Flag verwendet?
{
EDMA_intClear(tccXmtPeng);
xmtPengDone=1;
}
if(rcvPingDone && xmtPingDone) {
rcvPingDone=0;
xmtPingDone=0;
// processing in SWI
SWI_post(&Ping_SWI);
}
else if(rcvPongDone && xmtPongDone) {
rcvPongDone=0;
xmtPongDone=0;
// processing in SWI
SWI_post(&Pong_SWI);
}
else if(rcvPengDone && xmtPengDone) {
rcvPengDone=0;
xmtPengDone=0;
// processing in SWI
SWI_post(&Peng_SWI);
}
}
