예제 #1
0
/**
 * \brief   This function selects the McSPI pins for use. The McSPI pins
 *          are multiplexed with pins of other peripherals in the SoC
 *
 * \param   instanceNum       The instance number of the McSPI instance to be
 *                            used.
 * \return  Returns the value S_PASS if the desired functionality is met else
 *          returns the appropriate error value. Error values can be
 *          1) E_INST_NOT_SUPP - McSPI instance not supported
 *          2) E_INVALID_PROFILE - Invalid profile setting of EVM for McSPI
 *
 * \note    This muxing depends on the profile in which the EVM is configured.
 */
int McSPIPinMuxSetup(unsigned int instanceNum)
{
    unsigned int profile = 0;
    int status = E_INST_NOT_SUPP;

    if(MCSPI_INSTANCE == instanceNum)
    {
        profile = EVMProfileGet();

        switch (profile)
        {
            case MCSPI_EVM_PROFILE:
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_SPI0_SCLK) =
                     (CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_PUTYPESEL |
                      CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_RXACTIVE);
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_SPI0_D0) =
                     (CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_PUTYPESEL |
                      CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_RXACTIVE);
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_SPI0_D1) =
                     (CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_PUTYPESEL |
                      CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_RXACTIVE);
                status = S_PASS;
            break;
            default:
                status = E_INVALID_PROFILE;
            break;
        }
    }
    return status;
}
예제 #2
0
파일: gpio.c 프로젝트: OS-Project/Divers
unsigned int GPIO0Pin6PinMuxSetup(void)
{
    unsigned int profile = 0;
    unsigned int status = FALSE;

    profile = EVMProfileGet(); 

    switch(profile)
    {
        /* Fall through for cases 0, 1, 2, 3, 4, and 6. */
        case 0:
        case 1:
        case 2:
        case 3:
        case 4:
        case 6:
        case 7:
            HWREG(SOC_CONTROL_REGS + CONTROL_CONF_SPI0_CS1) =
                (CONTROL_CONF_SPI0_CS1_CONF_SPI0_CS1_RXACTIVE |
                 CONTROL_CONF_SPI0_CS1_CONF_SPI0_CS1_PUTYPESEL |
                 CONTROL_CONF_MUXMODE(7));
            status = TRUE;
        break;

        /* Fall through for case 5. */
        case 5:
        default:
        break; 
    }
    
    return status;
}
예제 #3
0
파일: gpio.c 프로젝트: OS-Project/Divers
unsigned int GPIO1Pin20PinMuxSetup(void)
{
    unsigned int profile = 0;
    unsigned int status = FALSE;

    profile = EVMProfileGet();

    switch(profile)
    {
        /* Fall through for cases 0, 1, 2, 4, 5 and 6. */
        case 0:
        case 1:
        case 2:
        case 4:
        case 5:
        case 6:
        case 7:
            HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_A(4)) =
                CONTROL_CONF_MUXMODE(7);
            status = TRUE;
        break;

        case 3:
        default:
        break;
    }

    return status;
}
예제 #4
0
파일: gpio.c 프로젝트: OS-Project/Divers
unsigned int GPIO2Pin24PinMuxSetup(void)
{
    unsigned int profile = 0;
    unsigned int status = FALSE;

    profile = EVMProfileGet();

    switch(profile)
    {
        case 3:
            HWREG(SOC_CONTROL_REGS + CONTROL_CONF_LCD_PCLK) =
                CONTROL_CONF_MUXMODE(7);
            status = TRUE;
        break;

        /* Fall through for cases 0, 1, 2, 4, 5, 6 and 7. */
        case 0:
        case 1:
        case 2:
        case 4:
        case 5:
        case 6:
        case 7:
        default:
        break;
    }

    return status;
}
예제 #5
0
파일: gpio.c 프로젝트: OS-Project/Divers
unsigned int GPIO0Pin7PinMuxSetup(void)
{
    unsigned int profile = 0;
    unsigned int status = FALSE;

    profile = EVMProfileGet(); 

    switch(profile)
    {
        /* Fall through for cases 0, 1, and 2. */
        case 0:
        case 1:
        case 2:
        case 7:
            HWREG(SOC_CONTROL_REGS + CONTROL_CONF_ECAP0_IN_PWM0_OUT) =	
                (CONTROL_CONF_ECAP0_IN_PWM0_OUT_CONF_ECAP0_IN_PWM0_OUT_RXACTIVE |
                 CONTROL_CONF_MUXMODE(7));
            status = TRUE;
        break;

        /* Fall through for cases 3, 4, 5 and 6. */
        case 3:
        case 4:
        case 5:
        case 6:
        default:
        break;
    }
    return status;
}
예제 #6
0
파일: gpio.c 프로젝트: OS-Project/Divers
unsigned int GPIO1Pin2PinMuxSetup(void)
{
    unsigned int profile = 7;
    unsigned int status = FALSE;

    profile = EVMProfileGet(); 
	
    switch(profile)
    {
        case 0:
		case 3:
				//HWREG(SOC_CONTROL_REGS + CONTROL_CONF_SPI0_D0) = 
				HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_AD(2)) = 
					((CONTROL_CONF_GPMC_AD_CONF_GPMC_AD_RXACTIVE |
					 CONTROL_CONF_GPMC_AD_CONF_GPMC_AD_PUDEN |
					  CONTROL_CONF_MUXMODE(7)) & (~CONTROL_CONF_GPMC_AD_CONF_GPMC_AD_PUTYPESEL));
				status = TRUE;
				break;
        case 1:
        case 2:
        case 4:
        case 5:
        case 6:
        case 7:		
        default:
        break;
    }
    return status;
}
예제 #7
0
파일: gpio.c 프로젝트: OS-Project/Divers
unsigned int GPIO1Pin16PinMuxSetup(void)
{
    unsigned int profile = 0;
    unsigned int status = FALSE;

    profile = EVMProfileGet(); 

    switch(profile)
    {
        /* Fall through for cases 0 and 3. */
        case 0:
        case 3:
        case 5:
            HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_A(0)) =
                (CONTROL_CONF_GPMC_A0_CONF_GPMC_A0_RXACTIVE |
                 CONTROL_CONF_MUXMODE(7));
            status = TRUE;
        break;

        /* Fall through for cases 1, 2, 4, 6 and 7. */
        case 1:
        case 2:
        case 4:
        case 6:
        case 7:
        default:
        break;
    }
    return status;
}
예제 #8
0
파일: gpio.c 프로젝트: OS-Project/Divers
unsigned int GPIO1Pin28PinMuxSetup(void)
{
    unsigned int profile = 1;
    unsigned int status = FALSE;

    profile = EVMProfileGet(); 

    switch(profile)
    {
        /* Fall through for cases 1, 2, 4 and 6. */
        case 1:
        case 2:
        case 4:
        case 6:
        case 7:
            HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_BE1N) =
                (CONTROL_CONF_GPMC_BE1N_CONF_GPMC_BE1N_RXACTIVE |
                 CONTROL_CONF_GPMC_BE1N_CONF_GPMC_BE1N_PUTYPESEL |
                  CONTROL_CONF_MUXMODE(7));
            status = TRUE;
        break;

        /* Fall through for cases 0, 3, and 5. */
        case 0:
        case 3:
        case 5:
        default:
        break;
    }
    return status;
}
예제 #9
0
/**
 * \brief   This function selects the DCAN pins for use. The DCAN pins
 *          are multiplexed with pins of other peripherals in the SoC
 *
 * \param   instanceNum       The DCAN instance to be used.
 *
 * \return  TRUE/FALSE.
 *
 */
unsigned int DCANPinMuxSetUp(unsigned int instanceNum)
{
    unsigned int profile = 1;
    unsigned int status = FALSE;

    if(1 != instanceNum)
    {
    }

    profile = EVMProfileGet(); 

    if(1 == profile)
    {
        /* Pin Mux for DCAN0 Tx Pin */
        HWREG(SOC_CONTROL_REGS + CONTROL_CONF_UART_CTSN(0)) = 
                  DCAN_SLEWFAST_RXDISABLED_PULLDWN_PUPDENABLED_MODE2;

        /* Pin Mux for DCAN0 Rx Pin */
        HWREG(SOC_CONTROL_REGS + CONTROL_CONF_UART_RTSN(0)) = 
                  DCAN_SLEWFAST_RXENABLED_PULLUP_PUPDENABLED_MODE2;
       
        status = TRUE; 
    }

    return status;
}
예제 #10
0
파일: mcspi.c 프로젝트: OS-Project/Divers
/**
 * \brief   This function selects the McSPI pins for use. The McSPI pins
 *          are multiplexed with pins of other peripherals in the SoC
 *          
 * \param   instanceNum       The instance number of the McSPI instance to be
 *                            used.
 * \return  TRUE/FALSE
 *
 * \note    This muxing depends on the profile in which the EVM is configured.
 */
unsigned int McSPIPinMuxSetup(unsigned int instanceNum)
{
    unsigned int profile = 2;
    unsigned int status = FALSE;

    if (0 != instanceNum)
    {
        return FALSE;
    }

    profile = EVMProfileGet(); 

    switch (profile)
    {
        case 2:
            HWREG(SOC_CONTROL_REGS + CONTROL_CONF_SPI0_SCLK) = 
                 (CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_PUTYPESEL | 
                      CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_RXACTIVE);
            HWREG(SOC_CONTROL_REGS + CONTROL_CONF_SPI0_D0) = 
                 (CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_PUTYPESEL | 
                      CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_RXACTIVE);
            HWREG(SOC_CONTROL_REGS + CONTROL_CONF_SPI0_D1) = 
                 (CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_PUTYPESEL | 
                      CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_RXACTIVE);
            status = TRUE;
        break;
        default:
        break;
    }
    return status;
}
예제 #11
0
unsigned int UARTPinMuxSetup(unsigned int instanceNum)
{
    unsigned int profile = 0;
    unsigned int status = FALSE;

    profile = EVMProfileGet(); 

    switch (profile)
    {
        /* All profiles have the same setting. */
        case 0:
        case 1:
        case 2:
        case 3:
        case 4:
        case 5:
        case 6:
        case 7:
            if(0 == instanceNum)
            {
                /* RXD */
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_UART_RXD(0)) = 
                (CONTROL_CONF_UART0_RXD_CONF_UART0_RXD_PUTYPESEL | 
                 CONTROL_CONF_UART0_RXD_CONF_UART0_RXD_RXACTIVE);

                /* TXD */
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_UART_TXD(0)) = 
                CONTROL_CONF_UART0_TXD_CONF_UART0_TXD_PUTYPESEL;
                status = TRUE;
            }

        break;

        default:
        break;
    }
    return status;
}
예제 #12
0
파일: mcspi.c 프로젝트: OS-Project/Divers
/**
 * \brief   This function selects the McSPI CS's for use. The McSPI CS pins
 *          are multiplexed with pins of other peripherals in the SoC
 *          
 * \param   instanceNum       The instance number of the McSPI instance to be
 *                            used.
 * \return  TRUE/FALSE
 *
 * \note    This muxing depends on the profile in which the EVM is configured.
 */
unsigned int McSPI0CSPinMuxSetup(unsigned int csPinNum)
{
    unsigned int profile = 2;

    if (0 != csPinNum)
    {
        return FALSE;
    }

    profile = EVMProfileGet(); 

    switch (profile)
    {
        case 2:
            HWREG(SOC_CONTROL_REGS + CONTROL_CONF_SPI0_CS0) = 
                 (CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_PUTYPESEL | 
                      CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_RXACTIVE);
            return TRUE;
        default:
        break;
    }
    return FALSE;
}
예제 #13
0
/**
 * \brief   This function selects the McSPI CS's for use. The McSPI CS pins
 *          are multiplexed with pins of other peripherals in the SoC
 *
 * \param   csPinNum       The Chip select of the McSPI instance to be
 *                         used.
 * \return  Returns the value S_PASS if the desired functionality is met else
 *          returns the appropriate error value. Error values can be
 *          1) E_INVALID_CHIP_SEL - Chip select not supported
 *          2) E_INVALID_PROFILE - Invalid profile setting of EVM for McSPI
 *
 * \note    This muxing depends on the profile in which the EVM is configured.
 */
int McSPI0CSPinMuxSetup(unsigned int csPinNum)
{
    unsigned int profile = 0;
    int status = E_INVALID_CHIP_SEL;

    if(MCSPI_CHANNEL_0 == csPinNum)
    {
        profile = EVMProfileGet();

        switch(profile)
        {
            case MCSPI_EVM_PROFILE:
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_SPI0_CS0) =
                     (CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_PUTYPESEL |
                      CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_RXACTIVE);
                status = S_PASS;
            break;
            default:
                status = E_INVALID_PROFILE;
            break;
        }
    }
    return status;
}
예제 #14
0
unsigned int NANDPinMuxSetup(void)
{
    unsigned int profile = 0;
    unsigned int status = FALSE;

    profile = EVMProfileGet(); 

    switch (profile)
    {
        /* All profiles have the same setting. */
        case 0:
        case 1:
        case 4:
        case 5:
        case 6:
        case 7:
                /* GPMC_AD0 */
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_AD(0)) =
                ( 0 << CONTROL_CONF_GPMC_AD0_CONF_GPMC_AD0_MMODE_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD0_CONF_GPMC_AD0_PUDEN_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD0_CONF_GPMC_AD0_PUTYPESEL_SHIFT) |
                ( 1 << CONTROL_CONF_GPMC_AD0_CONF_GPMC_AD0_RXACTIVE_SHIFT);

                /* GPMC_AD1 */
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_AD(1)) =
                ( 0 << CONTROL_CONF_GPMC_AD1_CONF_GPMC_AD1_MMODE_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD1_CONF_GPMC_AD1_PUDEN_SHIFT)|
                ( 0 << CONTROL_CONF_GPMC_AD1_CONF_GPMC_AD1_PUTYPESEL_SHIFT) |
                ( 1 << CONTROL_CONF_GPMC_AD1_CONF_GPMC_AD1_RXACTIVE_SHIFT) ;
                /* GPMC_AD2 */
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_AD(2)) =
                ( 0 << CONTROL_CONF_GPMC_AD2_CONF_GPMC_AD2_MMODE_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD2_CONF_GPMC_AD2_PUDEN_SHIFT)|
                ( 0 << CONTROL_CONF_GPMC_AD2_CONF_GPMC_AD2_PUTYPESEL_SHIFT) |
                ( 1 << CONTROL_CONF_GPMC_AD2_CONF_GPMC_AD2_RXACTIVE_SHIFT) ;
                /* GPMC_AD3 */
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_AD(3)) =
                ( 0 << CONTROL_CONF_GPMC_AD3_CONF_GPMC_AD3_MMODE_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD3_CONF_GPMC_AD3_PUDEN_SHIFT)|
                ( 0 << CONTROL_CONF_GPMC_AD3_CONF_GPMC_AD3_PUTYPESEL_SHIFT) |
                ( 1 << CONTROL_CONF_GPMC_AD3_CONF_GPMC_AD3_RXACTIVE_SHIFT) ;
                /* GPMC_AD4 */
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_AD(4)) =
                ( 0 << CONTROL_CONF_GPMC_AD4_CONF_GPMC_AD4_MMODE_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD4_CONF_GPMC_AD4_PUDEN_SHIFT)|
                ( 0 << CONTROL_CONF_GPMC_AD4_CONF_GPMC_AD4_PUTYPESEL_SHIFT) |
                ( 1 << CONTROL_CONF_GPMC_AD4_CONF_GPMC_AD4_RXACTIVE_SHIFT) ;
                /* GPMC_AD5 */
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_AD(5)) =
                ( 0 << CONTROL_CONF_GPMC_AD5_CONF_GPMC_AD5_MMODE_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD5_CONF_GPMC_AD5_PUDEN_SHIFT)|
                ( 0 << CONTROL_CONF_GPMC_AD5_CONF_GPMC_AD5_PUTYPESEL_SHIFT) |
                ( 1 << CONTROL_CONF_GPMC_AD5_CONF_GPMC_AD5_RXACTIVE_SHIFT) ;
                /* GPMC_AD6 */
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_AD(6)) =
                ( 0 << CONTROL_CONF_GPMC_AD6_CONF_GPMC_AD6_MMODE_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD6_CONF_GPMC_AD6_PUDEN_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD6_CONF_GPMC_AD6_PUTYPESEL_SHIFT) |
                ( 1 << CONTROL_CONF_GPMC_AD6_CONF_GPMC_AD6_RXACTIVE_SHIFT) ;
                /* GPMC_AD7 */
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_AD(7)) =
                ( 0 << CONTROL_CONF_GPMC_AD7_CONF_GPMC_AD7_MMODE_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD7_CONF_GPMC_AD7_PUDEN_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD7_CONF_GPMC_AD7_PUTYPESEL_SHIFT) |
                ( 1 << CONTROL_CONF_GPMC_AD7_CONF_GPMC_AD7_RXACTIVE_SHIFT) ;
                /* GPMC_AD8 */
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_AD(8)) =
                ( 0 << CONTROL_CONF_GPMC_AD8_CONF_GPMC_AD8_MMODE_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD8_CONF_GPMC_AD8_PUDEN_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD8_CONF_GPMC_AD8_PUTYPESEL_SHIFT) |
                ( 1 << CONTROL_CONF_GPMC_AD8_CONF_GPMC_AD8_RXACTIVE_SHIFT) ;
                /* GPMC_AD9 */
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_AD(9)) =
                ( 0 << CONTROL_CONF_GPMC_AD9_CONF_GPMC_AD9_MMODE_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD9_CONF_GPMC_AD9_PUDEN_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD9_CONF_GPMC_AD9_PUTYPESEL_SHIFT) |
                ( 1 << CONTROL_CONF_GPMC_AD9_CONF_GPMC_AD9_RXACTIVE_SHIFT) ;
                /* GPMC_AD10 */
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_AD(10)) =
                ( 0 << CONTROL_CONF_GPMC_AD10_CONF_GPMC_AD10_MMODE_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD10_CONF_GPMC_AD10_PUDEN_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD10_CONF_GPMC_AD10_PUTYPESEL_SHIFT) |
                ( 1 << CONTROL_CONF_GPMC_AD10_CONF_GPMC_AD10_RXACTIVE_SHIFT) ;
                /* GPMC_AD11 */
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_AD(11)) =
                ( 0 << CONTROL_CONF_GPMC_AD11_CONF_GPMC_AD11_MMODE_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD11_CONF_GPMC_AD11_PUDEN_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD11_CONF_GPMC_AD11_PUTYPESEL_SHIFT) |
                ( 1 << CONTROL_CONF_GPMC_AD11_CONF_GPMC_AD11_RXACTIVE_SHIFT) ;
                /* GPMC_AD12 */
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_AD(12)) =
                ( 0 << CONTROL_CONF_GPMC_AD12_CONF_GPMC_AD12_MMODE_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD12_CONF_GPMC_AD12_PUDEN_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD12_CONF_GPMC_AD12_PUTYPESEL_SHIFT) |
                ( 1 << CONTROL_CONF_GPMC_AD12_CONF_GPMC_AD12_RXACTIVE_SHIFT) ;

                /* GPMC_AD13 */
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_AD(13)) =
                ( 0 << CONTROL_CONF_GPMC_AD13_CONF_GPMC_AD13_MMODE_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD13_CONF_GPMC_AD13_PUDEN_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD13_CONF_GPMC_AD13_PUTYPESEL_SHIFT) |
                ( 1 << CONTROL_CONF_GPMC_AD13_CONF_GPMC_AD13_RXACTIVE_SHIFT) ;
                /* GPMC_AD14 */
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_AD(14)) =
                ( 0 << CONTROL_CONF_GPMC_AD14_CONF_GPMC_AD14_MMODE_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD14_CONF_GPMC_AD14_PUDEN_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD14_CONF_GPMC_AD14_PUTYPESEL_SHIFT) |
                ( 1 << CONTROL_CONF_GPMC_AD14_CONF_GPMC_AD14_RXACTIVE_SHIFT) ;
                /* GPMC_AD15 */
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_AD(15)) =
                ( 0 << CONTROL_CONF_GPMC_AD15_CONF_GPMC_AD15_MMODE_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD15_CONF_GPMC_AD15_PUDEN_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_AD15_CONF_GPMC_AD15_PUTYPESEL_SHIFT) |
                ( 1 << CONTROL_CONF_GPMC_AD15_CONF_GPMC_AD15_RXACTIVE_SHIFT) ;

                /* GPMC_WAIT0 */
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_WAIT0) =
                ( 0 << CONTROL_CONF_GPMC_WAIT0_CONF_GPMC_WAIT0_MMODE_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_WAIT0_CONF_GPMC_WAIT0_PUDEN_SHIFT) |
                ( 1 << CONTROL_CONF_GPMC_WAIT0_CONF_GPMC_WAIT0_PUTYPESEL_SHIFT)|
                ( 1 << CONTROL_CONF_GPMC_WAIT0_CONF_GPMC_WAIT0_RXACTIVE_SHIFT);

                /* GPMC_WPN */
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_WPN) =
                ( 0 << CONTROL_CONF_GPMC_WPN_CONF_GPMC_WPN_MMODE_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_WPN_CONF_GPMC_WPN_PUDEN_SHIFT) |
                ( 1 << CONTROL_CONF_GPMC_WPN_CONF_GPMC_WPN_PUTYPESEL_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_WPN_CONF_GPMC_WPN_RXACTIVE_SHIFT);

                /* GPMC_CS0 */
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_CSN(0)) =
                ( 0 << CONTROL_CONF_GPMC_CSN0_CONF_GPMC_CSN0_MMODE_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_CSN0_CONF_GPMC_CSN0_PUDEN_SHIFT)|
                ( 1 << CONTROL_CONF_GPMC_CSN0_CONF_GPMC_CSN0_PUTYPESEL_SHIFT)|
                ( 0 << CONTROL_CONF_GPMC_CSN0_CONF_GPMC_CSN0_RXACTIVE_SHIFT);

                /* GPMC_ALE */
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_ADVN_ALE) =
                ( 0 << CONTROL_CONF_GPMC_ADVN_ALE_CONF_GPMC_ADVN_ALE_MMODE_SHIFT
                ) |
                ( 0 << CONTROL_CONF_GPMC_ADVN_ALE_CONF_GPMC_ADVN_ALE_PUDEN_SHIFT
                )  |
                ( 1 <<
                CONTROL_CONF_GPMC_ADVN_ALE_CONF_GPMC_ADVN_ALE_PUTYPESEL_SHIFT) |
                ( 0 <<
                CONTROL_CONF_GPMC_ADVN_ALE_CONF_GPMC_ADVN_ALE_RXACTIVE_SHIFT);

                /* GPMC_BE0N_CLE */
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_BE0N_CLE) =
                ( 0 << CONTROL_CONF_GPMC_BE0N_CLE_CONF_GPMC_BE0N_CLE_MMODE_SHIFT
                ) |
                ( 0 << CONTROL_CONF_GPMC_BE0N_CLE_CONF_GPMC_BE0N_CLE_PUDEN_SHIFT
                )  |
                ( 1 <<
                CONTROL_CONF_GPMC_BE0N_CLE_CONF_GPMC_BE0N_CLE_PUTYPESEL_SHIFT) |
                ( 0 <<
                CONTROL_CONF_GPMC_BE0N_CLE_CONF_GPMC_BE0N_CLE_RXACTIVE_SHIFT);

                /* GPMC_OEN_REN */
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_OEN_REN) =
                ( 0 << CONTROL_CONF_GPMC_OEN_REN_CONF_GPMC_OEN_REN_MMODE_SHIFT
                ) |
                ( 0 << CONTROL_CONF_GPMC_OEN_REN_CONF_GPMC_OEN_REN_PUDEN_SHIFT
                )  |
                ( 1 <<
                CONTROL_CONF_GPMC_OEN_REN_CONF_GPMC_OEN_REN_PUTYPESEL_SHIFT) |
                ( 0 <<
                CONTROL_CONF_GPMC_OEN_REN_CONF_GPMC_OEN_REN_RXACTIVE_SHIFT);

                /* GPMC_WEN */
                HWREG(SOC_CONTROL_REGS + CONTROL_CONF_GPMC_WEN) =
                ( 0 << CONTROL_CONF_GPMC_WEN_CONF_GPMC_WEN_MMODE_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_WEN_CONF_GPMC_WEN_PUDEN_SHIFT)  |
                ( 1 << CONTROL_CONF_GPMC_WEN_CONF_GPMC_WEN_PUTYPESEL_SHIFT) |
                ( 0 << CONTROL_CONF_GPMC_WEN_CONF_GPMC_WEN_RXACTIVE_SHIFT);
                 status = TRUE;

        break;

        case 2:
        case 3:
        break;

        default:
        break;
    }
    return status;
}