static void swPanelPowerSequence(int disp,int delay)
{
unsigned int reg;
/* disp should be 1 to open sequence */
reg = PEEK32(PANEL_DISPLAY_CTRL);
reg = FIELD_VALUE(reg,PANEL_DISPLAY_CTRL,FPEN,disp);
POKE32(PANEL_DISPLAY_CTRL,reg);
primaryWaitVerticalSync(delay);
reg = PEEK32(PANEL_DISPLAY_CTRL);
reg = FIELD_VALUE(reg,PANEL_DISPLAY_CTRL,DATA,disp);
POKE32(PANEL_DISPLAY_CTRL,reg);
primaryWaitVerticalSync(delay);
reg = PEEK32(PANEL_DISPLAY_CTRL);
reg = FIELD_VALUE(reg,PANEL_DISPLAY_CTRL,VBIASEN,disp);
POKE32(PANEL_DISPLAY_CTRL,reg);
primaryWaitVerticalSync(delay);
reg = PEEK32(PANEL_DISPLAY_CTRL);
reg = FIELD_VALUE(reg,PANEL_DISPLAY_CTRL,FPEN,disp);
POKE32(PANEL_DISPLAY_CTRL,reg);
primaryWaitVerticalSync(delay);
}
void hw_cursor_setPos(struct lynx_cursor * cursor,
int x,int y)
{
u32 reg;
reg = FIELD_VALUE(0,HWC_LOCATION,Y,y)|
FIELD_VALUE(0,HWC_LOCATION,X,x);
POKE32(HWC_LOCATION,reg);
}
/*
SM750LE only:
This function takes care extra registers and bit fields required to set
up a mode in SM750LE
Explanation about Display Control register:
HW only supports 7 predefined pixel clocks, and clock select is
in bit 29:27 of Display Control register.
*/
static unsigned long displayControlAdjust_SM750LE(mode_parameter_t *pModeParam, unsigned long dispControl)
{
unsigned long x, y;
x = pModeParam->horizontal_display_end;
y = pModeParam->vertical_display_end;
/* SM750LE has to set up the top-left and bottom-right
registers as well.
Note that normal SM750/SM718 only use those two register for
auto-centering mode.
*/
POKE32(CRT_AUTO_CENTERING_TL,
FIELD_VALUE(0, CRT_AUTO_CENTERING_TL, TOP, 0)
| FIELD_VALUE(0, CRT_AUTO_CENTERING_TL, LEFT, 0));
POKE32(CRT_AUTO_CENTERING_BR,
FIELD_VALUE(0, CRT_AUTO_CENTERING_BR, BOTTOM, y-1)
| FIELD_VALUE(0, CRT_AUTO_CENTERING_BR, RIGHT, x-1));
/* Assume common fields in dispControl have been properly set before
calling this function.
This function only sets the extra fields in dispControl.
*/
/* Clear bit 29:27 of display control register */
dispControl &= FIELD_CLEAR(CRT_DISPLAY_CTRL, CLK);
/* Set bit 29:27 of display control register for the right clock */
/* Note that SM750LE only need to supported 7 resoluitons. */
if (x == 800 && y == 600)
dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL41);
else if (x == 1024 && y == 768)
dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL65);
else if (x == 1152 && y == 864)
dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL80);
else if (x == 1280 && y == 768)
dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL80);
else if (x == 1280 && y == 720)
dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL74);
else if (x == 1280 && y == 960)
dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL108);
else if (x == 1280 && y == 1024)
dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL108);
else /* default to VGA clock */
dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL25);
/* Set bit 25:24 of display controller */
dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CRTSELECT, CRT);
dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, RGBBIT, 24BIT);
/* Set bit 14 of display controller */
dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLOCK_PHASE, ACTIVE_LOW);
POKE32(CRT_DISPLAY_CTRL, dispControl);
return dispControl;
}
/*
* This function sets the RGB565 color lookup table for each 16
* 4-bit indexed colors.
*
* Input:
* pColorLookupTable - Pointer to a RGB565 colors of each 4-bit indexed
* colors. It has to have 16 members.
*/
void alphaSetColorLookupTable(
uint32_t *pColorLookupTable /* Color Lookup Table */
)
{
uint32_t index, value;
for (index = 0; index < 16; index+=2)
{
value = FIELD_VALUE(0, ALPHA_COLOR_LOOKUP_01, 0, pColorLookupTable[index]) |
FIELD_VALUE(0, ALPHA_COLOR_LOOKUP_01, 1, pColorLookupTable[index+1]);
pokeRegisterDWord(ALPHA_COLOR_LOOKUP_01 + index, value);
}
}
// Parse parameters with non-significant whitespaces
void testParseNonSignificantWS()
{
parameterizedHeaderField p1;
p1.parse(" \t X \r\n");
VASSERT_EQ("1.1", "X", FIELD_VALUE(p1));
parameterizedHeaderField p2;
p2.parse(" X ; param1 = value1 \r\n");
VASSERT_EQ("2.1", 1, p2.getParameterCount());
VASSERT_EQ("2.2", "X", FIELD_VALUE(p2));
VASSERT_EQ("2.3", "param1", PARAM_NAME(p2, 0));
VASSERT_EQ("2.4", "value1", PARAM_VALUE(p2, 0));
}
/*
On hardware reset, power mode 0 is default.
powerMode can be 0,1 or 2
*/
void setPowerMode(unsigned long powerMode)
{
unsigned long control_value = 0;
control_value = peekRegisterDWord(POWER_MODE_CTRL);
control_value = FIELD_VALUE(control_value,POWER_MODE_CTRL,MODE,powerMode);
pokeRegisterDWord(POWER_MODE_CTRL, control_value);
}
/* hw_cursor_xxx works for voyager,718 and 750 */
void hw_cursor_enable(struct lynx_cursor * cursor)
{
u32 reg;
reg = FIELD_VALUE(0,HWC_ADDRESS,ADDRESS,cursor->offset)|
FIELD_SET(0,HWC_ADDRESS,EXT,LOCAL)|
FIELD_SET(0,HWC_ADDRESS,ENABLE,ENABLE);
POKE32(HWC_ADDRESS,reg);
}
/*
* This function sets the alpha window size.
*
* Input:
* width - Alpha Window width
* height - Alpha Window height
*
*/
void alphaSetWindowSize(
uint32_t width,
uint32_t height
)
{
uint32_t value, startX, startY;
/* Get the video window width and height */
value = peekRegisterDWord(ALPHA_PLANE_TL);
startX = FIELD_GET(value, ALPHA_PLANE_TL, LEFT);
startY = FIELD_GET(value, ALPHA_PLANE_TL, TOP);
/* Set bottom and right position */
pokeRegisterDWord(ALPHA_PLANE_BR,
FIELD_VALUE(0, ALPHA_PLANE_BR, BOTTOM, startY + height - 1) |
FIELD_VALUE(0, ALPHA_PLANE_BR, RIGHT, startX + width - 1));
}
/*
* This function sets the alpha starting coordinate position.
*
* Input:
* x - X Coordinate of the alpha window starting position
* y - Y Coordinate of the alpha window starting position
*
*/
void alphaSetPosition(
uint32_t x,
uint32_t y
)
{
uint32_t alphaWidth, alphaHeight;
/* Get the video window width and height */
alphaGetWindowSize(&alphaWidth, &alphaHeight);
/* Set top and left position */
pokeRegisterDWord(ALPHA_PLANE_TL,
FIELD_VALUE(0, ALPHA_PLANE_TL, TOP, y) |
FIELD_VALUE(0, ALPHA_PLANE_TL, LEFT, x));
/* Set bottom and right position */
alphaSetWindowSize(alphaWidth, alphaHeight);
}
/*
* This function turns on/off the DAC for CRT display control.
* Input: On or off
*/
void setDAC(disp_state_t state)
{
ulong value;
value = (state == DISP_ON)?MISC_CTRL_DAC_POWER_ON:MISC_CTRL_DAC_POWER_OFF;
pokeRegisterDWord(MISC_CTRL, FIELD_VALUE(peekRegisterDWord(MISC_CTRL),
MISC_CTRL,
DAC_POWER,
value));
}
void ddk750_setDPMS(DPMS_t state)
{
/*
Set DPMS state
DPMS is used for CRT head
*/
unsigned long value;
value = peekRegisterDWord(SYSTEM_CTRL);
value= FIELD_VALUE(value,SYSTEM_CTRL,DPMS,state);
pokeRegisterDWord(SYSTEM_CTRL, value);
}
unsigned int formatPllReg(pll_value_t *pPLL)
{
unsigned int ulPllReg = 0;
/* Note that all PLL's have the same format. Here, we just use Panel PLL parameter
to work out the bit fields in the register.
On returning a 32 bit number, the value can be applied to any PLL in the calling function.
*/
ulPllReg =
FIELD_SET( 0, PANEL_PLL_CTRL, BYPASS, OFF)
| FIELD_SET( 0, PANEL_PLL_CTRL, POWER, ON)
| FIELD_SET( 0, PANEL_PLL_CTRL, INPUT, OSC)
#ifndef VALIDATION_CHIP
| FIELD_VALUE(0, PANEL_PLL_CTRL, POD, pPLL->POD)
#endif
| FIELD_VALUE(0, PANEL_PLL_CTRL, OD, pPLL->OD)
| FIELD_VALUE(0, PANEL_PLL_CTRL, N, pPLL->N)
| FIELD_VALUE(0, PANEL_PLL_CTRL, M, pPLL->M);
return(ulPllReg);
}
/*
* This function enables/disables alpha chroma key feature.
*
* Input:
* enableChromaKey - Flag to enable/disable the chroma key.
* chromaKeyMask - Chroma key mask
* chromaKeyValue - Chroma key value
*/
void alphaSetChroma(
uint32_t enableChromaKey, /* Flag to enable/disable the chroma key
on the Alpha display plane */
uint32_t chromaKeyMask, /* Chroma Key Mask */
uint32_t chromaKeyValue /* Chroma Key Value */
)
{
uint32_t value;
value = peekRegisterDWord(ALPHA_DISPLAY_CTRL);
if (enableChromaKey)
{
value = FIELD_SET(value, ALPHA_DISPLAY_CTRL, CHROMA_KEY, ENABLE);
/* Set the chroma key mask and value */
pokeRegisterDWord(ALPHA_CHROMA_KEY,
FIELD_VALUE(0, ALPHA_CHROMA_KEY, MASK, chromaKeyMask) |
FIELD_VALUE(0, ALPHA_CHROMA_KEY, VALUE, chromaKeyValue));
}
else
value = FIELD_SET(value, ALPHA_DISPLAY_CTRL, CHROMA_KEY, DISABLE);
pokeRegisterDWord(ALPHA_DISPLAY_CTRL, value);
}
/*
* This function select the alpha method, either to use per-pixel
* or by the given alpha value.
*
* Input:
* useAlphaValue - Use the given alpha value.
* 0 - Use per-pixel alpha value
* 1 - Use the given alpha value
* alphaValue - Alpha value to be used in the alpha plane
*/
void alphaSelectMethod(
uint32_t useAlphaValue,
uint32_t alphaValue
)
{
uint32_t value;
value = peekRegisterDWord(ALPHA_DISPLAY_CTRL);
if (useAlphaValue)
value = FIELD_SET(0, ALPHA_DISPLAY_CTRL, SELECT, ALPHA) |
FIELD_VALUE(value, ALPHA_DISPLAY_CTRL, ALPHA, alphaValue);
else
value = FIELD_SET(value, ALPHA_DISPLAY_CTRL, SELECT, PER_PIXEL);
pokeRegisterDWord(ALPHA_DISPLAY_CTRL, value);
}
/*
* This function initializes the alpha plane before usage.
*
* Input:
* x - x screen coordinate of the alpha display
* y - y screen coordinate of the alpha display
* width - Alpha display window width
* height - Alpha display window height
* base - Source base address of the alpha display
* systemMemory - Memory location of the alpha display source base address
* 0 = frame buffer
* 1 = system memory
* pitch - Alpha Source base Address pitch
* alphaFormat - Alpha Format:
* ALPHA_FORMAT_RGB565 - Normal RGB565
* ALPHA_FORMAT_8BIT_A44 - 8-bit index Alpha | 4:4 mode
* ALPHA_FORMAT_ARGB_4444 - 16-bit ARGB
* useAlphaValue - Use alpha value
* alphaValue - Alpha value to be used to calculate the alpha
* pixelPanning - Starting pixel number for Smooth pixel panning
*/
_X_EXPORT void alphaInit(
uint32_t x, /* X Coordinate of the Alpha Display */
uint32_t y, /* Y Coordinate of the Alpha Display */
uint32_t width, /* Width of the alpha display window */
uint32_t height, /* Height of the alpha display window */
uint32_t base, /* Base address of the alpha display */
uint32_t systemMemory, /* Memory location of the alpha display source
base address.
0 = frame buffer
1 = system memory
*/
uint32_t pitch, /* Pitch of the alpha display */
alpha_format_t alphaFormat, /* Alpha Format */
uint32_t useAlphaValue, /* Flag to indicate of using the given Alpha Value */
uint32_t alphaValue, /* Alpha value. Only valid when the useAlphaValue is
set to 1 */
uint32_t pixelPanning /* Starting Pixel number for Smooth Pixel Panning */
)
{
uint32_t value = 0;
/* Set Alpha address */
pokeRegisterDWord(ALPHA_FB_ADDRESS,
FIELD_SET(0, ALPHA_FB_ADDRESS, STATUS, PENDING) |
((systemMemory) ?
FIELD_SET(0, ALPHA_FB_ADDRESS, EXT, EXTERNAL) :
FIELD_SET(0, ALPHA_FB_ADDRESS, EXT, LOCAL)) |
FIELD_VALUE(0, ALPHA_FB_ADDRESS, ADDRESS, base));
/* Setup the pitch and width of the alpha plane */
pokeRegisterDWord(ALPHA_FB_WIDTH,
FIELD_VALUE(0, ALPHA_FB_WIDTH, WIDTH, pitch) |
FIELD_VALUE(0, ALPHA_FB_WIDTH, OFFSET, pitch));
/* Set the X and Y Coordinate */
alphaSetPosition(x, y);
/* Set alpha window width */
alphaSetWindowSize(width, height);
/* Setup Alpha settings and enable it */
alphaSelectMethod(useAlphaValue, alphaValue);
value = peekRegisterDWord(ALPHA_DISPLAY_CTRL);
/* Set the alpha format */
switch(alphaFormat)
{
default:
case ALPHA_FORMAT_RGB565: /* Normal RGB 565 mode */
value = FIELD_SET(value, ALPHA_DISPLAY_CTRL, FORMAT, 16);
break;
case ALPHA_FORMAT_8BIT_A44: /* 8-bit index Alpha | 4:4 mode */
value = FIELD_SET(value, ALPHA_DISPLAY_CTRL, FORMAT, ALPHA_4_4);
break;
case ALPHA_FORMAT_ARGB_4444: /* 16-bit ARGB 4:4:4:4 mode */
value = FIELD_SET(value, ALPHA_DISPLAY_CTRL, FORMAT, ALPHA_4_4_4_4);
break;
}
/* Set starting pixel number for smooth pixel panning */
value = FIELD_VALUE(value, ALPHA_DISPLAY_CTRL, PIXEL, pixelPanning);
pokeRegisterDWord(ALPHA_DISPLAY_CTRL, value);
}
void deHorizontalLine(unsigned long dst_base,
unsigned long dst_pitch,
unsigned long nX,
unsigned long nY,
unsigned long dst_width, unsigned long nColor)
{
deWaitForNotBusy();
SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS,
dst_base));
SMTC_write2Dreg(DE_PITCH,
FIELD_VALUE(0, DE_PITCH, DESTINATION, dst_pitch) |
FIELD_VALUE(0, DE_PITCH, SOURCE, dst_pitch));
SMTC_write2Dreg(DE_WINDOW_WIDTH,
FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
dst_pitch) | FIELD_VALUE(0, DE_WINDOW_WIDTH,
SOURCE,
dst_pitch));
SMTC_write2Dreg(DE_FOREGROUND,
FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
SMTC_write2Dreg(DE_DESTINATION,
FIELD_SET(0, DE_DESTINATION, WRAP,
DISABLE) | FIELD_VALUE(0, DE_DESTINATION, X,
nX) | FIELD_VALUE(0,
DE_DESTINATION,
Y,
nY));
SMTC_write2Dreg(DE_DIMENSION,
FIELD_VALUE(0, DE_DIMENSION, X,
dst_width) | FIELD_VALUE(0, DE_DIMENSION,
Y_ET, 1));
SMTC_write2Dreg(DE_CONTROL,
FIELD_SET(0, DE_CONTROL, STATUS, START) | FIELD_SET(0,
DE_CONTROL,
DIRECTION,
RIGHT_TO_LEFT)
| FIELD_SET(0, DE_CONTROL, MAJOR, X) | FIELD_SET(0,
DE_CONTROL,
STEP_X,
POSITIVE)
| FIELD_SET(0, DE_CONTROL, STEP_Y,
NEGATIVE) | FIELD_SET(0, DE_CONTROL,
LAST_PIXEL,
OFF) | FIELD_SET(0,
DE_CONTROL,
COMMAND,
SHORT_STROKE)
| FIELD_SET(0, DE_CONTROL, ROP_SELECT,
ROP2) | FIELD_VALUE(0, DE_CONTROL, ROP,
0x0C));
smtc_de_busy = 1;
}
void deLine(unsigned long dst_base,
unsigned long dst_pitch,
unsigned long nX1,
unsigned long nY1,
unsigned long nX2, unsigned long nY2, unsigned long nColor)
{
unsigned long nCommand =
FIELD_SET(0, DE_CONTROL, STATUS, START) |
FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT) |
FIELD_SET(0, DE_CONTROL, MAJOR, X) |
FIELD_SET(0, DE_CONTROL, STEP_X, POSITIVE) |
FIELD_SET(0, DE_CONTROL, STEP_Y, POSITIVE) |
FIELD_SET(0, DE_CONTROL, LAST_PIXEL, OFF) |
FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
FIELD_VALUE(0, DE_CONTROL, ROP, 0x0C);
unsigned long DeltaX;
unsigned long DeltaY;
/* Calculate delta X */
if (nX1 <= nX2)
DeltaX = nX2 - nX1;
else {
DeltaX = nX1 - nX2;
nCommand = FIELD_SET(nCommand, DE_CONTROL, STEP_X, NEGATIVE);
}
/* Calculate delta Y */
if (nY1 <= nY2)
DeltaY = nY2 - nY1;
else {
DeltaY = nY1 - nY2;
nCommand = FIELD_SET(nCommand, DE_CONTROL, STEP_Y, NEGATIVE);
}
/* Determine the major axis */
if (DeltaX < DeltaY)
nCommand = FIELD_SET(nCommand, DE_CONTROL, MAJOR, Y);
/* Vertical line? */
if (nX1 == nX2)
deVerticalLine(dst_base, dst_pitch, nX1, nY1, DeltaY, nColor);
/* Horizontal line? */
else if (nY1 == nY2)
deHorizontalLine(dst_base, dst_pitch, nX1, nY1, \
DeltaX, nColor);
/* Diagonal line? */
else if (DeltaX == DeltaY) {
deWaitForNotBusy();
SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE,
ADDRESS, dst_base));
SMTC_write2Dreg(DE_PITCH,
FIELD_VALUE(0, DE_PITCH, DESTINATION,
dst_pitch) | FIELD_VALUE(0,
DE_PITCH,
SOURCE,
dst_pitch));
SMTC_write2Dreg(DE_WINDOW_WIDTH,
FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
dst_pitch) | FIELD_VALUE(0,
DE_WINDOW_WIDTH,
SOURCE,
dst_pitch));
SMTC_write2Dreg(DE_FOREGROUND,
FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
SMTC_write2Dreg(DE_DESTINATION,
FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
FIELD_VALUE(0, DE_DESTINATION, X, 1) |
FIELD_VALUE(0, DE_DESTINATION, Y, nY1));
SMTC_write2Dreg(DE_DIMENSION,
FIELD_VALUE(0, DE_DIMENSION, X, 1) |
FIELD_VALUE(0, DE_DIMENSION, Y_ET, DeltaX));
SMTC_write2Dreg(DE_CONTROL,
FIELD_SET(nCommand, DE_CONTROL, COMMAND,
SHORT_STROKE));
}
/* Generic line */
else {
unsigned int k1, k2, et, w;
if (DeltaX < DeltaY) {
k1 = 2 * DeltaX;
et = k1 - DeltaY;
k2 = et - DeltaY;
w = DeltaY + 1;
} else {
k1 = 2 * DeltaY;
et = k1 - DeltaX;
k2 = et - DeltaX;
w = DeltaX + 1;
}
deWaitForNotBusy();
SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE,
ADDRESS, dst_base));
SMTC_write2Dreg(DE_PITCH,
FIELD_VALUE(0, DE_PITCH, DESTINATION,
dst_pitch) | FIELD_VALUE(0,
DE_PITCH,
SOURCE,
dst_pitch));
SMTC_write2Dreg(DE_WINDOW_WIDTH,
FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
dst_pitch) | FIELD_VALUE(0,
DE_WINDOW_WIDTH,
SOURCE,
dst_pitch));
SMTC_write2Dreg(DE_FOREGROUND,
FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
SMTC_write2Dreg(DE_SOURCE,
FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) |
FIELD_VALUE(0, DE_SOURCE, X_K1, k1) |
FIELD_VALUE(0, DE_SOURCE, Y_K2, k2));
SMTC_write2Dreg(DE_DESTINATION,
FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
FIELD_VALUE(0, DE_DESTINATION, X, nX1) |
FIELD_VALUE(0, DE_DESTINATION, Y, nY1));
SMTC_write2Dreg(DE_DIMENSION,
FIELD_VALUE(0, DE_DIMENSION, X, w) |
FIELD_VALUE(0, DE_DIMENSION, Y_ET, et));
SMTC_write2Dreg(DE_CONTROL,
FIELD_SET(nCommand, DE_CONTROL, COMMAND,
LINE_DRAW));
}
smtc_de_busy = 1;
}
void deFillRect(unsigned long dst_base,
unsigned long dst_pitch,
unsigned long dst_X,
unsigned long dst_Y,
unsigned long dst_width,
unsigned long dst_height, unsigned long nColor)
{
deWaitForNotBusy();
SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS,
dst_base));
if (dst_pitch) {
SMTC_write2Dreg(DE_PITCH,
FIELD_VALUE(0, DE_PITCH, DESTINATION,
dst_pitch) | FIELD_VALUE(0,
DE_PITCH,
SOURCE,
dst_pitch));
SMTC_write2Dreg(DE_WINDOW_WIDTH,
FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
dst_pitch) | FIELD_VALUE(0,
DE_WINDOW_WIDTH,
SOURCE,
dst_pitch));
}
SMTC_write2Dreg(DE_FOREGROUND,
FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
SMTC_write2Dreg(DE_DESTINATION,
FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
FIELD_VALUE(0, DE_DESTINATION, X, dst_X) |
FIELD_VALUE(0, DE_DESTINATION, Y, dst_Y));
SMTC_write2Dreg(DE_DIMENSION,
FIELD_VALUE(0, DE_DIMENSION, X, dst_width) |
FIELD_VALUE(0, DE_DIMENSION, Y_ET, dst_height));
SMTC_write2Dreg(DE_CONTROL,
FIELD_SET(0, DE_CONTROL, STATUS, START) |
FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT) |
FIELD_SET(0, DE_CONTROL, LAST_PIXEL, OFF) |
FIELD_SET(0, DE_CONTROL, COMMAND, RECTANGLE_FILL) |
FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
FIELD_VALUE(0, DE_CONTROL, ROP, 0x0C));
smtc_de_busy = 1;
}
/*
* This function scale the display data.
*
* Input:
* enable - Enable/disable scaling indicator
* dispControl - Display Control where the scaling will be performed
* srcWidth - Source Width
* srcHeight - Source Height
* dstWidth - Destination Width
* dstHeight - Destination Height
*/
void scaleDisplay(
unsigned long enable, /* Enable scaling. */
disp_control_t dispControl, /* Display Control */
unsigned long srcWidth, /* Source Width */
unsigned long srcHeight, /* Source Height */
unsigned long dstWidth, /* Destination Width */
unsigned long dstHeight /* Destination Height */
)
{
unsigned long value = 0;
unsigned long scaleFactor;
DDKDEBUGPRINT((DISPLAY_LEVEL, "(scaleDisplay) srcWidth: %d, srcHeight: %d, ", srcWidth, srcHeight));
DDKDEBUGPRINT((DISPLAY_LEVEL, "dstWidth: %d, dstHeight: %d\n", dstWidth, dstHeight));
/* Enable scaling. */
if (enable == 1)
{
/* Scale the vertical size */
scaleFactor = 0;
if (dstHeight >= srcHeight)
scaleFactor = srcHeight * SCALE_CONSTANT / dstHeight;
value = FIELD_VALUE(value, CRT_SCALE , VERTICAL_SCALE, scaleFactor);
/* Scale the horizontal size */
scaleFactor = 0;
if (dstWidth >= srcWidth)
scaleFactor = srcWidth * SCALE_CONSTANT / dstWidth;
value = FIELD_VALUE(value, CRT_SCALE , HORIZONTAL_SCALE, scaleFactor);
pokeRegisterDWord(CRT_SCALE , value);
DDKDEBUGPRINT((DISPLAY_LEVEL, "scaleFactor: %x\n", peekRegisterDWord(CRT_SCALE)));
/* Enable Panel scaler path */
if (dispControl != CRT_CTRL)
{
/* TODO: set up the Auto expansion registers. Is this necessary?
Should it be done in the setmode function? */
/* Enable Auto Expansion bit. */
value = peekRegisterDWord(CRT_DISPLAY_CTRL);
value = FIELD_SET(value, CRT_DISPLAY_CTRL, EXPANSION, ENABLE);
value = FIELD_SET(value, CRT_DISPLAY_CTRL, LOCK_TIMING, ENABLE);
pokeRegisterDWord(CRT_DISPLAY_CTRL, value);
}
}
else
{
/* Set the scaler value to 0 */
pokeRegisterDWord(CRT_SCALE , 0);
DDKDEBUGPRINT((DISPLAY_LEVEL, "scaleFactor: %x\n", peekRegisterDWord(CRT_SCALE)));
/* Program the scaler to use 1:1 scaler by setting the scaler register value to 0 */
if (dispControl != CRT_CTRL)
{
value = peekRegisterDWord(CRT_DISPLAY_CTRL);
value = FIELD_SET(value, CRT_DISPLAY_CTRL, EXPANSION, DISABLE);
value = FIELD_SET(value, CRT_DISPLAY_CTRL, LOCK_TIMING, DISABLE);
pokeRegisterDWord(CRT_DISPLAY_CTRL, value);
}
}
}
void deInit(unsigned int nModeWidth, unsigned int nModeHeight,
unsigned int bpp)
{
/* Get current power configuration. */
unsigned char clock;
clock = smtc_seqr(0x21);
/* initialize global 'mutex lock' variable */
smtc_de_busy = 0;
/* Enable 2D Drawing Engine */
smtc_seqw(0x21, clock & 0xF8);
SMTC_write2Dreg(DE_CLIP_TL,
FIELD_VALUE(0, DE_CLIP_TL, TOP, 0) |
FIELD_SET(0, DE_CLIP_TL, STATUS, DISABLE) |
FIELD_SET(0, DE_CLIP_TL, INHIBIT, OUTSIDE) |
FIELD_VALUE(0, DE_CLIP_TL, LEFT, 0));
if (bpp >= 24) {
SMTC_write2Dreg(DE_PITCH,
FIELD_VALUE(0, DE_PITCH, DESTINATION,
nModeWidth * 3) | FIELD_VALUE(0,
DE_PITCH,
SOURCE,
nModeWidth
* 3));
} else {
SMTC_write2Dreg(DE_PITCH,
FIELD_VALUE(0, DE_PITCH, DESTINATION,
nModeWidth) | FIELD_VALUE(0,
DE_PITCH,
SOURCE,
nModeWidth));
}
SMTC_write2Dreg(DE_WINDOW_WIDTH,
FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
nModeWidth) | FIELD_VALUE(0,
DE_WINDOW_WIDTH,
SOURCE,
nModeWidth));
switch (bpp) {
case 8:
SMTC_write2Dreg(DE_STRETCH_FORMAT,
FIELD_SET(0, DE_STRETCH_FORMAT, PATTERN_XY,
NORMAL) | FIELD_VALUE(0,
DE_STRETCH_FORMAT,
PATTERN_Y,
0) |
FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_X,
0) | FIELD_SET(0, DE_STRETCH_FORMAT,
PIXEL_FORMAT,
8) | FIELD_SET(0,
DE_STRETCH_FORMAT,
ADDRESSING,
XY) |
FIELD_VALUE(0, DE_STRETCH_FORMAT,
SOURCE_HEIGHT, 3));
break;
case 24:
SMTC_write2Dreg(DE_STRETCH_FORMAT,
FIELD_SET(0, DE_STRETCH_FORMAT, PATTERN_XY,
NORMAL) | FIELD_VALUE(0,
DE_STRETCH_FORMAT,
PATTERN_Y,
0) |
FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_X,
0) | FIELD_SET(0, DE_STRETCH_FORMAT,
PIXEL_FORMAT,
24) | FIELD_SET(0,
DE_STRETCH_FORMAT,
ADDRESSING,
XY) |
FIELD_VALUE(0, DE_STRETCH_FORMAT,
SOURCE_HEIGHT, 3));
break;
case 16:
default:
SMTC_write2Dreg(DE_STRETCH_FORMAT,
FIELD_SET(0, DE_STRETCH_FORMAT, PATTERN_XY,
NORMAL) | FIELD_VALUE(0,
DE_STRETCH_FORMAT,
PATTERN_Y,
0) |
FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_X,
0) | FIELD_SET(0, DE_STRETCH_FORMAT,
PIXEL_FORMAT,
16) | FIELD_SET(0,
DE_STRETCH_FORMAT,
ADDRESSING,
XY) |
FIELD_VALUE(0, DE_STRETCH_FORMAT,
SOURCE_HEIGHT, 3));
break;
}
SMTC_write2Dreg(DE_MASKS,
FIELD_VALUE(0, DE_MASKS, BYTE_MASK, 0xFFFF) |
FIELD_VALUE(0, DE_MASKS, BIT_MASK, 0xFFFF));
SMTC_write2Dreg(DE_COLOR_COMPARE_MASK,
FIELD_VALUE(0, DE_COLOR_COMPARE_MASK, MASKS, \
0xFFFFFF));
SMTC_write2Dreg(DE_COLOR_COMPARE,
FIELD_VALUE(0, DE_COLOR_COMPARE, COLOR, 0xFFFFFF));
}
/**********************************************************************
*
* deCopy
*
* Purpose
* Copy a rectangular area of the source surface to a destination surface
*
* Remarks
* Source bitmap must have the same color depth (BPP) as the destination
* bitmap.
*
**********************************************************************/
void deCopy(unsigned long dst_base,
unsigned long dst_pitch,
unsigned long dst_BPP,
unsigned long dst_X,
unsigned long dst_Y,
unsigned long dst_width,
unsigned long dst_height,
unsigned long src_base,
unsigned long src_pitch,
unsigned long src_X,
unsigned long src_Y, pTransparent pTransp, unsigned char nROP2)
{
unsigned long nDirection = 0;
unsigned long nTransparent = 0;
/* Direction of ROP2 operation:
* 1 = Left to Right,
* (-1) = Right to Left
*/
unsigned long opSign = 1;
/* xWidth is in pixels */
unsigned long xWidth = 192 / (dst_BPP / 8);
unsigned long de_ctrl = 0;
deWaitForNotBusy();
SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS,
dst_base));
SMTC_write2Dreg(DE_WINDOW_SOURCE_BASE,
FIELD_VALUE(0, DE_WINDOW_SOURCE_BASE, ADDRESS,
src_base));
if (dst_pitch && src_pitch) {
SMTC_write2Dreg(DE_PITCH,
FIELD_VALUE(0, DE_PITCH, DESTINATION,
dst_pitch) | FIELD_VALUE(0,
DE_PITCH,
SOURCE,
src_pitch));
SMTC_write2Dreg(DE_WINDOW_WIDTH,
FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
dst_pitch) | FIELD_VALUE(0,
DE_WINDOW_WIDTH,
SOURCE,
src_pitch));
}
/* Set transparent bits if necessary */
if (pTransp != NULL) {
nTransparent =
pTransp->match | pTransp->select | pTransp->control;
/* Set color compare register */
SMTC_write2Dreg(DE_COLOR_COMPARE,
FIELD_VALUE(0, DE_COLOR_COMPARE, COLOR,
pTransp->color));
}
/* Determine direction of operation */
if (src_Y < dst_Y) {
/* +----------+
|S |
| +----------+
| | | |
| | | |
+---|------+ |
| D |
+----------+ */
nDirection = BOTTOM_TO_TOP;
} else if (src_Y > dst_Y) {
/* +----------+
|D |
| +----------+
| | | |
| | | |
+---|------+ |
| S |
+----------+ */
nDirection = TOP_TO_BOTTOM;
} else {
/* src_Y == dst_Y */
if (src_X <= dst_X) {
/* +------+---+------+
|S | | D|
| | | |
| | | |
| | | |
+------+---+------+ */
nDirection = RIGHT_TO_LEFT;
} else {
/* src_X > dst_X */
/* +------+---+------+
|D | | S|
| | | |
| | | |
| | | |
+------+---+------+ */
nDirection = LEFT_TO_RIGHT;
}
}
if ((nDirection == BOTTOM_TO_TOP) || (nDirection == RIGHT_TO_LEFT)) {
src_X += dst_width - 1;
src_Y += dst_height - 1;
dst_X += dst_width - 1;
dst_Y += dst_height - 1;
opSign = (-1);
}
if (dst_BPP >= 24) {
src_X *= 3;
src_Y *= 3;
dst_X *= 3;
dst_Y *= 3;
dst_width *= 3;
if ((nDirection == BOTTOM_TO_TOP)
|| (nDirection == RIGHT_TO_LEFT)) {
src_X += 2;
dst_X += 2;
}
}
/* Workaround for 192 byte hw bug */
if ((nROP2 != 0x0C) && ((dst_width * (dst_BPP / 8)) >= 192)) {
/*
* Perform the ROP2 operation in chunks of (xWidth *
* dst_height)
*/
while (1) {
deWaitForNotBusy();
SMTC_write2Dreg(DE_SOURCE,
FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) |
FIELD_VALUE(0, DE_SOURCE, X_K1, src_X) |
FIELD_VALUE(0, DE_SOURCE, Y_K2, src_Y));
SMTC_write2Dreg(DE_DESTINATION,
FIELD_SET(0, DE_DESTINATION, WRAP,
DISABLE) | FIELD_VALUE(0,
DE_DESTINATION,
X,
dst_X)
| FIELD_VALUE(0, DE_DESTINATION, Y,
dst_Y));
SMTC_write2Dreg(DE_DIMENSION,
FIELD_VALUE(0, DE_DIMENSION, X,
xWidth) | FIELD_VALUE(0,
DE_DIMENSION,
Y_ET,
dst_height));
de_ctrl =
FIELD_VALUE(0, DE_CONTROL, ROP,
nROP2) | nTransparent | FIELD_SET(0,
DE_CONTROL,
ROP_SELECT,
ROP2)
| FIELD_SET(0, DE_CONTROL, COMMAND,
BITBLT) | ((nDirection ==
1) ? FIELD_SET(0,
DE_CONTROL,
DIRECTION,
RIGHT_TO_LEFT)
: FIELD_SET(0, DE_CONTROL,
DIRECTION,
LEFT_TO_RIGHT)) |
FIELD_SET(0, DE_CONTROL, STATUS, START);
SMTC_write2Dreg(DE_CONTROL, de_ctrl);
src_X += (opSign * xWidth);
dst_X += (opSign * xWidth);
dst_width -= xWidth;
if (dst_width <= 0) {
/* ROP2 operation is complete */
break;
}
if (xWidth > dst_width)
xWidth = dst_width;
}
} else {
deWaitForNotBusy();
SMTC_write2Dreg(DE_SOURCE,
FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) |
FIELD_VALUE(0, DE_SOURCE, X_K1, src_X) |
FIELD_VALUE(0, DE_SOURCE, Y_K2, src_Y));
SMTC_write2Dreg(DE_DESTINATION,
FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
FIELD_VALUE(0, DE_DESTINATION, X, dst_X) |
FIELD_VALUE(0, DE_DESTINATION, Y, dst_Y));
SMTC_write2Dreg(DE_DIMENSION,
FIELD_VALUE(0, DE_DIMENSION, X, dst_width) |
FIELD_VALUE(0, DE_DIMENSION, Y_ET, dst_height));
de_ctrl = FIELD_VALUE(0, DE_CONTROL, ROP, nROP2) |
nTransparent |
FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
FIELD_SET(0, DE_CONTROL, COMMAND, BITBLT) |
((nDirection == 1) ? FIELD_SET(0, DE_CONTROL, DIRECTION,
RIGHT_TO_LEFT)
: FIELD_SET(0, DE_CONTROL, DIRECTION,
LEFT_TO_RIGHT)) | FIELD_SET(0, DE_CONTROL,
STATUS, START);
SMTC_write2Dreg(DE_CONTROL, de_ctrl);
}
smtc_de_busy = 1;
}
/*
* This function initializes the SSP
*
* Parameter:
* masterMode - SSP Mode
* * Master Device
* * Slave Device
* sspFormat - SSP Format:
* * Motorola SPI format
* * Texas Instruments serial format
* * National Microwire format
* dataSize - Data Size (4 - 16 bits)
* spiMode - Motorola SPI Mode (ignore this parameter for other format)
* * mode0 (PHASE 0, Rising Edge)
* * mode1 (PHASE 0, Falling Edge)
* * mode2 (PHASE 1, Rising Edge)
* * mode3 (PHASE 1, Falling Edge)
* bitRate - The desired SSP bit rate to be set
*
* Return:
* The actual bit rate that is set.
*/
int32_t sspInit(
ssp_mode_t masterMode,
ssp_format_t sspFormat,
ssp_data_size_t dataSize,
ssp_spi_mode_t spiMode,
uint32_t bitRate
)
{
uint32_t value = 0;
unsigned char scrValue, prescaleValue;
/***************************************
* 1. Check all the parameters validity
***************************************/
/* Check the ssp format to be set */
if (sspFormat > SSP_FORMAT_NATIONAL_MICROWIRE)
{
DDKDEBUGPRINT((ERROR_LEVEL, "Unsupported SSP Format.\n"));
return -1;
}
/* Check the data size to be set */
if (dataSize > SSP_DATA_SIZE_16_BIT)
{
DDKDEBUGPRINT((ERROR_LEVEL, "Unsupported SSP data size.\n"));
return -1;
}
/* Check the Motorola SPI mode */
if ((sspFormat == SSP_FORMAT_MOTOROLA_SPI) && (spiMode > SSP_SPI_MODE_3))
{
DDKDEBUGPRINT((ERROR_LEVEL, "Unsupported SPI mode.\n"));
return -1;
}
/***************************************
* 2. Enable the SSP Clock and Power
***************************************/
enableSSP(1);
/***************************************
* 3. Set SSP Control 0 Register
***************************************/
/* Calculate the bit Rate */
sspCalculateBitRate(bitRate, &scrValue, &prescaleValue);
/* Set the serial clock rate (SCR) */
value = FIELD_VALUE(0, SSP_0_CONTROL_0, CLOCK_RATE, scrValue);
/* Set the Frame format and/or SCLKOUT phase and polarity */
switch(sspFormat)
{
case SSP_FORMAT_MOTOROLA_SPI:
/* Motorola SPI Frame Format */
value = FIELD_SET(value, SSP_0_CONTROL_0, FRAME_FORMAT, MOTOROLA);
/* Set the Serial clock out phase and polarity. This setting only
applies to Motorola SPI frame format */
switch(spiMode)
{
case SSP_SPI_MODE_0:
/* Mode 0: Phase = 0, Polarity = Rising edge */
value = FIELD_SET(value, SSP_0_CONTROL_0, SCLKOUT_PHASE, 0);
value = FIELD_SET(value, SSP_0_CONTROL_0, SCLKOUT_POLARITY, RISING);
break;
case SSP_SPI_MODE_1:
/* Mode 1: Phase = 0, Polarity = Falling edge */
value = FIELD_SET(value, SSP_0_CONTROL_0, SCLKOUT_PHASE, 0);
value = FIELD_SET(value, SSP_0_CONTROL_0, SCLKOUT_POLARITY, FALLING);
break;
case SSP_SPI_MODE_2:
/* Mode 2: Phase = 1, Polarity = Rising edge */
value = FIELD_SET(value, SSP_0_CONTROL_0, SCLKOUT_PHASE, 1);
value = FIELD_SET(value, SSP_0_CONTROL_0, SCLKOUT_POLARITY, RISING);
break;
case SSP_SPI_MODE_3:
/* Mode 3: Phase = 1, Polarity = Falling edge */
value = FIELD_SET(value, SSP_0_CONTROL_0, SCLKOUT_PHASE, 1);
value = FIELD_SET(value, SSP_0_CONTROL_0, SCLKOUT_POLARITY, FALLING);
break;
}
break;
case SSP_FORMAT_TEXAS_INSTRUMENT:
/* Texas Instruments serial frame format */
value = FIELD_SET(value, SSP_0_CONTROL_0, FRAME_FORMAT, TI);
break;
case SSP_FORMAT_NATIONAL_MICROWIRE:
/* National Microwire frame format */
value = FIELD_SET(value, SSP_0_CONTROL_0, FRAME_FORMAT, NATIONAL);
break;
}
/* Set the data size. */
value = FIELD_VALUE(value, SSP_0_CONTROL_0, DATA_SIZE, dataSize);
pokeRegisterDWord(SSP_0_CONTROL_0, value);
/***************************************
* 4. Set SSP Control 1 Register
***************************************/
/* Set the SSP mode (master or slave) */
if (masterMode == SSP_MODE_MASTER)
value = FIELD_SET(0, SSP_0_CONTROL_1, MODE_SELECT, MASTER);
else
value = FIELD_SET(0, SSP_0_CONTROL_1, MODE_SELECT, SLAVE);
pokeRegisterByte(SSP_0_CONTROL_1, value);
/***************************************
* 5. Set SSP Clock Prescale Register
***************************************/
/* Set the clock prescale */
value = FIELD_VALUE(0, SSP_0_CLOCK_PRESCALE, DIVISOR, prescaleValue);
pokeRegisterDWord(getSSPRegisterOffset(SSP_0_CLOCK_PRESCALE), value);
/***********************************************
* 6. Set the corresponding GPIO pin as SSP pin
***********************************************/
/* Enable the SSP pins */
value = peekRegisterDWord(GPIO_MUX);
if (gCurrentSSPIndex == 0)
{
/* Select SSP 0 Pins */
pokeRegisterDWord(GPIO_MUX,
FIELD_SET(value, GPIO_MUX, 24, SSP0) |
FIELD_SET(value, GPIO_MUX, 23, SSP0) |
FIELD_SET(value, GPIO_MUX, 22, SSP0) |
FIELD_SET(value, GPIO_MUX, 21, SSP0) |
FIELD_SET(value, GPIO_MUX, 20, SSP0));
}
else
{
/* Select SSP 1 Pins */
pokeRegisterDWord(GPIO_MUX,
FIELD_SET(value, GPIO_MUX, 29, SSP1) |
FIELD_SET(value, GPIO_MUX, 28, SSP1) |
FIELD_SET(value, GPIO_MUX, 27, SSP1) |
FIELD_SET(value, GPIO_MUX, 26, SSP1) |
FIELD_SET(value, GPIO_MUX, 25, SSP1) );
}
/* Success */
return 0;
}
/* only timing related registers will be programed */
static int programModeRegisters(mode_parameter_t *pModeParam, pll_value_t *pll)
{
int ret = 0;
int cnt = 0;
unsigned int ulTmpValue, ulReg;
if (pll->clockType == SECONDARY_PLL) {
/* programe secondary pixel clock */
POKE32(CRT_PLL_CTRL, formatPllReg(pll));
POKE32(CRT_HORIZONTAL_TOTAL,
FIELD_VALUE(0, CRT_HORIZONTAL_TOTAL, TOTAL, pModeParam->horizontal_total - 1)
| FIELD_VALUE(0, CRT_HORIZONTAL_TOTAL, DISPLAY_END, pModeParam->horizontal_display_end - 1));
POKE32(CRT_HORIZONTAL_SYNC,
FIELD_VALUE(0, CRT_HORIZONTAL_SYNC, WIDTH, pModeParam->horizontal_sync_width)
| FIELD_VALUE(0, CRT_HORIZONTAL_SYNC, START, pModeParam->horizontal_sync_start - 1));
POKE32(CRT_VERTICAL_TOTAL,
FIELD_VALUE(0, CRT_VERTICAL_TOTAL, TOTAL, pModeParam->vertical_total - 1)
| FIELD_VALUE(0, CRT_VERTICAL_TOTAL, DISPLAY_END, pModeParam->vertical_display_end - 1));
POKE32(CRT_VERTICAL_SYNC,
FIELD_VALUE(0, CRT_VERTICAL_SYNC, HEIGHT, pModeParam->vertical_sync_height)
| FIELD_VALUE(0, CRT_VERTICAL_SYNC, START, pModeParam->vertical_sync_start - 1));
ulTmpValue = FIELD_VALUE(0, CRT_DISPLAY_CTRL, VSYNC_PHASE, pModeParam->vertical_sync_polarity)|
FIELD_VALUE(0, CRT_DISPLAY_CTRL, HSYNC_PHASE, pModeParam->horizontal_sync_polarity)|
FIELD_SET(0, CRT_DISPLAY_CTRL, TIMING, ENABLE)|
FIELD_SET(0, CRT_DISPLAY_CTRL, PLANE, ENABLE);
if (getChipType() == SM750LE) {
displayControlAdjust_SM750LE(pModeParam, ulTmpValue);
} else {
ulReg = PEEK32(CRT_DISPLAY_CTRL)
& FIELD_CLEAR(CRT_DISPLAY_CTRL, VSYNC_PHASE)
& FIELD_CLEAR(CRT_DISPLAY_CTRL, HSYNC_PHASE)
& FIELD_CLEAR(CRT_DISPLAY_CTRL, TIMING)
& FIELD_CLEAR(CRT_DISPLAY_CTRL, PLANE);
POKE32(CRT_DISPLAY_CTRL, ulTmpValue|ulReg);
}
} else if (pll->clockType == PRIMARY_PLL) {
unsigned int ulReservedBits;
POKE32(PANEL_PLL_CTRL, formatPllReg(pll));
POKE32(PANEL_HORIZONTAL_TOTAL,
FIELD_VALUE(0, PANEL_HORIZONTAL_TOTAL, TOTAL, pModeParam->horizontal_total - 1)
| FIELD_VALUE(0, PANEL_HORIZONTAL_TOTAL, DISPLAY_END, pModeParam->horizontal_display_end - 1));
POKE32(PANEL_HORIZONTAL_SYNC,
FIELD_VALUE(0, PANEL_HORIZONTAL_SYNC, WIDTH, pModeParam->horizontal_sync_width)
| FIELD_VALUE(0, PANEL_HORIZONTAL_SYNC, START, pModeParam->horizontal_sync_start - 1));
POKE32(PANEL_VERTICAL_TOTAL,
FIELD_VALUE(0, PANEL_VERTICAL_TOTAL, TOTAL, pModeParam->vertical_total - 1)
| FIELD_VALUE(0, PANEL_VERTICAL_TOTAL, DISPLAY_END, pModeParam->vertical_display_end - 1));
POKE32(PANEL_VERTICAL_SYNC,
FIELD_VALUE(0, PANEL_VERTICAL_SYNC, HEIGHT, pModeParam->vertical_sync_height)
| FIELD_VALUE(0, PANEL_VERTICAL_SYNC, START, pModeParam->vertical_sync_start - 1));
ulTmpValue = FIELD_VALUE(0, PANEL_DISPLAY_CTRL, VSYNC_PHASE, pModeParam->vertical_sync_polarity)|
FIELD_VALUE(0, PANEL_DISPLAY_CTRL, HSYNC_PHASE, pModeParam->horizontal_sync_polarity)|
FIELD_VALUE(0, PANEL_DISPLAY_CTRL, CLOCK_PHASE, pModeParam->clock_phase_polarity)|
FIELD_SET(0, PANEL_DISPLAY_CTRL, TIMING, ENABLE)|
FIELD_SET(0, PANEL_DISPLAY_CTRL, PLANE, ENABLE);
ulReservedBits = FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_1_MASK, ENABLE) |
FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_2_MASK, ENABLE) |
FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_3_MASK, ENABLE)|
FIELD_SET(0, PANEL_DISPLAY_CTRL, VSYNC, ACTIVE_LOW);
ulReg = (PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits)
& FIELD_CLEAR(PANEL_DISPLAY_CTRL, CLOCK_PHASE)
& FIELD_CLEAR(PANEL_DISPLAY_CTRL, VSYNC_PHASE)
& FIELD_CLEAR(PANEL_DISPLAY_CTRL, HSYNC_PHASE)
& FIELD_CLEAR(PANEL_DISPLAY_CTRL, TIMING)
& FIELD_CLEAR(PANEL_DISPLAY_CTRL, PLANE);
/* May a hardware bug or just my test chip (not confirmed).
* PANEL_DISPLAY_CTRL register seems requiring few writes
* before a value can be successfully written in.
* Added some masks to mask out the reserved bits.
* Note: This problem happens by design. The hardware will wait for the
* next vertical sync to turn on/off the plane.
*/
POKE32(PANEL_DISPLAY_CTRL, ulTmpValue|ulReg);
while ((PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) != (ulTmpValue|ulReg)) {
cnt++;
if (cnt > 1000)
break;
POKE32(PANEL_DISPLAY_CTRL, ulTmpValue|ulReg);
}
} else {
ret = -1;
}
return ret;
}
long deSystemMem2VideoMemMonoBlt(const char *pSrcbuf,
long srcDelta,
unsigned long startBit,
unsigned long dBase,
unsigned long dPitch,
unsigned long bpp,
unsigned long dx, unsigned long dy,
unsigned long width, unsigned long height,
unsigned long fColor,
unsigned long bColor,
unsigned long rop2) {
unsigned long bytePerPixel;
unsigned long ulBytesPerScan;
unsigned long ul4BytesPerScan;
unsigned long ulBytesRemain;
unsigned long de_ctrl = 0;
unsigned char ajRemain[4];
long i, j;
bytePerPixel = bpp / 8;
/* Just make sure the start bit is within legal range */
startBit &= 7;
ulBytesPerScan = (width + startBit + 7) / 8;
ul4BytesPerScan = ulBytesPerScan & ~3;
ulBytesRemain = ulBytesPerScan & 3;
if (smtc_de_busy)
deWaitForNotBusy();
/*
* 2D Source Base. Use 0 for HOST Blt.
*/
SMTC_write2Dreg(DE_WINDOW_SOURCE_BASE, 0);
/*
* 2D Destination Base.
*
* It is an address offset (128 bit aligned) from the beginning of
* frame buffer.
*/
SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE, dBase);
if (dPitch) {
/*
* Program pitch (distance between the 1st points of two
* adjacent lines).
*
* Note that input pitch is BYTE value, but the 2D Pitch
* register uses pixel values. Need Byte to pixel convertion.
*/
SMTC_write2Dreg(DE_PITCH,
FIELD_VALUE(0, DE_PITCH, DESTINATION,
dPitch /
bytePerPixel) | FIELD_VALUE(0,
DE_PITCH,
SOURCE,
dPitch /
bytePerPixel));
/* Screen Window width in Pixels.
*
* 2D engine uses this value to calculate the linear address in
* frame buffer for a given point.
*/
SMTC_write2Dreg(DE_WINDOW_WIDTH,
FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
(dPitch /
bytePerPixel)) | FIELD_VALUE(0,
DE_WINDOW_WIDTH,
SOURCE,
(dPitch
/
bytePerPixel)));
}
/* Note: For 2D Source in Host Write, only X_K1 field is needed, and
* Y_K2 field is not used. For mono bitmap, use startBit for X_K1.
*/
SMTC_write2Dreg(DE_SOURCE,
FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) |
FIELD_VALUE(0, DE_SOURCE, X_K1, startBit) |
FIELD_VALUE(0, DE_SOURCE, Y_K2, 0));
SMTC_write2Dreg(DE_DESTINATION,
FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
FIELD_VALUE(0, DE_DESTINATION, X, dx) |
FIELD_VALUE(0, DE_DESTINATION, Y, dy));
SMTC_write2Dreg(DE_DIMENSION,
FIELD_VALUE(0, DE_DIMENSION, X, width) |
FIELD_VALUE(0, DE_DIMENSION, Y_ET, height));
SMTC_write2Dreg(DE_FOREGROUND, fColor);
SMTC_write2Dreg(DE_BACKGROUND, bColor);
if (bpp)
deSetPixelFormat(bpp);
/* Set the pixel format of the destination */
de_ctrl = FIELD_VALUE(0, DE_CONTROL, ROP, rop2) |
FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
FIELD_SET(0, DE_CONTROL, COMMAND, HOST_WRITE) |
FIELD_SET(0, DE_CONTROL, HOST, MONO) |
FIELD_SET(0, DE_CONTROL, STATUS, START);
SMTC_write2Dreg(DE_CONTROL, de_ctrl | deGetTransparency());
/* Write MONO data (line by line) to 2D Engine data port */
for (i = 0; i < height; i++) {
/* For each line, send the data in chunks of 4 bytes */
for (j = 0; j < (ul4BytesPerScan / 4); j++)
SMTC_write2Ddataport(0,
*(unsigned long *)(pSrcbuf +
(j * 4)));
if (ulBytesRemain) {
memcpy(ajRemain, pSrcbuf + ul4BytesPerScan,
ulBytesRemain);
SMTC_write2Ddataport(0, *(unsigned long *)ajRemain);
}
pSrcbuf += srcDelta;
}
smtc_de_busy = 1;
return 0;
}
