unsigned long get_config()
{
REGISTER mc_csc;
REGISTER mc_tms;
unsigned char ch;
mc_cs = 0;
for (ch=0; ch<8; ch++) {
mc_csc = (unsigned long*)(MC_BASE + MC_CSC(ch));
mc_tms = (unsigned long*)(MC_BASE + MC_TMS(ch));
(void) mc_tms;
if ( (GET_FIELD(*mc_csc, MC_CSC, MEMTYPE) == 0) &&
(TEST_FLAG(*mc_csc, MC_CSC, EN) == 1 ) ) {
mc_sdram_cs[ch].MS = GET_FIELD(*mc_csc, MC_CSC, MS);
mc_sdram_cs[ch].BW = GET_FIELD(*mc_csc, MC_CSC, BW);
mc_sdram_cs[ch].M = GET_FIELD(*mc_csc, MC_CSC, SEL);
mc_cs |= (1 << ch);
printf("get_config(%d) : MS=0x%0lx, BW=0x%0lx, M=0x%0lx\n", ch,
mc_sdram_cs[ch].MS,
mc_sdram_cs[ch].BW,
mc_sdram_cs[ch].M);
}
}
printf("get_config() : cs=0x%0x\n", mc_cs);
return 0;
}
static void *__grandparent(void *node, unsigned int m)
{
if ((node != NULL) && (GET_FIELD(node, m, redblack_tree_t)->parent != NULL))
return (GET_FIELD(GET_FIELD(node, m, redblack_tree_t)->parent, m, redblack_tree_t)->parent);
else
return (NULL);
}
/*
* If credit checking is enabled for this window, poll for the return
* of window credits (i.e for NX engines to process any outstanding CRBs).
* Since NX-842 waits for the CRBs to be processed before closing the
* window, we should not have to wait for too long.
*
* TODO: We retry in 10ms intervals now. We could/should probably peek at
* the VAS_LRFIFO_PUSH_OFFSET register to get an estimate of pending
* CRBs on the FIFO and compute the delay dynamically on each retry.
* But that is not really needed until we support NX-GZIP access from
* user space. (NX-842 driver waits for CSB and Fast thread-wakeup
* doesn't use credit checking).
*/
static void poll_window_credits(struct vas_window *window)
{
u64 val;
int creds, mode;
val = read_hvwc_reg(window, VREG(WINCTL));
if (window->tx_win)
mode = GET_FIELD(VAS_WINCTL_TX_WCRED_MODE, val);
else
mode = GET_FIELD(VAS_WINCTL_RX_WCRED_MODE, val);
if (!mode)
return;
retry:
if (window->tx_win) {
val = read_hvwc_reg(window, VREG(TX_WCRED));
creds = GET_FIELD(VAS_TX_WCRED, val);
} else {
val = read_hvwc_reg(window, VREG(LRX_WCRED));
creds = GET_FIELD(VAS_LRX_WCRED, val);
}
if (creds < window->wcreds_max) {
val = 0;
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(msecs_to_jiffies(10));
goto retry;
}
}
unsigned int
__canonicalize_funcptr_for_compare (fptr_t fptr)
{
static unsigned int fixup_plabel[2] __attribute__((used));
fixup_t fixup;
unsigned int *got, *iptr, *plabel;
int i;
/* -1 and page 0 are special. -1 is used in crtend to mark the end of
a list of function pointers. Also return immediately if the plabel
bit is not set in the function pointer. In this case, the function
pointer points directly to the function. */
if ((int) fptr == -1 || (unsigned int) fptr < 4096 || !((int) fptr & 2))
return (unsigned int) fptr;
/* The function pointer points to a function descriptor (plabel). If
the plabel hasn't been resolved, the first word of the plabel points
to the entry of the PLT stub just before the global offset table.
The second word in the plabel contains the relocation offset for the
function. */
plabel = (unsigned int *) ((unsigned int) fptr & ~3);
got = (unsigned int *) (plabel[0] + GOT_FROM_PLT_STUB);
/* Return the address of the function if the plabel has been resolved. */
if (got != &_GLOBAL_OFFSET_TABLE_)
return plabel[0];
/* Find the first "bl" branch in the offset search list. This is a
call to _dl_fixup or a magic branch to fixup at the beginning of the
trampoline template. The fixup function does the actual runtime
resolution of function descriptors. We only look for "bl" branches
with a 17-bit pc-relative displacement. */
for (i = 0; i < NOFFSETS; i++)
{
iptr = (unsigned int *) (got[-2] + fixup_branch_offset[i]);
if ((*iptr & 0xfc00e000) == 0xe8000000)
break;
}
/* This should not happen... */
if (i == NOFFSETS)
return ~0;
/* Extract the 17-bit displacement from the instruction. */
iptr += SIGN_EXTEND (GET_FIELD (*iptr, 19, 28) |
GET_FIELD (*iptr, 29, 29) << 10 |
GET_FIELD (*iptr, 11, 15) << 11 |
GET_FIELD (*iptr, 31, 31) << 16, 17);
/* Build a plabel for an indirect call to _dl_fixup. */
fixup_plabel[0] = (unsigned int) iptr + 8; /* address of fixup */
fixup_plabel[1] = got[-1]; /* ltp for fixup */
fixup = (fixup_t) ((int) fixup_plabel | 3);
/* Call fixup to resolve the function address. got[1] contains the
link_map pointer and plabel[1] the relocation offset. */
fixup ((struct link_map *) got[1], plabel[1]);
return plabel[0];
}
static int fme_dperf_fab_get_prop(struct feature *feature,
struct feature_prop *prop)
{
struct ifpga_fme_hw *fme = feature->parent;
u8 sub = GET_FIELD(PROP_SUB, prop->prop_id);
u16 id = GET_FIELD(PROP_ID, prop->prop_id);
switch (id) {
case 0x1: /* FREEZE */
return fme_dperf_get_fab_freeze(fme, &prop->data);
case 0x2: /* PCIE0_READ */
return fme_dperf_get_fab_port_pcie0_read(fme, sub, &prop->data);
case 0x3: /* PCIE0_WRITE */
return fme_dperf_get_fab_port_pcie0_write(fme, sub,
&prop->data);
case 0x4: /* MMIO_READ */
return fme_dperf_get_fab_port_mmio_read(fme, sub, &prop->data);
case 0x5: /* MMIO_WRITE */
return fme_dperf_get_fab_port_mmio_write(fme, sub, &prop->data);
case 0x6: /* ENABLE */
return fme_dperf_get_fab_port_enable(fme, sub, &prop->data);
}
return -ENOENT;
}
extern "C" int getnameinfo(const struct sockaddr *sa, socklen_t salen,
char *host, socklen_t hostlen,
char *serv, socklen_t servlen, unsigned int flags)
{
WRAPPER_HEADER(int, getnameinfo, _real_getnameinfo, sa, salen, host, hostlen,
serv, servlen, flags);
if (SYNC_IS_REPLAY) {
WRAPPER_REPLAY_START(getnameinfo);
if (retval == 0 && host != NULL) {
strncpy(host, GET_FIELD(my_entry, getnameinfo, ret_host), hostlen);
}
if (retval == 0 && host != NULL) {
strncpy(serv, GET_FIELD(my_entry, getnameinfo, ret_serv), servlen);
}
WRAPPER_REPLAY_END(getnameinfo);
} else if (SYNC_IS_RECORD) {
isOptionalEvent = true;
retval = _real_getnameinfo(sa, salen, host, hostlen, serv, servlen, flags);
isOptionalEvent = false;
if (retval == 0 && host != NULL) {
strncpy(GET_FIELD(my_entry, getnameinfo, ret_host), host, hostlen);
}
if (retval == 0 && host != NULL) {
strncpy(GET_FIELD(my_entry, getnameinfo, ret_serv), serv, servlen);
}
WRAPPER_LOG_WRITE_ENTRY(my_entry);
}
return retval;
}
extern "C" int getgrgid_r(gid_t gid, struct group *grp,
char *buf, size_t buflen, struct group **result)
{
WRAPPER_HEADER(int, getgrgid_r, _real_getgrgid_r, gid, grp, buf, buflen, result);
if (SYNC_IS_REPLAY) {
WRAPPER_REPLAY_START(getgrgid_r);
if (retval == 0 &&
GET_FIELD(my_entry, getgrgid_r, ret_result) != NULL) {
*grp = GET_FIELD(my_entry, getgrgid_r, ret_grp);
WRAPPER_REPLAY_READ_FROM_READ_LOG(getgrgid_r, buf, buflen);
}
*result = GET_FIELD(my_entry, getgrgid_r, ret_result);
WRAPPER_REPLAY_END(getgrgid_r);
} else if (SYNC_IS_RECORD) {
isOptionalEvent = true;
retval = _real_getgrgid_r(gid, grp, buf, buflen, result);
isOptionalEvent = false;
if (retval == 0 && result != NULL) {
SET_FIELD2(my_entry, getgrgid_r, ret_grp, *grp);
WRAPPER_LOG_WRITE_INTO_READ_LOG(getgrgid_r, buf, buflen);
}
SET_FIELD2(my_entry, getgrgid_r, ret_result, *result);
WRAPPER_LOG_WRITE_ENTRY(my_entry);
}
return retval;
}
extern "C" int getpwuid_r(uid_t uid, struct passwd *pwd,
char *buf, size_t buflen, struct passwd **result)
{
WRAPPER_HEADER(int, getpwuid_r, _real_getpwuid_r, uid, pwd, buf, buflen, result);
if (SYNC_IS_REPLAY) {
WRAPPER_REPLAY_START(getpwuid_r);
if (retval == 0 &&
GET_FIELD(my_entry, getpwuid_r, ret_result) != NULL) {
*pwd = GET_FIELD(my_entry, getpwuid_r, ret_pwd);
WRAPPER_REPLAY_READ_FROM_READ_LOG(getpwuid_r, buf, buflen);
}
*result = GET_FIELD(my_entry, getpwuid_r, ret_result);
WRAPPER_REPLAY_END(getpwuid_r);
} else if (SYNC_IS_RECORD) {
isOptionalEvent = true;
retval = _real_getpwuid_r(uid, pwd, buf, buflen, result);
isOptionalEvent = false;
if (retval == 0 && result != NULL) {
SET_FIELD2(my_entry, getpwuid_r, ret_pwd, *pwd);
WRAPPER_LOG_WRITE_INTO_READ_LOG(getpwuid_r, buf, buflen);
}
SET_FIELD2(my_entry, getpwuid_r, ret_result, *result);
WRAPPER_LOG_WRITE_ENTRY(my_entry);
}
return retval;
}
/*
* Calculate the cpu speed based on the PLL, if the PLL
* is not being used, this function will return 0
*/
unsigned long
a7hal_clock_getFreq (int noRAM)
{
unsigned int freq = 0;
#if defined(A7VE) || defined(A7VC) || defined(A7VT) || defined(A7VL)
unsigned long feedbackDivider;
unsigned long outputDivider;
unsigned long referenceDivider;
#else
unsigned int scale;
#endif
if (GET_BIT (SYS_CLOCK_CONTROL_REG, CLK_SEL_BIT))
{
if (GET_BIT (SYS_CLOCK_CONTROL_REG, PLL_SEL_BIT))
{
#if defined(A7VE) || defined(A7VC) || defined(A7VT) || defined(A7VL)
feedbackDivider = GET_FIELD (SYS_PLL_CONTROL_REG,
PLL_CLKF_FIELD, NBITS_PLL_CLKF) + 1;
outputDivider = GET_FIELD (SYS_PLL_CONTROL_REG,
PLL_CLKOD_FIELD, NBITS_PLL_CLKOD) + 1;
referenceDivider = GET_FIELD (SYS_PLL_CONTROL_REG,
PLL_CLKR_FIELD, NBITS_PLL_CLKR) + 1;
/*
* Is the input to the PLL the 32KHz xtal or the external osc.
*/
if ( GET_BIT( SYS_PLL_CONTROL_REG, PLL_REFSEL_BIT ) )
{
freq = ( CONFIG_OSC_FREQ * feedbackDivider ) /
( referenceDivider * outputDivider );
}
else
{
freq = ( 32768 * feedbackDivider ) /
( referenceDivider * outputDivider );
}
#else
freq = 32768 * GET_FIELD (SYS_CLOCK_CONTROL_REG,
PLL_DIV_FIELD, NBITS_PLL_DIV);
scale =
GET_FIELD (SYS_CLOCK_CONTROL_REG, PLL_SCALE_FIELD,
NBITS_PLL_SCALE);
while (scale)
{
freq >>= 1;
scale >>= 1;
}
#endif
}
else
{
freq = CONFIG_OSC_FREQ;
}
}
static void __insert_case1(void *node, unsigned int m)
{
if (node == NULL)
return;
if (GET_FIELD(node, m, redblack_tree_t)->parent == NULL)
GET_FIELD(node, m, redblack_tree_t)->colour = black;
else
__insert_case2(node, m);
}
static void __insert_case2(void *node, unsigned int m)
{
if (node == NULL)
return;
if (GET_FIELD(GET_FIELD(node, m, redblack_tree_t)->parent, m, redblack_tree_t)->colour == black)
return; /* Tree is still valid */
else
__insert_case3(node, m);
}
int qed_init_run(struct qed_hwfn *p_hwfn,
struct qed_ptt *p_ptt, int phase, int phase_id, int modes)
{
struct qed_dev *cdev = p_hwfn->cdev;
u32 cmd_num, num_init_ops;
union init_op *init_ops;
bool b_dmae = false;
int rc = 0;
num_init_ops = cdev->fw_data->init_ops_size;
init_ops = cdev->fw_data->init_ops;
p_hwfn->unzip_buf = kzalloc(MAX_ZIPPED_SIZE * 4, GFP_ATOMIC);
if (!p_hwfn->unzip_buf)
return -ENOMEM;
for (cmd_num = 0; cmd_num < num_init_ops; cmd_num++) {
union init_op *cmd = &init_ops[cmd_num];
u32 data = le32_to_cpu(cmd->raw.op_data);
switch (GET_FIELD(data, INIT_CALLBACK_OP_OP)) {
case INIT_OP_WRITE:
rc = qed_init_cmd_wr(p_hwfn, p_ptt, &cmd->write,
b_dmae);
break;
case INIT_OP_READ:
qed_init_cmd_rd(p_hwfn, p_ptt, &cmd->read);
break;
case INIT_OP_IF_MODE:
cmd_num += qed_init_cmd_mode(p_hwfn, &cmd->if_mode,
modes);
break;
case INIT_OP_IF_PHASE:
cmd_num += qed_init_cmd_phase(p_hwfn, &cmd->if_phase,
phase, phase_id);
b_dmae = GET_FIELD(data, INIT_IF_PHASE_OP_DMAE_ENABLE);
break;
case INIT_OP_DELAY:
/* qed_init_run is always invoked from
* sleep-able context
*/
udelay(le32_to_cpu(cmd->delay.delay));
break;
case INIT_OP_CALLBACK:
rc = qed_init_cmd_cb(p_hwfn, p_ptt, &cmd->callback);
break;
}
if (rc)
break;
}
kfree(p_hwfn->unzip_buf);
p_hwfn->unzip_buf = NULL;
return rc;
}
/* Utility routines */
static inline int get_baud(struct m68k_serial *ss)
{
unsigned long result = 115200;
unsigned short int baud = uart_addr[ss->line].ubaud;
if (GET_FIELD(baud, UBAUD_PRESCALER) == 0x38) result = 38400;
result >>= GET_FIELD(baud, UBAUD_DIVIDE);
return result;
}
static void __recolor_tree(void **tree, void *node, unsigned int m)
{
if (tree == NULL || *tree == NULL || node == NULL)
return;
GET_FIELD(node, m, redblack_tree_t)->colour = red;
__insert_case1(node, m);
while (node != NULL && GET_FIELD(node, m, redblack_tree_t)->parent != NULL)
node = GET_FIELD(node, m, redblack_tree_t)->parent;
*tree = node;
}
void *avl_single_rotate_with_right(void *node,
unsigned int m)
{
void *tmp;
tmp = GET_FIELD(node, m, bst_tree_t)->left;
GET_FIELD(node, m, bst_tree_t)->left = GET_FIELD(tmp, m, bst_tree_t)->right;
GET_FIELD(tmp, m, bst_tree_t)->right = node;
return (tmp);
}
static void *__uncle(void *node, unsigned int m)
{
void *grandpa = __grandparent(node, m);
if (grandpa == NULL)
return (NULL);
if (GET_FIELD(node, m, redblack_tree_t)->parent == GET_FIELD(grandpa, m, redblack_tree_t)->left)
return GET_FIELD(grandpa, m, redblack_tree_t)->right;
else
return GET_FIELD(grandpa, m, redblack_tree_t)->left;
}
bool _ebst_tree_init(void *tree,
unsigned int m)
{
if (tree)
{
GET_FIELD(tree, m, ebst_tree_t)->left = NULL;
GET_FIELD(tree, m, ebst_tree_t)->right = NULL;
GET_FIELD(tree, m, ebst_tree_t)->parent = NULL;
return (true);
}
return (false);
}
/* init_ops read/poll commands */
static void ecore_init_cmd_rd(struct ecore_hwfn *p_hwfn,
struct ecore_ptt *p_ptt,
struct init_read_op *cmd)
{
bool (*comp_check)(u32 val, u32 expected_val);
u32 delay = ECORE_INIT_POLL_PERIOD_US, val;
u32 data, addr, poll;
int i;
data = OSAL_LE32_TO_CPU(cmd->op_data);
addr = GET_FIELD(data, INIT_READ_OP_ADDRESS) << 2;
poll = GET_FIELD(data, INIT_READ_OP_POLL_TYPE);
#ifndef ASIC_ONLY
if (CHIP_REV_IS_EMUL(p_hwfn->p_dev))
delay *= 100;
#endif
val = ecore_rd(p_hwfn, p_ptt, addr);
if (poll == INIT_POLL_NONE)
return;
switch (poll) {
case INIT_POLL_EQ:
comp_check = comp_eq;
break;
case INIT_POLL_OR:
comp_check = comp_or;
break;
case INIT_POLL_AND:
comp_check = comp_and;
break;
default:
DP_ERR(p_hwfn, "Invalid poll comparison type %08x\n",
cmd->op_data);
return;
}
data = OSAL_LE32_TO_CPU(cmd->expected_val);
for (i = 0;
i < ECORE_INIT_MAX_POLL_COUNT && !comp_check(val, data);
i++) {
OSAL_UDELAY(delay);
val = ecore_rd(p_hwfn, p_ptt, addr);
}
if (i == ECORE_INIT_MAX_POLL_COUNT)
DP_ERR(p_hwfn, "Timeout when polling reg: 0x%08x [ Waiting-for: %08x Got: %08x (comparison %08x)]\n",
addr,
OSAL_LE32_TO_CPU(cmd->expected_val), val,
OSAL_LE32_TO_CPU(cmd->op_data));
}
static u32 ecore_init_cmd_phase(struct init_if_phase_op *p_cmd,
u32 phase, u32 phase_id)
{
u32 data = OSAL_LE32_TO_CPU(p_cmd->phase_data);
u32 op_data = OSAL_LE32_TO_CPU(p_cmd->op_data);
if (!(GET_FIELD(data, INIT_IF_PHASE_OP_PHASE) == phase &&
(GET_FIELD(data, INIT_IF_PHASE_OP_PHASE_ID) == ANY_PHASE_ID ||
GET_FIELD(data, INIT_IF_PHASE_OP_PHASE_ID) == phase_id)))
return GET_FIELD(op_data, INIT_IF_PHASE_OP_CMD_OFFSET);
else
return 0;
}
static u32 qed_init_cmd_phase(struct qed_hwfn *p_hwfn,
struct init_if_phase_op *p_cmd,
u32 phase, u32 phase_id)
{
u32 data = le32_to_cpu(p_cmd->phase_data);
u32 op_data = le32_to_cpu(p_cmd->op_data);
if (!(GET_FIELD(data, INIT_IF_PHASE_OP_PHASE) == phase &&
(GET_FIELD(data, INIT_IF_PHASE_OP_PHASE_ID) == ANY_PHASE_ID ||
GET_FIELD(data, INIT_IF_PHASE_OP_PHASE_ID) == phase_id)))
return GET_FIELD(op_data, INIT_IF_PHASE_OP_CMD_OFFSET);
else
return 0;
}
/* init_ops read/poll commands */
static void qed_init_cmd_rd(struct qed_hwfn *p_hwfn,
struct qed_ptt *p_ptt,
struct init_read_op *cmd)
{
bool (*comp_check)(u32 val, u32 expected_val);
u32 delay = QED_INIT_POLL_PERIOD_US, val;
u32 data, addr, poll;
int i;
data = le32_to_cpu(cmd->op_data);
addr = GET_FIELD(data, INIT_READ_OP_ADDRESS) << 2;
poll = GET_FIELD(data, INIT_READ_OP_POLL_TYPE);
val = qed_rd(p_hwfn, p_ptt, addr);
if (poll == INIT_POLL_NONE)
return;
switch (poll) {
case INIT_POLL_EQ:
comp_check = comp_eq;
break;
case INIT_POLL_OR:
comp_check = comp_or;
break;
case INIT_POLL_AND:
comp_check = comp_and;
break;
default:
DP_ERR(p_hwfn, "Invalid poll comparison type %08x\n",
cmd->op_data);
return;
}
data = le32_to_cpu(cmd->expected_val);
for (i = 0;
i < QED_INIT_MAX_POLL_COUNT && !comp_check(val, data);
i++) {
udelay(delay);
val = qed_rd(p_hwfn, p_ptt, addr);
}
if (i == QED_INIT_MAX_POLL_COUNT) {
DP_ERR(p_hwfn,
"Timeout when polling reg: 0x%08x [ Waiting-for: %08x Got: %08x (comparsion %08x)]\n",
addr, le32_to_cpu(cmd->expected_val),
val, le32_to_cpu(cmd->op_data));
}
}
static void fill_rdf_info(const char *data, struct rdf_info *info)
{
struct tm date;
puts("********************");
GET_FIELD(info->sig, data, 4);
puts(info->sig);
GET_FIELD(info->date, &data[6], 18);
puts(info->date);
if(info->sig[3] == '1'){
GET_FIELD(info->station, &data[24], 11);
GET_FIELD(info->source, &data[35], 11);
GET_FIELD(info->exper, &data[46], 11);
}else if(info->sig[3] == '2'){
GET_FIELD(info->station, &data[0x18], 17);
GET_FIELD(info->source, &data[0x29], 17);
GET_FIELD(info->exper, &data[0x3A], 17);
}else{
return;
}
puts(info->station);
puts(info->source);
puts(info->exper);
puts("********************");
memset(&date, 0, sizeof(struct tm));
strptime(info->date, "%Y %j-%T", &date);
info->time0 = mktime(&date);
}
/* init_ops write command */
static enum _ecore_status_t ecore_init_cmd_wr(struct ecore_hwfn *p_hwfn,
struct ecore_ptt *p_ptt,
struct init_write_op *p_cmd,
bool b_can_dmae)
{
enum _ecore_status_t rc = ECORE_SUCCESS;
bool b_must_dmae;
u32 addr, data;
data = OSAL_LE32_TO_CPU(p_cmd->data);
b_must_dmae = GET_FIELD(data, INIT_WRITE_OP_WIDE_BUS);
addr = GET_FIELD(data, INIT_WRITE_OP_ADDRESS) << 2;
/* Sanitize */
if (b_must_dmae && !b_can_dmae) {
DP_NOTICE(p_hwfn, true,
"Need to write to %08x for Wide-bus but DMAE isn't"
" allowed\n",
addr);
return ECORE_INVAL;
}
switch (GET_FIELD(data, INIT_WRITE_OP_SOURCE)) {
case INIT_SRC_INLINE:
data = OSAL_LE32_TO_CPU(p_cmd->args.inline_val);
ecore_wr(p_hwfn, p_ptt, addr, data);
break;
case INIT_SRC_ZEROS:
data = OSAL_LE32_TO_CPU(p_cmd->args.zeros_count);
if (b_must_dmae || (b_can_dmae && (data >= 64)))
rc = ecore_init_fill_dmae(p_hwfn, p_ptt, addr, 0, data);
else
ecore_init_fill(p_hwfn, p_ptt, addr, 0, data);
break;
case INIT_SRC_ARRAY:
rc = ecore_init_cmd_array(p_hwfn, p_ptt, p_cmd,
b_must_dmae, b_can_dmae);
break;
case INIT_SRC_RUNTIME:
ecore_init_rt(p_hwfn, p_ptt, addr,
OSAL_LE16_TO_CPU(p_cmd->args.runtime.offset),
OSAL_LE16_TO_CPU(p_cmd->args.runtime.size),
b_must_dmae);
break;
}
return rc;
}
bool _hashtable_remove(void **hash,
void *key,
void *entry,
unsigned int m,
hashing_function_p hash_func)
{
uint64_t hki;
void *prev_it;
void *it;
if (!hash || !key || !entry || !hash_func)
return (false);
hki = hash_func(key);
prev_it = NULL;
it = hash[hki];
while (it)
{
if (it == entry)
{
_slist_fast_remove(hash + hki, prev_it, entry, m);
return (true);
}
prev_it = it;
it = GET_FIELD(it, m, hashtable_t)->next;
}
return (false);
}
/* init_ops write command */
static int qed_init_cmd_wr(struct qed_hwfn *p_hwfn,
struct qed_ptt *p_ptt,
struct init_write_op *cmd,
bool b_can_dmae)
{
u32 data = le32_to_cpu(cmd->data);
u32 addr = GET_FIELD(data, INIT_WRITE_OP_ADDRESS) << 2;
bool b_must_dmae = GET_FIELD(data, INIT_WRITE_OP_WIDE_BUS);
union init_write_args *arg = &cmd->args;
int rc = 0;
/* Sanitize */
if (b_must_dmae && !b_can_dmae) {
DP_NOTICE(p_hwfn,
"Need to write to %08x for Wide-bus but DMAE isn't allowed\n",
addr);
return -EINVAL;
}
switch (GET_FIELD(data, INIT_WRITE_OP_SOURCE)) {
case INIT_SRC_INLINE:
qed_wr(p_hwfn, p_ptt, addr,
le32_to_cpu(arg->inline_val));
break;
case INIT_SRC_ZEROS:
if (b_must_dmae ||
(b_can_dmae && (le32_to_cpu(arg->zeros_count) >= 64)))
rc = qed_init_fill_dmae(p_hwfn, p_ptt, addr, 0,
le32_to_cpu(arg->zeros_count));
else
qed_init_fill(p_hwfn, p_ptt, addr, 0,
le32_to_cpu(arg->zeros_count));
break;
case INIT_SRC_ARRAY:
rc = qed_init_cmd_array(p_hwfn, p_ptt, cmd,
b_must_dmae, b_can_dmae);
break;
case INIT_SRC_RUNTIME:
qed_init_rt(p_hwfn, p_ptt, addr,
le16_to_cpu(arg->runtime.offset),
le16_to_cpu(arg->runtime.size),
b_must_dmae);
break;
}
return rc;
}
static void receive_chars(struct m68k_serial *info, unsigned short rx)
{
struct tty_struct *tty = info->tty;
m68328_uart *uart = &uart_addr[info->line];
unsigned char ch, flag;
/*
* This do { } while() loop will get ALL chars out of Rx FIFO
*/
#ifndef CONFIG_XCOPILOT_BUGS
do {
#endif
ch = GET_FIELD(rx, URX_RXDATA);
if(info->is_cons) {
if(URX_BREAK & rx) { /* whee, break received */
status_handle(info, rx);
return;
#ifdef CONFIG_MAGIC_SYSRQ
} else if (ch == 0x10) { /* ^P */
show_state();
show_free_areas(0);
show_buffers();
/* show_net_buffers(); */
return;
} else if (ch == 0x12) { /* ^R */
emergency_restart();
return;
#endif /* CONFIG_MAGIC_SYSRQ */
}
}
if(!tty)
goto clear_and_exit;
flag = TTY_NORMAL;
if(rx & URX_PARITY_ERROR) {
flag = TTY_PARITY;
status_handle(info, rx);
} else if(rx & URX_OVRUN) {
flag = TTY_OVERRUN;
status_handle(info, rx);
} else if(rx & URX_FRAME_ERROR) {
flag = TTY_FRAME;
status_handle(info, rx);
}
tty_insert_flip_char(tty, ch, flag);
#ifndef CONFIG_XCOPILOT_BUGS
} while((rx = uart->urx.w) & URX_DATA_READY);
#endif
tty_schedule_flip(tty);
clear_and_exit:
return;
}
static int fme_dperf_fab_set_prop(struct feature *feature,
struct feature_prop *prop)
{
struct ifpga_fme_hw *fme = feature->parent;
u8 sub = GET_FIELD(PROP_SUB, prop->prop_id);
u16 id = GET_FIELD(PROP_ID, prop->prop_id);
switch (id) {
case 0x1: /* FREEZE - fab root only prop */
if (sub != PERF_PROP_SUB_UNUSED)
return -ENOENT;
return fme_dperf_set_fab_freeze(fme, prop->data);
case 0x6: /* ENABLE - fab both root and sub */
return fme_dperf_set_fab_port_enable(fme, sub, prop->data);
}
return -ENOENT;
}
void Searches::simple () {
std::string fromLang = "und";
std::string toLang = "und";
std::string query = "";
unsigned int page = 0;//atoi(sizeStr.c_str());
if (request().request_method() == "GET") {
cppcms::http::request::form_type getData = request().get();
cppcms::http::request::form_type::const_iterator it;
GET_FIELD(fromLang, "from");
GET_FIELD(toLang, "to");
GET_FIELD(query, "query");
GET_INT_FIELD(page, "page");
}
contents::SearchesShowResult c;
contents::helpers::Sentences shc;
init_content(c);
c.queryStr = query;
c.queryLang = fromLang;
c.paginationSize = 10; //TODO MAGIC NUMBER
shc.currentUserHelper = c.usersHelper;
std::cout << "[DEBUG]" << query <<
" in " << fromLang <<
" to " << toLang << std::endl;
shc.sentences = searchesModel->advance(
query,
fromLang,
toLang,
page
);
c.shc = shc;
render ("searches_simple_api", c);
}
static int fme_dperf_root_get_prop(struct feature *feature,
struct feature_prop *prop)
{
struct ifpga_fme_hw *fme = feature->parent;
u8 sub = GET_FIELD(PROP_SUB, prop->prop_id);
u16 id = GET_FIELD(PROP_ID, prop->prop_id);
if (sub != PERF_PROP_SUB_UNUSED)
return -ENOENT;
switch (id) {
case 0x1: /* CLOCK */
return fme_dperf_get_clock(fme, &prop->data);
case 0x2: /* REVISION */
return fme_dperf_get_revision(fme, &prop->data);
}
return -ENOENT;
}
static u32 qed_init_cmd_mode(struct qed_hwfn *p_hwfn,
struct init_if_mode_op *p_cmd, int modes)
{
u16 offset = le16_to_cpu(p_cmd->modes_buf_offset);
if (qed_init_cmd_mode_match(p_hwfn, &offset, modes))
return 0;
else
return GET_FIELD(le32_to_cpu(p_cmd->op_data),
INIT_IF_MODE_OP_CMD_OFFSET);
}