/* GPIO Settings for Back voltage problem workaround */ MV_U8 mvUsbGppInit(int dev) { MV_U32 regVal; MV_U8 gppNo = (MV_U8)mvBoardUSBVbusGpioPinGet(dev); MV_U8 gppVbusEnNo = (MV_U8)mvBoardUSBVbusEnGpioPinGet(dev); /* DDR1 => gpp5, DDR2 => gpp1 */ if(gppNo != (MV_U8)N_A) { /*mvOsPrintf("mvUsbGppInit: gppNo=%d\n", gppNo);*/ /* MPP Control Register - set to GPP*/ regVal = MV_REG_READ(mvCtrlMppRegGet((unsigned int)(gppNo/8))); regVal &= ~(0xf << ((gppNo%8)*4)); MV_REG_WRITE(mvCtrlMppRegGet((unsigned int)(gppNo/8)), regVal); if(gppNo < 32) { /* GPIO Data Out Enable Control Register - set to input*/ mvGppTypeSet(0, (1<<gppNo), MV_GPP_IN & (1<<gppNo) ); /* GPIO Data In Polarity Register */ mvGppPolaritySet(0, (1<<gppNo), (0<<gppNo) ); } else { /* GPIO Data Out Enable Control Register - set to input*/ mvGppTypeSet(1, (1<<(gppNo-32)), MV_GPP_IN & (1<<(gppNo-32)) ); /* GPIO Data In Polarity Register */ mvGppPolaritySet(1, (1<<(gppNo-32)), (0<<(gppNo-32)) ); } /* GPIO Data In Polarity Register */ /* mvGppPolaritySet(mppGrp, (1<<gppNo), (0<<gppNo) ); */ regVal = MV_REG_READ(MV_USB_PHY_POWER_CTRL_REG(dev)); regVal &= ~(7 << 24); MV_REG_WRITE(MV_USB_PHY_POWER_CTRL_REG(dev), regVal); } /* for device - reset vbus enable gpp, for host - set by default */ if(gppVbusEnNo != (MV_U8)N_A) { /*mvOsPrintf("mvUsbGppInit: gppVbusEnNo = %d \n", gppVbusEnNo);*/ regVal = MV_REG_READ(GPP_DATA_OUT_REG((gppVbusEnNo/32))); if(gppVbusEnNo < 32) { MV_REG_WRITE(GPP_DATA_OUT_REG(0), (regVal & ~(1 << gppVbusEnNo))); } else { MV_REG_WRITE(GPP_DATA_OUT_REG(1), (regVal & ~(1 << (gppVbusEnNo - 32)))); } } return gppNo; }
MV_BOOL bfGppOutRegBitTest(MV_32 bit) { if (bit < 0) return MV_FALSE; if (bit < 32) return MV_REG_READ(GPP_DATA_OUT_REG(0)) & BIT(bit) ? MV_TRUE : MV_FALSE; else return MV_REG_READ(GPP_DATA_OUT_REG(1)) & BIT(bit - 32) ? MV_TRUE : MV_FALSE; }
/******************************************************************************* * mvGppValueSet - Set a GPP Pin list value. * * DESCRIPTION: * This function set value for given GPP pin list. * * INPUT: * group - GPP group number * mask - 32bit mask value. Each set bit in the mask means that the * value of corresponding GPP will be set accordingly. Other GPP * are not affected. * value - 32bit value that describes GPP value per pin. * * OUTPUT: * None. * * EXAMPLE: * Set GPP8 value of '0' and GPP15 value of '1'. * mvGppActiveSet(0, (GPP8 | GPP15), ((0 & GPP8) | (GPP15)) ); * * RETURN: * None. * *******************************************************************************/ MV_STATUS mvGppValueSet (MV_U32 group, MV_U32 mask, MV_U32 value) { MV_U32 outEnable; MV_U32 i; if (group >= MV_GPP_MAX_GROUP) { DB(mvOsPrintf("mvGppValueSet: Error invalid group number \n")); return MV_BAD_PARAM; } /* verify that the gpp pin is configured as output */ /* Note that in the register out enabled -> bit = '0'. */ outEnable = ~MV_REG_READ(GPP_DATA_OUT_EN_REG(group)); for (i = 0 ; i < 32 ;i++) { if (((mask & (1 << i)) & (outEnable & (1 << i))) != (mask & (1 << i))) { mvOsPrintf("mvGppValueSet: Err. An attempt to set output "\ "value to GPP %d in input mode.\n", i); return MV_ERROR; } } gppRegSet(group, GPP_DATA_OUT_REG(group), mask, value); return MV_OK; }
MV_VOID mvBoardEnvInit(MV_VOID) { MV_U32 boardId= mvBoardIdGet(); if (!((boardId >= BOARD_ID_BASE)&&(boardId < MV_MAX_BOARD_ID))) { mvOsPrintf("mvBoardEnvInit:Board unknown.\n"); return; } if (mvBoardIdGet() != XCAT98DX_ID) { /* Set NAND interface access parameters */ MV_REG_WRITE(NAND_READ_PARAMS_REG, BOARD_INFO(boardId)->nandFlashReadParams); MV_REG_WRITE(NAND_WRITE_PARAMS_REG, BOARD_INFO(boardId)->nandFlashWriteParams); MV_REG_WRITE(NAND_CTRL_REG, BOARD_INFO(boardId)->nandFlashControl); } /* Set GPP Out value */ MV_REG_WRITE(GPP_DATA_OUT_REG(0), BOARD_INFO(boardId)->gppOutValLow); MV_REG_WRITE(GPP_DATA_OUT_REG(1), BOARD_INFO(boardId)->gppOutValHigh); /* set GPP polarity */ mvGppPolaritySet(0, 0xFFFFFFFF, BOARD_INFO(boardId)->gppPolarityValLow); mvGppPolaritySet(1, 0xFFFFFFFF, BOARD_INFO(boardId)->gppPolarityValHigh); /* Workaround for Erratum FE-MISC-70*/ if(mvCtrlRevGet()==MV_88F6XXX_A0_REV) { BOARD_INFO(boardId)->gppOutEnValLow &= 0xfffffffd; BOARD_INFO(boardId)->gppOutEnValLow |= (BOARD_INFO(boardId)->gppOutEnValHigh) & 0x00000002; } /*End of WA*/ /* Set GPP Out Enable*/ mvGppTypeSet(0, 0xFFFFFFFF, BOARD_INFO(boardId)->gppOutEnValLow); mvGppTypeSet(1, 0xFFFFFFFF, BOARD_INFO(boardId)->gppOutEnValHigh); /* Nand CE */ MV_REG_BIT_SET(NAND_CTRL_REG, NAND_ACTCEBOOT_BIT); }
/******************************************************************************* * mvGppValueSet - Set a GPP Pin list value. * * DESCRIPTION: * This function set value for given GPP pin list. * * INPUT: * group - GPP group number * mask - 32bit mask value. Each set bit in the mask means that the * value of corresponding GPP will be set accordingly. Other GPP * are not affected. * value - 32bit value that describes GPP value per pin. * * OUTPUT: * None. * * EXAMPLE: * Set GPP8 value of '0' and GPP15 value of '1'. * mvGppActiveSet(0, (GPP8 | GPP15), ((0 & GPP8) | (GPP15)) ); * * RETURN: * None. * *******************************************************************************/ MV_STATUS mvGppValueSet (MV_U32 group, MV_U32 mask, MV_U32 value) { MV_U32 outEnable, tmp; MV_U32 i; if (group >= MV_GPP_MAX_GROUP) { DB(mvOsPrintf("mvGppValueSet: Error invalid group number \n")); return MV_BAD_PARAM; } /* verify that the gpp pin is configured as output */ /* Note that in the register out enabled -> bit = '0'. */ outEnable = ~MV_REG_READ(GPP_DATA_OUT_EN_REG(group)); /* Workaround for Erratum FE-MISC-70*/ if(mvCtrlRevGet()==MV_88F6XXX_A0_REV && (group == 1)) { tmp = ~MV_REG_READ(GPP_DATA_OUT_EN_REG(0)); outEnable &= 0xfffffffd; outEnable |= (tmp & 0x2); } /*End of WA*/ for (i = 0 ; i < 32 ;i++) { if (((mask & (1 << i)) & (outEnable & (1 << i))) != (mask & (1 << i))) { mvOsPrintf("mvGppValueSet: Err. An attempt to set output "\ "value to GPP %d in input mode.\n", i); return MV_ERROR; } } gppRegSet(group, GPP_DATA_OUT_REG(group), mask, value); return MV_OK; }
void BuffaloGpio_WriteMCR_UPSPort(unsigned int value) { if (value & UART_MCR_DTR) MV_REG_BIT_SET(GPP_DATA_OUT_REG(0), BIT(BIT_UPS_DTR)); else MV_REG_BIT_RESET(GPP_DATA_OUT_REG(0), BIT(BIT_UPS_DTR)); if (BuffaloMctrlMode == BUFFALO_MODEM_CTRL_MODE_GPIO) { if(value & UART_MCR_RTS) MV_REG_BIT_SET(GPP_DATA_OUT_REG(0), BIT(BIT_UPS_RTS)); else MV_REG_BIT_RESET(GPP_DATA_OUT_REG(0), BIT(BIT_UPS_RTS)); #if defined(CONTROL_ST_IN_MCTRL) if (value & BUFFALO_UART_MCR_ST) MV_REG_BIT_SET(GPP_DATA_OUT_REG(0), BIT(BIT_UPS_TXD)); else MV_REG_BIT_RESET(GPP_DATA_OUT_REG(0), BIT(BIT_UPS_TXD)); #endif } }
/***************************************************************************** * UART ****************************************************************************/ static struct resource mv_uart_resources[] = { { .start = PORT0_BASE, .end = PORT0_BASE + 0xff, .flags = IORESOURCE_MEM, }, { .start = IRQ_UART0, .end = IRQ_UART0, .flags = IORESOURCE_IRQ, }, { .start = PORT1_BASE, .end = PORT1_BASE + 0xff, .flags = IORESOURCE_MEM, }, { .start = IRQ_UART1, .end = IRQ_UART1, .flags = IORESOURCE_IRQ, }, }; static struct plat_serial8250_port mv_uart_data[] = { { .mapbase = PORT0_BASE, .membase = (char *)PORT0_BASE, .irq = IRQ_UART0, .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, .regshift = 2, }, { .mapbase = PORT1_BASE, .membase = (char *)PORT1_BASE, .irq = IRQ_UART1, .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, .regshift = 2, }, { }, }; static struct platform_device mv_uart = { .name = "serial8250", .id = PLAT8250_DEV_PLATFORM, .dev = { .platform_data = mv_uart_data, }, .num_resources = ARRAY_SIZE(mv_uart_resources), .resource = mv_uart_resources, }; static void serial_initialize(void) { mv_uart_data[0].uartclk = mv_uart_data[1].uartclk = mvTclk; platform_device_register(&mv_uart); } static void __init mv_vfp_init(void) { #if defined CONFIG_VFP_FASTVFP printk("VFP initialized to Run Fast Mode.\n"); #endif } #if defined(MV_88F6183) #ifdef CONFIG_MV_INCLUDE_AUDIO typedef struct { unsigned int base; unsigned int size; } _audio_mem_info; typedef struct { u32 spdif_rec; u32 spdif_play; u32 i2s_rec; u32 i2s_play; _audio_mem_info mem_array[MV_DRAM_MAX_CS + 1]; } _audio_info; _audio_info audio_info = {1, 1, 1, 1}; static struct resource mv_snd_resources[] = { [0] = { .start = INTER_REGS_BASE + AUDIO_REG_BASE, .end = INTER_REGS_BASE + AUDIO_REG_BASE + SZ_16K -1, .flags = IORESOURCE_MEM, }, [1] = { .start = IRQ_AUDIO_INT, .end = IRQ_AUDIO_INT, .flags = IORESOURCE_IRQ, }, [2] = { .start = NR_IRQS, /* should obtained from board information*/ .end = NR_IRQS, /* should obtained from board information */ .flags = IORESOURCE_IRQ, } }; static u64 mv_snd_dmamask = 0xFFFFFFFFUL; static struct platform_device mv_snd_device = { .name = "mv88fx_snd", .id = -1, .dev = { .dma_mask = &mv_snd_dmamask, .coherent_dma_mask = 0xFFFFFFFF, .platform_data = &audio_info, }, .num_resources = ARRAY_SIZE(mv_snd_resources), .resource = mv_snd_resources, }; #endif /* #ifdef CONFIG_MV_INCLUDE_AUDIO */ #ifdef CONFIG_MV_INCLUDE_SDIO static struct resource mvsdmmc_resources[] = { [0] = { .start = INTER_REGS_BASE + 0x80000, .end = INTER_REGS_BASE + 0x80000 + SZ_1K -1, .flags = IORESOURCE_MEM, }, [1] = { .start = SDIO_IRQ_NUM, .end = SDIO_IRQ_NUM, .flags = IORESOURCE_IRQ, }, [2] = { .start = NR_IRQS, /* should obtained from board information*/ .end = NR_IRQS, /* should obtained from board information */ .flags = IORESOURCE_IRQ, } }; static u64 mvsdmmc_dmamask = 0xffffffffUL; static struct platform_device mvsdmmc_device = { .name = "mvsdmmc", .id = -1, .dev = { .dma_mask = &mvsdmmc_dmamask, .coherent_dma_mask = 0xffffffff, }, .num_resources = ARRAY_SIZE(mvsdmmc_resources), .resource = mvsdmmc_resources, }; #endif /* CONFIG_MV_INCLUDE_SDIO */ static struct platform_device *devices[] __initdata = { #ifdef CONFIG_MV_INCLUDE_AUDIO &mv_snd_device, #endif #ifdef CONFIG_MV_INCLUDE_SDIO &mvsdmmc_device, #endif NULL }; #endif /* #if defined(MV_88F6183) */ static void __init mv_init(void) { unsigned int temp; /* init the Board environment */ if (mvBoardIdGet() != RD_88F6082_MICRO_DAS_NAS) /* excluded for HDD power problem - to be fixed */ mvBoardEnvInit(); /* init the controller environment */ if( mvCtrlEnvInit() ) { printk( "Controller env initialization failed.\n" ); return; } if(mvBoardIdGet() == RD_88F5181_POS_NAS) { temp = MV_REG_READ(GPP_DATA_OUT_REG(0)); temp &= ~(1 << 0x5); /* for host mode should be set to 0 */ if(!mvIsUsbHost) { temp |= (1 << 0x5); } MV_REG_WRITE(GPP_DATA_OUT_REG(0), temp); } /* Init the CPU windows setting and the access protection windows. */ if( mvCpuIfInit(mv_sys_map()) ) { printk( "Cpu Interface initialization failed.\n" ); return; } /* Init Tclk & SysClk */ mvTclk = mvBoardTclkGet(); mvSysclk = mvBoardSysClkGet(); printk("Sys Clk = %d, Tclk = %d\n",mvSysclk ,mvTclk ); if ((mvCtrlModelGet() == MV_5281_DEV_ID) || (mvCtrlModelGet() == MV_1281_DEV_ID) || (mvCtrlModelGet() == MV_6183_DEV_ID)) mv_orion_ver = MV_ORION2; /* Orion II */ else mv_orion_ver = MV_ORION1; /* Orion I */ /* Implement workaround for FEr# CPU-C16: Wait for interrupt command */ /* is not processed properly, the workaround is not to use this command */ /* the erratum is relevant for 5281 devices with revision less than C0 */ if((mvCtrlModelGet() == MV_5281_DEV_ID) && (mvCtrlRevGet() < MV_5281_C0_REV)) { support_wait_for_interrupt = 0; } #ifdef CONFIG_JTAG_DEBUG support_wait_for_interrupt = 0; /* for Lauterbach */ #endif mv_vfp_init(); elf_hwcap &= ~HWCAP_JAVA; serial_initialize(); /* At this point, the CPU windows are configured according to default definitions in mvSysHwConfig.h */ /* and cpuAddrWinMap table in mvCpuIf.c. Now it's time to change defaults for each platform. */ mvCpuIfAddDecShow(); #if defined(CONFIG_MTD_PHYSMAP) mv_mtd_initialize(); #endif print_board_info(); #ifdef CONFIG_MV_INCLUDE_IDMA mvDmaInit(); #endif #if defined(MV_88F6183) #ifdef CONFIG_MV_INCLUDE_SDIO mvsdmmc_resources[2].end = mvBoardSDIOGpioPinGet() + IRQ_GPP_START; mvsdmmc_resources[2].start = mvBoardSDIOGpioPinGet() + IRQ_GPP_START; irq_int_type[mvBoardSDIOGpioPinGet()] = GPP_IRQ_TYPE_CHANGE_LEVEL; #endif /* CONFIG_MV_INCLUDE_SDIO */ #ifdef CONFIG_MV_INCLUDE_AUDIO for (temp=0 ; temp< MV_DRAM_MAX_CS; temp++) { MV_DRAM_DEC_WIN win; audio_info.mem_array[temp].base = 0; audio_info.mem_array[temp].size = 0; mvDramIfWinGet(SDRAM_CS0 + temp, &win); if (win.enable) { audio_info.mem_array[temp].base = win.addrWin.baseLow; audio_info.mem_array[temp].size = win.addrWin.size; } } #endif /* CONFIG_MV_INCLUDE_AUDIO */ if ((temp = ARRAY_SIZE(devices) - 1)) platform_add_devices(devices, temp); #endif /* MV_88F6183 */ return; }
//---------------------------------------------------------------------- int __init buffaloLedDriver_init (void) { int i; char buf[1024]; struct proc_dir_entry *pde; FUNCTRACE(printk("%s > Entered.\n",__FUNCTION__)); BuffaloGpio_Init(); pde = proc_mkdir("buffalo/gpio", 0); pde = proc_mkdir("buffalo/gpio/led", 0); pde = proc_mkdir("buffalo/gpio/switch", 0); pde = proc_mkdir("buffalo/gpio/fan", 0); pde = proc_mkdir("buffalo/gpio/power_control", 0); pde = create_proc_info_entry ("buffalo/power_sw", 0, 0, gpio_power_read_proc); pde = create_proc_entry("buffalo/gpio/led/all", 0, 0); pde->read_proc = BuffaloAllLedReadProc; pde->write_proc= BuffaloAllLedWriteProc; pde = create_proc_entry("buffalo/cpu_status", 0, 0); pde->read_proc = BuffaloCpuStatusReadProc; pde->write_proc = BuffaloCpuStatusWriteProc; if (BIT_LED_ALARM >= 0) { BuffaloGpio_AlarmLedDisable(); pde = create_proc_entry("buffalo/gpio/led/alarm", 0, 0); pde->read_proc = BuffaloLedReadProc; pde->write_proc = BuffaloLedWriteProc; alarmLed.mppNumber = BIT_LED_ALARM; pde->data = &alarmLed; pde = create_proc_entry("buffalo/gpio/led/alarm_blink", 0, 0); pde->read_proc = BuffaloLedBlinkReadProc; pde->write_proc = BuffaloLedBlinkWriteProc; pde->data = &alarmLed; } if (BIT_LED_INFO >= 0) { BuffaloGpio_InfoLedDisable(); pde = create_proc_entry("buffalo/gpio/led/info", 0, 0); pde->read_proc = BuffaloLedReadProc; pde->write_proc = BuffaloLedWriteProc; infoLed.mppNumber = BIT_LED_INFO; pde->data = &infoLed; pde = create_proc_entry("buffalo/gpio/led/info_blink", 0, 0); pde->read_proc = BuffaloLedBlinkReadProc; pde->write_proc = BuffaloLedBlinkWriteProc; pde->data = &infoLed; } if (BIT_LED_PWR >= 0) { BuffaloGpio_PowerLedEnable(); pde = create_proc_entry("buffalo/gpio/led/power", 0, 0); pde->read_proc = BuffaloLedReadProc; pde->write_proc = BuffaloLedWriteProc; powerLed.mppNumber = BIT_LED_PWR; pde->data = &powerLed; pde = create_proc_entry("buffalo/gpio/led/power_blink", 0, 0); pde->read_proc = BuffaloLedBlinkReadProc; pde->write_proc = BuffaloLedBlinkWriteProc; pde->data = &powerLed; } if (BIT_LED_FUNC >= 0) { BuffaloGpio_FuncLedDisable(); pde = create_proc_entry("buffalo/gpio/led/func", 0, 0); pde->read_proc = BuffaloLedReadProc; pde->write_proc = BuffaloLedWriteProc; funcLed.mppNumber = BIT_LED_FUNC; pde->data = &funcLed; pde = create_proc_entry("buffalo/gpio/led/func_blink", 0, 0); pde->read_proc = BuffaloLedBlinkReadProc; pde->write_proc = BuffaloLedBlinkWriteProc; pde->data = &funcLed; } if (BIT_LED_ETH >= 0) { pde = create_proc_entry("buffalo/gpio/led/eth", 0, 0); pde->read_proc = BuffaloEthLedReadProc; pde->write_proc = BuffaloEthLedWriteProc; } for (i=0; i<BUF_NV_SIZE_BIT_HDD_POWER; i++) { if (bitHddPower[i] < 0) continue; sprintf(buf, "buffalo/gpio/power_control/hdd%d", i); pde = create_proc_entry(buf, 0, 0); if (pde != NULL) { pde->read_proc = BuffaloHddReadProc; pde->write_proc= BuffaloHddWriteProc; pde->owner = THIS_MODULE; pde->data = (void *)i; } } for (i=0; i<BUF_NV_SIZE_BIT_USB_POWER; i++) { if (bitUsbPower[i] < 0) continue; sprintf(buf, "buffalo/gpio/power_control/usb%d", i); pde = create_proc_entry(buf, 0, NULL); if (pde != NULL) { pde->read_proc = BuffaloUsbReadProc; pde->write_proc = BuffaloUsbWriteProc; pde->owner = THIS_MODULE; pde->data = (void *)i; } } if (use_slide_power == 1) { pde = create_proc_entry("buffalo/gpio/switch/power", 0, 0); pde->read_proc = BuffaloPowerReadProc; // pde->write_proc = BuffaloPowerReadProc; pde = create_proc_info_entry("buffalo/gpio/switch/slide_switch", 0, 0, BuffaloSlideSwitchReadProc); } if (BIT_AUTO_POWER >= 0) { pde = create_proc_entry("buffalo/gpio/switch/auto_power", 0, 0); pde->read_proc = BuffaloAutoPowerReadProc; // pde->write_proc = BuffaloAutoPowerReadProc; } if (use_slide_power == 1 || BIT_AUTO_POWER >= 0) { pde = create_proc_entry("buffalo/gpio/switch/sw_control", 0, 0); pde->read_proc = BuffaloSwPollingReadProc; pde->write_proc = BuffaloSwPollingWriteProc; } if (BIT_FUNC >= 0) { pde = create_proc_entry("buffalo/gpio/switch/func", 0, 0); pde->read_proc = BuffaloFuncReadProc; // pde->write_proc= BuffaloFuncReadProc; } if (BIT_FAN_LOW >= 0 && BIT_FAN_HIGH) { pde = create_proc_entry("buffalo/gpio/fan/control", 0, 0); pde->read_proc = BuffaloFanControlReadProc; pde->write_proc= BuffaloFanControlWriteProc; } if (BIT_FAN_LCK >= 0) { pde = create_proc_entry("buffalo/gpio/fan/lock", 0, 0); pde->read_proc = BuffaloFanStatusReadProc; pde->write_proc= BuffaloFanStatusWriteProc; } pde = create_proc_entry("buffalo/gpio/data_out_register", 0, 0); pde->read_proc = BuffaloGpioRegisterReadProc; pde->write_proc= BuffaloGpioRegisterWriteProc; pde->data = (void *)GPP_DATA_OUT_REG(0); pde = create_proc_entry("buffalo/gpio/data_out_enable_register", 0, 0); pde->read_proc = BuffaloGpioRegisterReadProc; pde->write_proc= BuffaloGpioRegisterWriteProc; pde->data = (void *)GPP_DATA_OUT_EN_REG(0); pde = create_proc_entry("buffalo/gpio/blink_enable_register", 0, 0); pde->read_proc = BuffaloGpioRegisterReadProc; pde->write_proc= BuffaloGpioRegisterWriteProc; pde->data = (void *)GPP_BLINK_EN_REG(0); pde = create_proc_entry("buffalo/gpio/data_in_polarity_register", 0, 0); pde->read_proc = BuffaloGpioRegisterReadProc; pde->write_proc= BuffaloGpioRegisterWriteProc; pde->data = (void *)GPP_DATA_IN_POL_REG(0); pde = create_proc_entry("buffalo/gpio/data_in_register", 0, 0); pde->read_proc = BuffaloGpioRegisterReadProc; pde->write_proc= BuffaloGpioRegisterWriteProc; pde->data = (void *)GPP_DATA_IN_REG(0); if (Buffalo_has_PM()) { for (i=0; i<4; i++) { sprintf(buf, "buffalo/gpio/power_control/hdd%d", i); pde = create_proc_entry(buf, 0, 0); if (pde != NULL) { pde->read_proc = BuffaloPMHddPowerReadProc; pde->write_proc= BuffaloPMHddPowerWriteProc; pde->owner = THIS_MODULE; pde->data = (void *)i; } sprintf(buf, "buffalo/gpio/led/pm_diag_led%d", i); pde = create_proc_entry(buf, 0, 0); if (pde != NULL) { pde->read_proc = BuffaloPMHddDiagLedReadProc; pde->write_proc= BuffaloPMHddDiagLedWriteProc; pde->owner = THIS_MODULE; pde->data = (void *)i; } } } printk("%s %s Ver.%s installed.\n", DRIVER_NAME, AUTHOR, BUFFALO_DRIVER_VER); return 0; }
.active = 0, }; /***************************************************************************** * BACKLIGHT ****************************************************************************/ #define MV_GPP_REGS_OFFSET(grp) ((grp) ? 0xD0420:0xD0400) #define MV_GPP_REGS_BASE(unit) (MV_GPP_REGS_OFFSET(unit)) #define GPP_DATA_OUT_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x00) static struct dovebl_platform_data dove_d2plug_backlight_data = { .default_intensity = 0xa, .gpio_pm_control = 1, .lcd_start = DOVE_SB_REGS_VIRT_BASE, /* lcd power control reg base. */ .lcd_end = DOVE_SB_REGS_VIRT_BASE+GPP_DATA_OUT_REG(0), /* end of reg map. */ .lcd_offset = GPP_DATA_OUT_REG(0), /* register offset */ .lcd_mapped = 1, /* va = 0, pa = 1 */ .lcd_mask = (1<<26), /* mask, bit[11] */ .lcd_on = (1<<26), /* value to enable lcd power */ .lcd_off = 0x0, /* value to disable lcd power */ .blpwr_start = DOVE_SB_REGS_VIRT_BASE, /* bl pwr ctrl reg base. */ .blpwr_end = DOVE_SB_REGS_VIRT_BASE+GPP_DATA_OUT_REG(0), /* end of reg map. */ .blpwr_offset = GPP_DATA_OUT_REG(0), /* register offset */ .blpwr_mapped = 1, /* pa = 0, va = 1 */ .blpwr_mask = (1<<28), /* mask, bit[13] */ .blpwr_on = (1<<28), /* value to enable bl power */ .blpwr_off = 0x0, /* value to disable bl power */ .btn_start = DOVE_LCD1_PHYS_BASE, /* brightness control reg base. */