CSTATUS GetIpackAddress(int nHandle, char chSlot, long* pAddress)
{
	CARRIERDATA_STRUCT* pCarrier;
	
	pCarrier = GetCarrier(nHandle);
	if(pCarrier == 0)
		return E_INVALID_HANDLE;

	if(pCarrier->bInitialized == FALSE)
		return E_NOT_INITIALIZED;

	switch(chSlot)
	{
	case SLOT_A:
		*pAddress = pCarrier->lBaseAddress + SLOT_A_IO_OFFSET;
		break;
	case SLOT_B:
		*pAddress = pCarrier->lBaseAddress + SLOT_B_IO_OFFSET;
		break;
	case SLOT_C:
		*pAddress = pCarrier->lBaseAddress + SLOT_C_IO_OFFSET;
		break;
	case SLOT_D:
		*pAddress = pCarrier->lBaseAddress + SLOT_D_IO_OFFSET;
		break;
	case SLOT_E:
		*pAddress = pCarrier->lBaseAddress + SLOT_E_IO_OFFSET;
		break;
	default:
		*pAddress = 0;
		return E_INVALID_SLOT;
		break;
	}
	return (CSTATUS)S_OK;
}
CSTATUS EnableInterrupts(int nHandle)
{
	CARRIERDATA_STRUCT* pCarrier;
	PCI_BOARD_MEMORY_MAP* pPCICard;
        word nValue; 

	pCarrier = GetCarrier(nHandle);
	if(pCarrier == 0)
		return E_INVALID_HANDLE;

	if(pCarrier->bInitialized == FALSE)
		return E_NOT_INITIALIZED;

	pPCICard = (PCI_BOARD_MEMORY_MAP*)pCarrier->lBaseAddress;		

	nValue = input_word(nHandle,(word*)&pPCICard->controlReg);
	nValue |= APC_INT_PENDING_CLEAR;	/*  Clear any pending interrupts */
	output_word(nHandle,(word*)&pPCICard->controlReg, nValue );

	nValue |= APC_INT_ENABLE;		/* Enable interrupts */
	output_word(nHandle,(word*)&pPCICard->controlReg, nValue );

	pCarrier->bIntEnabled = TRUE;	/*  Interrupts are Enabled */
	return (CSTATUS)S_OK;
}
CSTATUS SetIPClockControl(int nHandle, char chSlot, word uControl)
{
	CARRIERDATA_STRUCT* pCarrier;
	PCI_BOARD_MEMORY_MAP* pPCICard;
	word nValue;
	
	pCarrier = GetCarrier(nHandle);
	if(pCarrier == 0)
	  return E_INVALID_HANDLE;

	if(pCarrier->bInitialized == FALSE)
	  return E_NOT_INITIALIZED;

	/* check carrier ID to see if 32MHZ IP clocking is supported */
	if( pCarrier->uCarrierID & CARRIER_CLK )	/* nonzero can support 32MHZ IP clock */
	  {
	    pPCICard = (PCI_BOARD_MEMORY_MAP*)pCarrier->lBaseAddress;		
	    nValue = input_word(nHandle, (word*)&pPCICard->IPClockControl);

	    switch(chSlot)
	      {
	      case SLOT_A:
		nValue &= 0x00FE;		/* default force bit 0 = 0 = 8MHZ IP clock */
		if( uControl )			/* does caller want 32MHZ? */
		  nValue |= 1;		/* make slot A IP clock 32MHZ */
		break;
	      case SLOT_B:
		nValue &= 0x00FD;		/* default force bit 1 = 0 = 8MHZ IP clock */
		if( uControl )			/* does caller want 32MHZ? */
		  nValue |= 2;		/* make slot B IP clock 32MHZ */
		break;
	      case SLOT_C:
		nValue &= 0x00FB;		/* default force bit 2 = 0 = 8MHZ IP clock */
		if( uControl )			/* does caller want 32MHZ? */
		  nValue |= 4;		/* make slot C IP clock 32MHZ */
		break;
	      case SLOT_D:
		nValue &= 0x00F7;		/* default force bit 3 = 0 = 8MHZ IP clock */
		if( uControl )			/* does caller want 32MHZ? */
		  nValue |= 8;			/* make slot D IP clock 32MHZ */
		break;
	      case SLOT_E:
		nValue &= 0x00EF;		/* default force bit 4 = 0 = 8MHZ IP clock */
		if( uControl )			/* does caller want 32MHZ? */
		  nValue |= 0x10;		/* make slot E IP clock 32MHZ */
		break;
	      default:
		return E_INVALID_SLOT;
		break;
	      }
	    output_word(nHandle, (word*)&pPCICard->IPClockControl, nValue ); /* write value */
	    return (CSTATUS)S_OK;
	  }
	return (CSTATUS)E_NOT_IMPLEMENTED;
}
CSTATUS GetMemoryAddress(int nHandle, long* pAddress)
{
	CARRIERDATA_STRUCT* pCarrier;

	pCarrier = GetCarrier(nHandle);
	if(pCarrier == 0)
		return E_INVALID_HANDLE;

	*pAddress = pCarrier->lMemBaseAddress;
	return (CSTATUS)S_OK;
}
CSTATUS SetCarrierAddress(int nHandle, long lAddress)
{
	CARRIERDATA_STRUCT* pCarrier;

	pCarrier = GetCarrier(nHandle);
	if(pCarrier == 0)
		return E_INVALID_HANDLE;

	if(lAddress != 0)
		pCarrier->lBaseAddress = lAddress;

	return (CSTATUS)S_OK;
}
CSTATUS GetCarrierID(int nHandle, word* pCarrierID)
{
	CARRIERDATA_STRUCT* pCarrier;
	
	pCarrier = GetCarrier(nHandle);
	if(pCarrier == 0)
		return E_INVALID_HANDLE;

	if(pCarrier->bInitialized == FALSE)
		return E_NOT_INITIALIZED;

	*pCarrierID = pCarrier->uCarrierID;
	return (CSTATUS)S_OK;
}
예제 #7
0
// private
bool EdiComposer::ComposeHeader(const Document& doc) {

    bool result = true;

    BufferClean();
    for (size_t j=0; j<doc.GetDescriptor().GetSize(); j++) {

        WriteData(doc.GetField(j));
        if ( 0 == doc.GetField(j).GetDescriptor().GetName().Cmp(CARRIER_NAME) ) {
            SetCarrier(doc.GetField(j).GetValue());
            GetTrailer().Carrier = GetCarrier();
        }
    }
    BufferFlush();
    return result;
};
long input_long_pci_config(int nHandle, long *p)
{
	CARRIERDATA_STRUCT* pCarrier;	/*  local carrier */
	unsigned long data[3];

	pCarrier = GetCarrier(nHandle);
	if(pCarrier == NULL)
		return 0;

        /* place address to read from in data[0]; */
        data[0] = (unsigned long) p;
        /* place device instance to read from @ data[1]; */
        data[1] = (unsigned long) pCarrier->nDevInstance;
        /* pram3 = function: 1=read8bits,2=read16bits,4=read32bits, 0x40=readconfig32bits */
        read( pCarrier->nCarrierDeviceHandle, &data[0], 0x40 );
        return(  SwapLong( (long)data[1] ) );
}
CSTATUS CarrierClose(int nHandle)
{
	/*  Delete the carrier with the provided handle */
	CARRIERDATA_STRUCT* pCarrier;	/* local carrier pointer */

	pCarrier = GetCarrier(nHandle);
	if(pCarrier == 0)
		return E_INVALID_HANDLE;

	if(pCarrier->bInitialized == FALSE)
		return E_NOT_INITIALIZED;

  	close( pCarrier->nCarrierDeviceHandle );
  	pCarrier->nCarrierDeviceHandle = -1;
	DeleteCarrier(nHandle);		
	return (CSTATUS)S_OK;
}
void output_long_pci_config(int nHandle, long *p, long v)
{
	CARRIERDATA_STRUCT* pCarrier;	/*  local carrier */
	unsigned long data[3];

	pCarrier = GetCarrier(nHandle);
	if(pCarrier == NULL)
		return;

        /* place address to write data[0]; */
        data[0] = (unsigned long) p;
        /* place value to write @ address data[1]; */
        data[1] = (unsigned long) SwapLong( v );
        /* place device instance  @ data[2]; */
        data[2] = (unsigned long) pCarrier->nDevInstance;
        /* pram3 = function: 1=write8bits,2=write16bits,4=write32bits, 0x40=writeconfig32bits */
        write( pCarrier->nCarrierDeviceHandle, &data[0], 0x40 );
}
void output_long(int nHandle, long *p, long v)
{
	CARRIERDATA_STRUCT* pCarrier;	/*  local carrier */
	unsigned long data[2];

	pCarrier = GetCarrier(nHandle);
	if(pCarrier == NULL)
		return;

	if( p )
	{
           /* place address to write word in data [0]; */
           data[0] = (unsigned long) p;
           /* place value to write @ address data [1]; */
           data[1] = (unsigned long) SwapLong( v );
           /* pram3 = function: 1=write8bits,2=write16bits,4=write32bits */
           write( pCarrier->nCarrierDeviceHandle, &data[0], 4 );
	}
}
byte input_byte(int nHandle, byte *p)
{
	CARRIERDATA_STRUCT* pCarrier;	/*  local carrier */
	unsigned long data[2];

	pCarrier = GetCarrier(nHandle);
	if(pCarrier == NULL)
		return 0;

	if( p )
	{
           /* place address to read byte from in data [0]; */
           data[0] = (unsigned long) p;
           /* pram3 = function: 1=read8bits,2=read16bits */
           read( pCarrier->nCarrierDeviceHandle, &data[0], 1 );
           return( (byte)data[1] );
	}
	return((byte)0);
}
long input_long(int nHandle, long *p)
{
	CARRIERDATA_STRUCT* pCarrier;	/*  local carrier */
	unsigned long data[2];

	pCarrier = GetCarrier(nHandle);
	if(pCarrier == NULL)
		return 0;

	if( p )
	{
           /* place address to read word from in data [0]; */
           data[0] = (unsigned long) p;
           /* pram3 = function: 1=read8bits,2=read16bits,4=read32bits */
           read( pCarrier->nCarrierDeviceHandle, &data[0], 4 );
           return(  SwapLong( (long)data[1] ) );
	}
	return((long)0);
}
void output_byte(int nHandle, byte *p, byte v)
{
	CARRIERDATA_STRUCT* pCarrier;	/*  local carrier */
	unsigned long data[2];

	pCarrier = GetCarrier(nHandle);
	if(pCarrier == NULL)
		return;

	if( p )
	{
		/* place address to write byte in data [0]; */
		data[0] = (unsigned long) p;
		/* place value to write @ address data [1]; */
		data[1] = (unsigned long) v;
		/* pram3 = function: 1=write8bits,2=write16bits */
		write( pCarrier->nCarrierDeviceHandle, &data[0], 1 );
	}
}
void blocking_start_convert_byte(int nHandle, byte *p, byte v)
{
	CARRIERDATA_STRUCT* pCarrier;	/*  local carrier */
	unsigned long data[2];

	pCarrier = GetCarrier(nHandle);
	if(pCarrier == NULL)
		return;

	if( p )
	{
           /* place address to write word in data [0]; */
           data[0] = (unsigned long) p;
           /* place value to write @ address data [1]; */
           data[1] = (unsigned long) SwapBytes( v );
           /* pram3 = function: 7=blocking_start_convert_byte */
           write( pCarrier->nCarrierDeviceHandle, &data[0], 7 );
	}
}
CSTATUS ReadIpackID(int nHandle, char chSlot, word* pWords, int nWords)
{
	int i;		/* 	local index */	
	word* pWord;	/*  local variable */
	CARRIERDATA_STRUCT* pCarrier;	/*  local carrier */

	pCarrier = GetCarrier(nHandle);
	if(pCarrier == 0)
		return E_INVALID_HANDLE;

	if(pCarrier->bInitialized == FALSE)
		return E_NOT_INITIALIZED;

	switch(chSlot)
	{
	case SLOT_A:
		pWord = (word *)(pCarrier->lBaseAddress + SLOT_A_ID_OFFSET);
		break;
	case SLOT_B:
		pWord = (word *)(pCarrier->lBaseAddress + SLOT_B_ID_OFFSET);
		break;
	case SLOT_C:
		pWord = (word *)(pCarrier->lBaseAddress + SLOT_C_ID_OFFSET);
		break;
	case SLOT_D:
		pWord = (word *)(pCarrier->lBaseAddress + SLOT_D_ID_OFFSET);
		break;
	case SLOT_E:
		pWord = (word *)(pCarrier->lBaseAddress + SLOT_E_ID_OFFSET);
		break;
	default:
		pWord = 0;
		return E_INVALID_SLOT;
		break;
	}


	for(i = 0; i < nWords; i++, pWords++, pWord++)
		*pWords	= input_word(nHandle, pWord );

	return (CSTATUS)S_OK;
}
CSTATUS CarrierInitialize(int nHandle)
{
	CARRIERDATA_STRUCT* pCarrier;
	PCI_BOARD_MEMORY_MAP* pPCICard;
        word nValue; 

	pCarrier = GetCarrier(nHandle);
	if(pCarrier == 0)
		return E_INVALID_HANDLE;

	/* determine the carrier type and initialize */
	pPCICard = (PCI_BOARD_MEMORY_MAP*)pCarrier->lBaseAddress;		

	/* now reset the carrier */
	output_word(nHandle, (word*)&pPCICard->controlReg, SOFTWARE_RESET );

	/* following a software reset 8620a type products will return either */
	/* 0xAyyy or 0xByyyy values in the MS nibble of the control register (yyy = dont care)*/
	/* original 8620 carriers will return 0x0yyy in the MS nibble of the control register */
	/* 0x0yyy = original 8620 board - no extended features */
	/* 0xAyyy = 8620a board with 32MHZ IP clock without extra memory space */
	/* 0xByyy = 8620a board with 32MHZ IP clock and extra memory space */
	nValue = input_word( nHandle,(word*)&pPCICard->controlReg);	/* read again */

	/* pCarrier->uCarrierID value is saved in the carrier structure for later use */
	/* see include file apc8620.h for carrier attributes */

	pCarrier->uCarrierID = PCI_CARRIER;	/* attributes PCI */

	/* test the result */
	if((nValue & 0xF000) == 0xA000)
		pCarrier->uCarrierID |= CARRIER_CLK;

	if((nValue & 0xF000) == 0xB000)
	{
		pCarrier->uCarrierID |= CARRIER_CLK;
		pCarrier->uCarrierID |= CARRIER_MEM;
	}		
	pCarrier->bInitialized = TRUE;	/*  Carrier is now initialized */

	return (CSTATUS)S_OK;
}
예제 #18
0
bool InternalComposer::ComposeHeader(Descriptor* descriptor, Matrix* matrix)
{
    bool result = true;
    BufferClean();
    for (int j=0; j<GetHeader()->GetSize(); j++) {
        bool dataCheck = CheckAndWriteData(
            GetHeader()->GetDescriptor()->GetElementDescriptor(j), 
            GetHeader()->GetField(j)->GetValue());
        if ( !dataCheck ) {
            LOG_MESSAGE(INFO_MESSAGE_LEVEL, wxString::Format(" Row is [%d].\n", 1));
        }
        if ( descriptor->GetElementDescriptor(j)->GetName().Cmp(CARRIER_NAME) == 0 ) {
            SetCarrier(GetHeader()->GetField(j)->GetValue());
            GetTrailer().Carrier = GetCarrier()->c_str();
        }
        result = result && dataCheck;
    }
    BufferFlush();
    return result;
};
CSTATUS GetIPErrorBit(int nHandle, word* pState)
{
  CARRIERDATA_STRUCT* pCarrier;
  PCI_BOARD_MEMORY_MAP* pPCICard;
  word nValue;

  pCarrier = GetCarrier(nHandle);
  if(pCarrier == 0)
    return E_INVALID_HANDLE;

  pPCICard = (PCI_BOARD_MEMORY_MAP*)pCarrier->lBaseAddress;		
  /* get control register */
  nValue = input_word(nHandle, (word*)&pPCICard->controlReg);

  if( nValue & 0x0001 )	/* mask for IP error bit */
    *pState = TRUE;
  else
    *pState = FALSE;

  return (CSTATUS)S_OK;
}
CSTATUS GetIpackMemoryAddress(int nHandle, char chSlot, long* pAddress)
{
	CARRIERDATA_STRUCT* pCarrier;
	
	pCarrier = GetCarrier(nHandle);
	if(pCarrier == 0)
		return E_INVALID_HANDLE;

	if(pCarrier->bInitialized == FALSE)
		return E_NOT_INITIALIZED;

	if( pCarrier->lMemBaseAddress )	/* nonzero if MEM space is supported */
	{
		switch(chSlot)
		{
		case SLOT_A:
			*pAddress = pCarrier->lMemBaseAddress + SLOT_A_MEM_OFFSET;
			break;
		case SLOT_B:
			*pAddress = pCarrier->lMemBaseAddress + SLOT_B_MEM_OFFSET;
			break;
		case SLOT_C:
			*pAddress = pCarrier->lMemBaseAddress + SLOT_C_MEM_OFFSET;
			break;
		case SLOT_D:
			*pAddress = pCarrier->lMemBaseAddress + SLOT_D_MEM_OFFSET;
			break;
		case SLOT_E:
			*pAddress = pCarrier->lMemBaseAddress + SLOT_E_MEM_OFFSET;
			break;
		default:
			*pAddress = 0;
			return E_INVALID_SLOT;
			break;
		}
		return (CSTATUS)S_OK;
	}
	return (CSTATUS)E_NOT_IMPLEMENTED;
}
CSTATUS DisableInterrupts(int nHandle)
{
	CARRIERDATA_STRUCT* pCarrier;
	PCI_BOARD_MEMORY_MAP* pPCICard;
        word nValue; 

	pCarrier = GetCarrier(nHandle);
	if(pCarrier == 0)
		return E_INVALID_HANDLE;

	if(pCarrier->bInitialized == FALSE)
		return E_NOT_INITIALIZED;

	pPCICard = (PCI_BOARD_MEMORY_MAP*)pCarrier->lBaseAddress;		

	nValue = input_word(nHandle,(word*)&pPCICard->controlReg);
	nValue &= ~APC_INT_ENABLE;	/* Disable interrupts */
	output_word(nHandle,(word*)&pPCICard->controlReg, nValue );

	pCarrier->bIntEnabled = FALSE;

	return (CSTATUS)S_OK;
}
CSTATUS GetIPClockControl(int nHandle, char chSlot, word* pControl)
{
  CARRIERDATA_STRUCT* pCarrier;
  PCI_BOARD_MEMORY_MAP* pPCICard;
  word nValue;
	
  *pControl = 0;	/* default */

  pCarrier = GetCarrier(nHandle);
  if(pCarrier == 0)
    return E_INVALID_HANDLE;

  if(pCarrier->bInitialized == FALSE)
    return E_NOT_INITIALIZED;

  /* check carrier ID to see if 32MHZ IP clocking is supported */
  if( pCarrier->uCarrierID & CARRIER_CLK )	/* nonzero can support 32MHZ IP clock */
    {
      pPCICard = (PCI_BOARD_MEMORY_MAP*)pCarrier->lBaseAddress;		
      nValue = input_word(nHandle, (word*)&pPCICard->IPClockControl);

      switch(chSlot)
	{
	case SLOT_A:
	  if( nValue & 1 )	/* test IP clock bit 0 = 8MHZ, 1 = 32MHZ */
	    nValue = 1;
	  else
	    nValue = 0;
	  break;
	case SLOT_B:
	  if( nValue & 2 )	/* bit 1 */
	    nValue = 1;
	  else
	    nValue = 0;
	  break;
	case SLOT_C:
	  if( nValue & 4 )	/* bit 2 */
	    nValue = 1;
	  else
	    nValue = 0;
	  break;
	case SLOT_D:
	  if( nValue & 8 )	/* bit 3 */
	    nValue = 1;
	  else
	    nValue = 0;
	  break;
	case SLOT_E:
	  if( nValue & 0x10 )	/* bit 4 */
	    nValue = 1;
	  else
	    nValue = 0;
	  break;
	default:
	  return E_INVALID_SLOT;
	  break;
	}
      *pControl = nValue;			/* write value */
      return (CSTATUS)S_OK;
    }
  return (CSTATUS)E_NOT_IMPLEMENTED;
}
예제 #23
0
wxString EdiComposer::ConvertDataForType(const wxString& data, const wxString& type) {
    if ( type.Cmp(TEXT_TYPE) == 0 || type.Cmp(REGEXP_TYPE) == 0 ) {
        return data;    
    } else if (type.Cmp(CARRIER_TYPE) == 0) {
        return GetCarrier(); 
    } else if (type.Cmp(CHOICE_TYPE) == 0) {
        return data;
    } else if (type.Cmp(NUMERIC_TYPE) == 0) {
        return data;
    } else if (type.Cmp(MONEY_TYPE) == 0) {
        return data;
    } else if (type.Cmp(ALPHA_NUMERIC_TYPE) == 0) {
        return data;
    } else if (type.Cmp(DATE_TYPE) == 0 ) {
        if ( data == "" ) {
            return "";
        }
        wxDateTime date;
        if ( !date.ParseFormat(data, "%m/%d/%Y") ) {
            wxFAIL;
        }

        wxString str("");
        int c = date.GetYear()/100 - 19;
        str << ( c > 9 ? ( c - ( ( c/10 ) * 10) ) : c);
        str << date.Format("%y%m%d"); 
        return str; 

    } else if (type.Cmp(DATE_TYPE_0) == 0 ) {
        if ( data.Cmp("00/00/0000") == 0 ) {
            return "0000000";
        }
        if ( data == "" ) {
            return "";
        }
        wxDateTime date;
        if ( !date.ParseFormat(data, "%m/%d/%Y") ) {
            wxFAIL;
        }

        wxString str("");
        int c = date.GetYear()/100 - 19;
        str << ( c > 9 ? ( c - ( ( c/10 ) * 10) ) : c);
        str << date.Format("%y%m%d"); 
        return str; 

    } else if (type.Cmp(DATE_TYPE_9) == 0 ) {
        if ( data.Cmp("99/99/9999") == 0 ) {
            return "9999999";
        }
 
        if ( data == "" ) {
            return "";
        }

        wxDateTime date;
        if ( !date.ParseFormat(data, "%m/%d/%Y") ) {
            wxFAIL;
        }

        wxString str("");
        int c = date.GetYear()/100 - 19;
        str << ( c > 9 ? ( c - ( ( c/10 ) * 10) ) : c);
        str << date.Format("%y%m%d"); 
        return str; 

    } else if (type.Cmp(DATE_TYPE_09) == 0 ) {
        if ( data.Cmp("99/99/9999") == 0 ) {
            return "9999999";
        }
        if ( data.Cmp("00/00/0000") == 0 ) {
            return "0000000";
        }
        if ( data == "" ) {
            return "";
        }
        wxDateTime date;
        if ( !date.ParseFormat(data, "%m/%d/%Y") ) {
            wxFAIL;
        }

        wxString str("");
        int c = date.GetYear()/100 - 19;
        str << ( c > 9 ? ( c - ( ( c/10 ) * 10) ) : c);
        str << date.Format("%y%m%d"); 
        return str; 

    } else if (type.Cmp(LONG_DATE_TYPE) == 0 ) {
        if ( data == "" ) {
            return "";
        }
        wxDateTime date;
        if ( !date.ParseFormat(data, "%m/%d/%Y") ) {
            wxFAIL;
        }
        return date.Format("%Y%m%d"); 
    
    } else if (type.Cmp(LONG_DATE_TYPE_0) == 0 ) {
        if ( data.Cmp("00/00/0000") == 0 ) {
            return "00000000";
        }
        if ( data == "" ) {
            return "";
        }
        wxDateTime date;
        if ( !date.ParseFormat(data, "%m/%d/%Y") ) {
            wxFAIL;
        }
        return date.Format("%Y%m%d"); 
    
    } else if (type.Cmp(LONG_DATE_TYPE_9) == 0 ) {
        if ( data.Cmp("99/99/9999") == 0 ) {
            return "99999999";
        }
        if ( data == "" ) {
            return "";
        }
        wxDateTime date;
        if ( !date.ParseFormat(data, "%m/%d/%Y") ) {
            wxFAIL;
        }
        return date.Format("%Y%m%d"); 

    } else if (type.Cmp(LONG_DATE_TYPE_09) == 0 ) {
        if ( data.Cmp("99/99/9999") == 0 ) {
            return "99999999";
        }
        if ( data.Cmp("00/00/0000") == 0 ) {
            return "0000000";
        }
        if ( data == "" ) {
            return "";
        }
        wxDateTime date;
        if ( !date.ParseFormat(data, "%m/%d/%Y") ) {
            wxFAIL;
        }
        return date.Format("%Y%m%d"); 
    } else if (type.Cmp(FILE_COUNTER_TYPE) == 0) {
        return data;
    } else if (type.Cmp(ROW_COUNTER_TYPE) == 0) {
        return data;
    } else {
        THROW_ATF_EXCEPTION(0, wxString::Format("Unknown type '%s'", type));
    }
    return wxEmptyString;
};
CSTATUS AccessVPD( int nHandle, ULONG Address, ULONG* Data, ULONG Cycle )
{

  ULONG lValue, i;
  long offset;
  CARRIERDATA_STRUCT* pCarrier;


  pCarrier = GetCarrier(nHandle);
  if(pCarrier == 0)
    return E_INVALID_HANDLE;

  if(pCarrier->bInitialized == FALSE)
    return E_NOT_INITIALIZED;

  Address <<= 16;				/* position address */
  Address &= 0x7FFF0000;		/* save address, bit 31 = 0 = read cycle */

  offset = 0x4C;				/* PCI VPD address register address */
  lValue = input_long_pci_config( nHandle, &offset);

  lValue &= 0x0000FFFF;		/* must preserve LS 16 bits */
  lValue |= Address;			/* install MS 16 bits */

  if( Cycle )					/* if write cycle... */
    {
      lValue |= 0x80000000;	/* ... OR in the write bit */

      /* write the data value out to the VPD data register */
      offset = 0x50;			/* PCI VPD data register address */
      output_long_pci_config( nHandle, &offset, (ULONG)*Data);

      /* write the address along with the EEPROM write bit set to start the EEPROM write cycle */
      offset = 0x4C;				/* PCI VPD address register address */
      output_long_pci_config( nHandle, &offset, (ULONG)lValue);


      /* wait for the EEPROM write to complete, bit 31 of the address register becomes 0 */
      offset = 0x4C;				/* PCI VPD address register address */
      for(i = 0; i < (ULONG)MAX_TRIES; i++ )
	{
	  lValue = input_long_pci_config( nHandle, &offset);

	  if( (lValue & 0x80000000) == 0 )		/* zero when done */
	    break;

	  usleep(20);				/* Linux */
	}

      if( i > (ULONG)MAX_TRIES )
	return((int) -1);         	/* not ready error */

    }
  else				/* else a read cycle... */
    {
      offset = 0x4C;				/* PCI VPD address register address */
      output_long_pci_config( nHandle, &offset, (ULONG)lValue);

      /* wait for the EEPROM read to complete, bit 31 of the address register becomes 1 */
      for(i = 0; i < (ULONG)MAX_TRIES; i++ )
	{
	  lValue = input_long_pci_config( nHandle, &offset);

	  if( lValue & 0x80000000 )	/* non-zero when done */
	    break;

	  usleep(20);				/* Linux */
	}

      if( i > (ULONG)MAX_TRIES )
	return((int) -2);         	/* not ready error */

      /* read the data value from the VPD data register */
      offset = 0x50;				/* PCI VPD data register address */
      *Data = input_long_pci_config( nHandle, &offset);

    }

  return((int) 0);
}