////////////////////////////////////////////////////////////////////////////////
//! \brief Prepares the power block for the application.
//!
//! \return SUCCESS(0) Power block ready.
////////////////////////////////////////////////////////////////////////////////
//int PowerPrep( void )
int _start( void )
{
int iRtn = SUCCESS;
#ifndef mx28
HW_DIGCTL_CTRL_SET(BM_DIGCTL_CTRL_USE_SERIAL_JTAG);
#else
#define SSP0_PIN_DRIVE_12mA 0x2
// For EMI 200MHz,must enable SSP0 pin drive to 12mA,or the SD boot will fail.
HW_PINCTRL_DRIVE8_CLR(
BM_PINCTRL_DRIVE8_BANK2_PIN07_MA |
BM_PINCTRL_DRIVE8_BANK2_PIN06_MA |
BM_PINCTRL_DRIVE8_BANK2_PIN05_MA |
BM_PINCTRL_DRIVE8_BANK2_PIN04_MA |
BM_PINCTRL_DRIVE8_BANK2_PIN03_MA |
BM_PINCTRL_DRIVE8_BANK2_PIN02_MA |
BM_PINCTRL_DRIVE8_BANK2_PIN01_MA |
BM_PINCTRL_DRIVE8_BANK2_PIN00_MA);
HW_PINCTRL_DRIVE9_CLR(
BM_PINCTRL_DRIVE9_BANK2_PIN10_MA |
BM_PINCTRL_DRIVE9_BANK2_PIN09_MA |
BM_PINCTRL_DRIVE9_BANK2_PIN08_MA);
HW_PINCTRL_DRIVE8_SET(
(SSP0_PIN_DRIVE_12mA << BP_PINCTRL_DRIVE8_BANK2_PIN07_MA) |
(SSP0_PIN_DRIVE_12mA << BP_PINCTRL_DRIVE8_BANK2_PIN06_MA) |
(SSP0_PIN_DRIVE_12mA << BP_PINCTRL_DRIVE8_BANK2_PIN05_MA) |
(SSP0_PIN_DRIVE_12mA << BP_PINCTRL_DRIVE8_BANK2_PIN04_MA) |
(SSP0_PIN_DRIVE_12mA << BP_PINCTRL_DRIVE8_BANK2_PIN03_MA) |
(SSP0_PIN_DRIVE_12mA << BP_PINCTRL_DRIVE8_BANK2_PIN02_MA) |
(SSP0_PIN_DRIVE_12mA << BP_PINCTRL_DRIVE8_BANK2_PIN01_MA) |
(SSP0_PIN_DRIVE_12mA << BP_PINCTRL_DRIVE8_BANK2_PIN00_MA));
HW_PINCTRL_DRIVE9_SET(
(SSP0_PIN_DRIVE_12mA << BP_PINCTRL_DRIVE9_BANK2_PIN10_MA) |
(SSP0_PIN_DRIVE_12mA << BP_PINCTRL_DRIVE9_BANK2_PIN09_MA) |
(SSP0_PIN_DRIVE_12mA << BP_PINCTRL_DRIVE9_BANK2_PIN08_MA));
#endif
PowerPrep_CPUClock2XTAL();
PowerPrep_ClearAutoRestart();
hw_power_SetPowerClkGate( false );
printf("\r\nPowerPrep start initialize power...\r\n");
HW_POWER_VDDDCTRL.B.LINREG_OFFSET = HW_POWER_LINREG_OFFSET_STEP_BELOW;
HW_POWER_VDDACTRL.B.LINREG_OFFSET = HW_POWER_LINREG_OFFSET_STEP_BELOW;
HW_POWER_VDDIOCTRL.B.LINREG_OFFSET = HW_POWER_LINREG_OFFSET_STEP_BELOW;
// Ready the power block for 5V detection.
PowerPrep_Setup5vDetect();
PowerPrep_SetupBattDetect();
// Ensure the power source that turned on the device is sufficient to
// power the device.
PowerPrep_ConfigurePowerSource();
PowerPrep_EnableOutputRailProtection();
/* 3.3V is necessary to achieve best power supply capability
* and best EMI I/O performance.
*/
ddi_power_SetVddio(3300, 3150);
HW_POWER_CTRL_CLR(BM_POWER_CTRL_VDDD_BO_IRQ |
BM_POWER_CTRL_VDDA_BO_IRQ |
BM_POWER_CTRL_VDDIO_BO_IRQ |
BM_POWER_CTRL_VDD5V_DROOP_IRQ |
BM_POWER_CTRL_VBUSVALID_IRQ |
BM_POWER_CTRL_BATT_BO_IRQ |
BM_POWER_CTRL_DCDC4P2_BO_IRQ
);
/* If Battery not ready,setup the auto power down if we lost 5V.*/
if (!bBatteryReady)
{
HW_POWER_5VCTRL_SET(BM_POWER_5VCTRL_PWDN_5VBRNOUT);
#if defined(NO_DCDC_BATT_SOURCE) && defined(mx28)
/* On i.MX28, a new bit has been added to allow automatic hardware
* shutdown if VDD4P2 browns out. If we permanently only have a VDD5V
* source, we want to enable this bit. For devices with dead batteries,
* we could also temporarily set this bit until the kernel battery
* charger sufficiently charges the battery but we won't do this for
* now as the latest release kernel versions aren't aware of it
* and thus don't handle the proper setting/clearing of this bit.
*/
HW_POWER_REFCTRL_SET(1<<7);
#endif
}
return iRtn;
}
void init_emi_pin(int pin_voltage,
int pin_drive
)
{
HW_PINCTRL_CTRL_CLR(BM_PINCTRL_CTRL_SFTRST | BM_PINCTRL_CTRL_CLKGATE);
/* EMI_A00-06 */
/* Configure Bank-2 Pins 9-15 voltage and drive strength*/
HW_PINCTRL_DRIVE9_CLR(
BM_PINCTRL_DRIVE9_BANK2_PIN09_V |
BM_PINCTRL_DRIVE9_BANK2_PIN09_MA |
BM_PINCTRL_DRIVE9_BANK2_PIN10_V |
BM_PINCTRL_DRIVE9_BANK2_PIN10_MA |
BM_PINCTRL_DRIVE9_BANK2_PIN11_V |
BM_PINCTRL_DRIVE9_BANK2_PIN11_MA |
BM_PINCTRL_DRIVE9_BANK2_PIN12_V |
BM_PINCTRL_DRIVE9_BANK2_PIN12_MA |
BM_PINCTRL_DRIVE9_BANK2_PIN13_V |
BM_PINCTRL_DRIVE9_BANK2_PIN13_MA |
BM_PINCTRL_DRIVE9_BANK2_PIN14_V |
BM_PINCTRL_DRIVE9_BANK2_PIN14_MA |
BM_PINCTRL_DRIVE9_BANK2_PIN15_V |
BM_PINCTRL_DRIVE9_BANK2_PIN15_MA);
HW_PINCTRL_DRIVE9_SET(
PIN_VOL(BM_PINCTRL_DRIVE9_BANK2_PIN09_V , pin_voltage) |
BF_PINCTRL_DRIVE9_BANK2_PIN09_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE9_BANK2_PIN10_V , pin_voltage) |
BF_PINCTRL_DRIVE9_BANK2_PIN10_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE9_BANK2_PIN11_V , pin_voltage) |
BF_PINCTRL_DRIVE9_BANK2_PIN11_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE9_BANK2_PIN12_V , pin_voltage) |
BF_PINCTRL_DRIVE9_BANK2_PIN12_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE9_BANK2_PIN13_V , pin_voltage) |
BF_PINCTRL_DRIVE9_BANK2_PIN13_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE9_BANK2_PIN14_V , pin_voltage) |
BF_PINCTRL_DRIVE9_BANK2_PIN14_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE9_BANK2_PIN15_V , pin_voltage) |
BF_PINCTRL_DRIVE9_BANK2_PIN15_MA(pin_drive));
/* EMI_A07-12, EMI_BA0-1 */
/* Configure Bank-2 Pins 16-23 voltage and drive strength */
HW_PINCTRL_DRIVE10_CLR(
BM_PINCTRL_DRIVE10_BANK2_PIN16_V |
BM_PINCTRL_DRIVE10_BANK2_PIN16_MA |
BM_PINCTRL_DRIVE10_BANK2_PIN17_V |
BM_PINCTRL_DRIVE10_BANK2_PIN17_MA |
BM_PINCTRL_DRIVE10_BANK2_PIN18_V |
BM_PINCTRL_DRIVE10_BANK2_PIN18_MA |
BM_PINCTRL_DRIVE10_BANK2_PIN19_V |
BM_PINCTRL_DRIVE10_BANK2_PIN19_MA |
BM_PINCTRL_DRIVE10_BANK2_PIN20_V |
BM_PINCTRL_DRIVE10_BANK2_PIN20_MA |
BM_PINCTRL_DRIVE10_BANK2_PIN21_V |
BM_PINCTRL_DRIVE10_BANK2_PIN21_MA |
BM_PINCTRL_DRIVE10_BANK2_PIN22_V |
BM_PINCTRL_DRIVE10_BANK2_PIN22_MA |
BM_PINCTRL_DRIVE10_BANK2_PIN23_V |
BM_PINCTRL_DRIVE10_BANK2_PIN23_MA);
HW_PINCTRL_DRIVE10_SET(
PIN_VOL(BM_PINCTRL_DRIVE10_BANK2_PIN16_V , pin_voltage) |
BF_PINCTRL_DRIVE10_BANK2_PIN16_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE10_BANK2_PIN17_V , pin_voltage) |
BF_PINCTRL_DRIVE10_BANK2_PIN17_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE10_BANK2_PIN18_V , pin_voltage) |
BF_PINCTRL_DRIVE10_BANK2_PIN18_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE10_BANK2_PIN19_V , pin_voltage) |
BF_PINCTRL_DRIVE10_BANK2_PIN19_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE10_BANK2_PIN20_V , pin_voltage) |
BF_PINCTRL_DRIVE10_BANK2_PIN20_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE10_BANK2_PIN21_V , pin_voltage) |
BF_PINCTRL_DRIVE10_BANK2_PIN21_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE10_BANK2_PIN22_V , pin_voltage) |
BF_PINCTRL_DRIVE10_BANK2_PIN22_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE10_BANK2_PIN23_V , pin_voltage) |
BF_PINCTRL_DRIVE10_BANK2_PIN23_MA(pin_drive));
/* EMI_CAS,RAS,CE0-2,WEN,CKE */
/* Configure Bank-2 Pins 24-31 voltage and drive strength */
HW_PINCTRL_DRIVE11_CLR(
BM_PINCTRL_DRIVE11_BANK2_PIN24_V |
BM_PINCTRL_DRIVE11_BANK2_PIN24_MA |
BM_PINCTRL_DRIVE11_BANK2_PIN25_V |
BM_PINCTRL_DRIVE11_BANK2_PIN25_MA |
BM_PINCTRL_DRIVE11_BANK2_PIN26_V |
BM_PINCTRL_DRIVE11_BANK2_PIN26_MA |
BM_PINCTRL_DRIVE11_BANK2_PIN29_V |
BM_PINCTRL_DRIVE11_BANK2_PIN29_MA |
BM_PINCTRL_DRIVE11_BANK2_PIN30_V |
BM_PINCTRL_DRIVE11_BANK2_PIN30_MA |
BM_PINCTRL_DRIVE11_BANK2_PIN31_V |
BM_PINCTRL_DRIVE11_BANK2_PIN31_MA);
HW_PINCTRL_DRIVE11_SET(
PIN_VOL(BM_PINCTRL_DRIVE11_BANK2_PIN24_V , pin_voltage) |
BF_PINCTRL_DRIVE11_BANK2_PIN24_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE11_BANK2_PIN25_V , pin_voltage) |
BF_PINCTRL_DRIVE11_BANK2_PIN25_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE11_BANK2_PIN26_V , pin_voltage) |
BF_PINCTRL_DRIVE11_BANK2_PIN26_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE11_BANK2_PIN29_V , pin_voltage) |
BF_PINCTRL_DRIVE11_BANK2_PIN29_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE11_BANK2_PIN30_V , pin_voltage) |
BF_PINCTRL_DRIVE11_BANK2_PIN30_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE11_BANK2_PIN31_V , pin_voltage) |
BF_PINCTRL_DRIVE11_BANK2_PIN31_MA(pin_drive));
/* Configure Bank-2 Pins 9-15 as EMI pins */
HW_PINCTRL_MUXSEL4_CLR(
BM_PINCTRL_MUXSEL4_BANK2_PIN09 |
BM_PINCTRL_MUXSEL4_BANK2_PIN10 |
BM_PINCTRL_MUXSEL4_BANK2_PIN11 |
BM_PINCTRL_MUXSEL4_BANK2_PIN12 |
BM_PINCTRL_MUXSEL4_BANK2_PIN13 |
BM_PINCTRL_MUXSEL4_BANK2_PIN14 |
BM_PINCTRL_MUXSEL4_BANK2_PIN15);
/* Configure Bank-2 Pins 16-31 as EMI pins */
HW_PINCTRL_MUXSEL5_CLR(
BM_PINCTRL_MUXSEL5_BANK2_PIN16 |
BM_PINCTRL_MUXSEL5_BANK2_PIN17 |
BM_PINCTRL_MUXSEL5_BANK2_PIN18 |
BM_PINCTRL_MUXSEL5_BANK2_PIN19 |
BM_PINCTRL_MUXSEL5_BANK2_PIN20 |
BM_PINCTRL_MUXSEL5_BANK2_PIN21 |
BM_PINCTRL_MUXSEL5_BANK2_PIN22 |
BM_PINCTRL_MUXSEL5_BANK2_PIN23 |
BM_PINCTRL_MUXSEL5_BANK2_PIN24 |
BM_PINCTRL_MUXSEL5_BANK2_PIN25 |
BM_PINCTRL_MUXSEL5_BANK2_PIN26 |
BM_PINCTRL_MUXSEL5_BANK2_PIN29 |
BM_PINCTRL_MUXSEL5_BANK2_PIN30 |
BM_PINCTRL_MUXSEL5_BANK2_PIN31);
HW_PINCTRL_DRIVE12_CLR(
BM_PINCTRL_DRIVE12_BANK3_PIN00_V |
BM_PINCTRL_DRIVE12_BANK3_PIN00_MA |
BM_PINCTRL_DRIVE12_BANK3_PIN01_V |
BM_PINCTRL_DRIVE12_BANK3_PIN01_MA |
BM_PINCTRL_DRIVE12_BANK3_PIN02_V |
BM_PINCTRL_DRIVE12_BANK3_PIN02_MA |
BM_PINCTRL_DRIVE12_BANK3_PIN03_V |
BM_PINCTRL_DRIVE12_BANK3_PIN03_MA |
BM_PINCTRL_DRIVE12_BANK3_PIN04_V |
BM_PINCTRL_DRIVE12_BANK3_PIN04_MA |
BM_PINCTRL_DRIVE12_BANK3_PIN05_V |
BM_PINCTRL_DRIVE12_BANK3_PIN05_MA |
BM_PINCTRL_DRIVE12_BANK3_PIN06_V |
BM_PINCTRL_DRIVE12_BANK3_PIN06_MA |
BM_PINCTRL_DRIVE12_BANK3_PIN07_V |
BM_PINCTRL_DRIVE12_BANK3_PIN07_MA);
HW_PINCTRL_DRIVE12_SET(
PIN_VOL(BM_PINCTRL_DRIVE12_BANK3_PIN00_V , pin_voltage) |
BF_PINCTRL_DRIVE12_BANK3_PIN00_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE12_BANK3_PIN01_V , pin_voltage) |
BF_PINCTRL_DRIVE12_BANK3_PIN01_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE12_BANK3_PIN02_V , pin_voltage) |
BF_PINCTRL_DRIVE12_BANK3_PIN02_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE12_BANK3_PIN03_V , pin_voltage) |
BF_PINCTRL_DRIVE12_BANK3_PIN03_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE12_BANK3_PIN04_V , pin_voltage) |
BF_PINCTRL_DRIVE12_BANK3_PIN04_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE12_BANK3_PIN05_V , pin_voltage) |
BF_PINCTRL_DRIVE12_BANK3_PIN05_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE12_BANK3_PIN06_V , pin_voltage) |
BF_PINCTRL_DRIVE12_BANK3_PIN06_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE12_BANK3_PIN07_V , pin_voltage) |
BF_PINCTRL_DRIVE12_BANK3_PIN07_MA(pin_drive));
/* EMI_D08-15
Configure Bank-3 Pins 08-15 voltage and drive strength
*/
HW_PINCTRL_DRIVE13_CLR(
BM_PINCTRL_DRIVE13_BANK3_PIN08_V |
BM_PINCTRL_DRIVE13_BANK3_PIN08_MA |
BM_PINCTRL_DRIVE13_BANK3_PIN09_V |
BM_PINCTRL_DRIVE13_BANK3_PIN09_MA |
BM_PINCTRL_DRIVE13_BANK3_PIN10_V |
BM_PINCTRL_DRIVE13_BANK3_PIN10_MA |
BM_PINCTRL_DRIVE13_BANK3_PIN11_V |
BM_PINCTRL_DRIVE13_BANK3_PIN11_MA |
BM_PINCTRL_DRIVE13_BANK3_PIN12_V |
BM_PINCTRL_DRIVE13_BANK3_PIN12_MA |
BM_PINCTRL_DRIVE13_BANK3_PIN13_V |
BM_PINCTRL_DRIVE13_BANK3_PIN13_MA |
BM_PINCTRL_DRIVE13_BANK3_PIN14_V |
BM_PINCTRL_DRIVE13_BANK3_PIN14_MA |
BM_PINCTRL_DRIVE13_BANK3_PIN15_V |
BM_PINCTRL_DRIVE13_BANK3_PIN15_MA);
HW_PINCTRL_DRIVE13_SET(
PIN_VOL(BM_PINCTRL_DRIVE13_BANK3_PIN08_V , pin_voltage) |
BF_PINCTRL_DRIVE13_BANK3_PIN08_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE13_BANK3_PIN09_V , pin_voltage) |
BF_PINCTRL_DRIVE13_BANK3_PIN09_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE13_BANK3_PIN10_V , pin_voltage) |
BF_PINCTRL_DRIVE13_BANK3_PIN10_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE13_BANK3_PIN11_V , pin_voltage) |
BF_PINCTRL_DRIVE13_BANK3_PIN11_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE13_BANK3_PIN12_V , pin_voltage) |
BF_PINCTRL_DRIVE13_BANK3_PIN12_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE13_BANK3_PIN13_V , pin_voltage) |
BF_PINCTRL_DRIVE13_BANK3_PIN13_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE13_BANK3_PIN14_V , pin_voltage) |
BF_PINCTRL_DRIVE13_BANK3_PIN14_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE13_BANK3_PIN15_V , pin_voltage) |
BF_PINCTRL_DRIVE13_BANK3_PIN15_MA(pin_drive));
/* EMI_DQS0-1,DQM0-1,CLK,CLKN
Configure Bank-3 Pins 08-15 voltage and drive strength
*/
HW_PINCTRL_DRIVE14_CLR(
BM_PINCTRL_DRIVE14_BANK3_PIN16_V |
BM_PINCTRL_DRIVE14_BANK3_PIN16_MA |
BM_PINCTRL_DRIVE14_BANK3_PIN17_V |
BM_PINCTRL_DRIVE14_BANK3_PIN17_MA |
BM_PINCTRL_DRIVE14_BANK3_PIN18_V |
BM_PINCTRL_DRIVE14_BANK3_PIN18_MA |
BM_PINCTRL_DRIVE14_BANK3_PIN19_V |
BM_PINCTRL_DRIVE14_BANK3_PIN19_MA |
BM_PINCTRL_DRIVE14_BANK3_PIN20_V |
BM_PINCTRL_DRIVE14_BANK3_PIN20_MA |
BM_PINCTRL_DRIVE14_BANK3_PIN21_V |
BM_PINCTRL_DRIVE14_BANK3_PIN21_MA);
HW_PINCTRL_DRIVE14_SET(
PIN_VOL(BM_PINCTRL_DRIVE14_BANK3_PIN16_V , pin_voltage) |
BF_PINCTRL_DRIVE14_BANK3_PIN16_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE14_BANK3_PIN17_V , pin_voltage) |
BF_PINCTRL_DRIVE14_BANK3_PIN17_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE14_BANK3_PIN18_V , pin_voltage) |
BF_PINCTRL_DRIVE14_BANK3_PIN18_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE14_BANK3_PIN19_V , pin_voltage) |
BF_PINCTRL_DRIVE14_BANK3_PIN19_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE14_BANK3_PIN20_V , pin_voltage) |
BF_PINCTRL_DRIVE14_BANK3_PIN20_MA(pin_drive) |
PIN_VOL(BM_PINCTRL_DRIVE14_BANK3_PIN21_V , pin_voltage) |
BF_PINCTRL_DRIVE14_BANK3_PIN21_MA(pin_drive));
/* Configure Bank-3 Pins 0-15 as EMI pins*/
HW_PINCTRL_MUXSEL6_CLR(
BM_PINCTRL_MUXSEL6_BANK3_PIN00 |
BM_PINCTRL_MUXSEL6_BANK3_PIN01 |
BM_PINCTRL_MUXSEL6_BANK3_PIN02 |
BM_PINCTRL_MUXSEL6_BANK3_PIN03 |
BM_PINCTRL_MUXSEL6_BANK3_PIN04 |
BM_PINCTRL_MUXSEL6_BANK3_PIN05 |
BM_PINCTRL_MUXSEL6_BANK3_PIN06 |
BM_PINCTRL_MUXSEL6_BANK3_PIN07 |
BM_PINCTRL_MUXSEL6_BANK3_PIN08 |
BM_PINCTRL_MUXSEL6_BANK3_PIN09 |
BM_PINCTRL_MUXSEL6_BANK3_PIN10 |
BM_PINCTRL_MUXSEL6_BANK3_PIN11 |
BM_PINCTRL_MUXSEL6_BANK3_PIN12 |
BM_PINCTRL_MUXSEL6_BANK3_PIN13 |
BM_PINCTRL_MUXSEL6_BANK3_PIN14 |
BM_PINCTRL_MUXSEL6_BANK3_PIN15);
/* Configure Bank-3 Pins 16-21 as EMI pins */
HW_PINCTRL_MUXSEL7_CLR(
BM_PINCTRL_MUXSEL7_BANK3_PIN16 |
BM_PINCTRL_MUXSEL7_BANK3_PIN17 |
BM_PINCTRL_MUXSEL7_BANK3_PIN18 |
BM_PINCTRL_MUXSEL7_BANK3_PIN19 |
BM_PINCTRL_MUXSEL7_BANK3_PIN20 |
BM_PINCTRL_MUXSEL7_BANK3_PIN21);
}
////////////////////////////////////////////////////////////////////////////////
//! \brief Prepares the power block for the application.
//!
//! \return SUCCESS(0) Power block ready.
////////////////////////////////////////////////////////////////////////////////
//int PowerPrep( void )
int _start( void )
{
int iRtn = SUCCESS;
auart_init();
#ifndef mx28
HW_DIGCTL_CTRL_SET(BM_DIGCTL_CTRL_USE_SERIAL_JTAG);
#else
#define SSP0_PIN_DRIVE_12mA 0x2
// For EMI 200MHz,must enable SSP0 pin drive to 12mA,or the SD boot will fail.
HW_PINCTRL_DRIVE8_CLR(
BM_PINCTRL_DRIVE8_BANK2_PIN07_MA |
BM_PINCTRL_DRIVE8_BANK2_PIN06_MA |
BM_PINCTRL_DRIVE8_BANK2_PIN05_MA |
BM_PINCTRL_DRIVE8_BANK2_PIN04_MA |
BM_PINCTRL_DRIVE8_BANK2_PIN03_MA |
BM_PINCTRL_DRIVE8_BANK2_PIN02_MA |
BM_PINCTRL_DRIVE8_BANK2_PIN01_MA |
BM_PINCTRL_DRIVE8_BANK2_PIN00_MA);
HW_PINCTRL_DRIVE9_CLR(
BM_PINCTRL_DRIVE9_BANK2_PIN10_MA |
BM_PINCTRL_DRIVE9_BANK2_PIN09_MA |
BM_PINCTRL_DRIVE9_BANK2_PIN08_MA);
HW_PINCTRL_DRIVE8_SET(
(SSP0_PIN_DRIVE_12mA << BP_PINCTRL_DRIVE8_BANK2_PIN07_MA) |
(SSP0_PIN_DRIVE_12mA << BP_PINCTRL_DRIVE8_BANK2_PIN06_MA) |
(SSP0_PIN_DRIVE_12mA << BP_PINCTRL_DRIVE8_BANK2_PIN05_MA) |
(SSP0_PIN_DRIVE_12mA << BP_PINCTRL_DRIVE8_BANK2_PIN04_MA) |
(SSP0_PIN_DRIVE_12mA << BP_PINCTRL_DRIVE8_BANK2_PIN03_MA) |
(SSP0_PIN_DRIVE_12mA << BP_PINCTRL_DRIVE8_BANK2_PIN02_MA) |
(SSP0_PIN_DRIVE_12mA << BP_PINCTRL_DRIVE8_BANK2_PIN01_MA) |
(SSP0_PIN_DRIVE_12mA << BP_PINCTRL_DRIVE8_BANK2_PIN00_MA));
HW_PINCTRL_DRIVE9_SET(
(SSP0_PIN_DRIVE_12mA << BP_PINCTRL_DRIVE9_BANK2_PIN10_MA) |
(SSP0_PIN_DRIVE_12mA << BP_PINCTRL_DRIVE9_BANK2_PIN09_MA) |
(SSP0_PIN_DRIVE_12mA << BP_PINCTRL_DRIVE9_BANK2_PIN08_MA));
#endif
PowerPrep_CPUClock2XTAL();
PowerPrep_ClearAutoRestart();
hw_power_SetPowerClkGate( false );
printf("\r\nPowerPrep start initialize power...\r\n");
HW_POWER_VDDDCTRL.B.LINREG_OFFSET = HW_POWER_LINREG_OFFSET_STEP_BELOW;
HW_POWER_VDDACTRL.B.LINREG_OFFSET = HW_POWER_LINREG_OFFSET_STEP_BELOW;
HW_POWER_VDDIOCTRL.B.LINREG_OFFSET = HW_POWER_LINREG_OFFSET_STEP_BELOW;
// Ready the power block for 5V detection.
PowerPrep_Setup5vDetect();
PowerPrep_SetupBattDetect();
// Ensure the power source that turned on the device is sufficient to
// power the device.
PowerPrep_ConfigurePowerSource();
PowerPrep_EnableOutputRailProtection();
/* 3.3V is necessary to achieve best power supply capability
* and best EMI I/O performance.
*/
ddi_power_SetVddio(3300, 3150);
#ifdef mx28
ddi_power_SetVddd(1350, 1200);
#endif
HW_POWER_CTRL_CLR(BM_POWER_CTRL_VDDD_BO_IRQ |
BM_POWER_CTRL_VDDA_BO_IRQ |
BM_POWER_CTRL_VDDIO_BO_IRQ |
BM_POWER_CTRL_VDD5V_DROOP_IRQ |
BM_POWER_CTRL_VBUSVALID_IRQ |
BM_POWER_CTRL_BATT_BO_IRQ |
BM_POWER_CTRL_DCDC4P2_BO_IRQ
);
/* If Battery not ready,setup the auto power down if we lost 5V.*/
if (!bBatteryReady)
HW_POWER_5VCTRL_SET(BM_POWER_5VCTRL_PWDN_5VBRNOUT);
return iRtn;
}