/**************************************************************************************************
* @fn macBackoffTimerPwrNotify
*
* @brief power state transition notify callback function
*
* @param eventType transition event type
* @param data not used
*
* @return Power_NOTIFYDONE
**************************************************************************************************
*/
static Power_NotifyResponse macBackoffTimerPwrNotify(Power_Event eventType,
UArg data)
{
if (eventType == Power_AWAKE_STANDBY)
{
/* Wakeup must be handled from the thread context.
* Signal the event to the OSAL thread. */
halIntState_t is;
HAL_ENTER_CRITICAL_SECTION(is);
macBackoffTimerEvents |= MAC_BACKOFF_TIMER_EVENT_POWER_WAKEUP;
HAL_EXIT_CRITICAL_SECTION(is);
osal_set_event(macTaskId, 0);
}
else if (eventType == Power_ENTERING_STANDBY)
{
/* Stop RAT timer */
macRATValue = macStopRAT();
/* Park CM0 */
MAC_RADIO_POWER_DOWN();
Hwi_disableInterrupt( INT_RF_CPE0 );
Hwi_disableInterrupt( INT_RF_CPE1 );
Hwi_disableInterrupt( INT_RF_HW );
Hwi_disableInterrupt( INT_RF_CMD_ACK );
}
else if (eventType == Power_ENTERING_SHUTDOWN)
{
/* Park CM0 */
MAC_RADIO_POWER_DOWN();
}
return Power_NOTIFYDONE;
}
/*!
* ======== InterruptDucati_intDisable ========
* Disables remote processor interrupt
*/
Void InterruptDucati_intDisable(UInt16 remoteProcId,
IInterrupt_IntInfo *intInfo)
{
/*
* If the remote processor communicates via mailboxes, we should disable
* the Mailbox IRQ instead of disabling the Hwi because multiple mailboxes
* share the same Hwi
*/
if ((BIOS_smpEnabled) || (Core_getId() == 0)) {
if (remoteProcId == InterruptDucati_hostProcId) {
REG32(MAILBOX_IRQENABLE_CLR_VIDEO) = MAILBOX_REG_VAL(HOST_TO_VIDEO);
}
else if (remoteProcId == InterruptDucati_dspProcId) {
REG32(MAILBOX_IRQENABLE_CLR_VIDEO) = MAILBOX_REG_VAL(DSP_TO_VIDEO);
}
else {
Hwi_disableInterrupt(M3INT);
}
}
else {
if (remoteProcId == InterruptDucati_hostProcId) {
REG32(MAILBOX_IRQENABLE_CLR_VPSS) = MAILBOX_REG_VAL(HOST_TO_VPSS);
}
else if (remoteProcId == InterruptDucati_dspProcId) {
REG32(MAILBOX_IRQENABLE_CLR_VPSS) = MAILBOX_REG_VAL(DSP_TO_VPSS);
}
else {
Hwi_disableInterrupt(M3INT);
}
}
}
/*
* ======== Timer_stop ========
* 1. stop timer
* 2. disable timer interrupt
*/
Void Timer_stop(Timer_Object *obj)
{
timerDevices[obj->id].cntl &= ~TIMER_CNTL_START;
if (obj->hwi) {
Hwi_disableInterrupt(obj->intNum);
}
}
/*
* ======== Timer_stop ========
* 1. stop timer
* 2. disable timer interrupt
*/
Void Timer_stop(Timer_Object *obj)
{
Hwi_nvic.STCSR = 0;
if (obj->hwi) {
Hwi_disableInterrupt(obj->intNum);
}
}
/*
* ======== Timer_initDevice ========
*/
Void Timer_initDevice(Timer_Object *obj, Error_Block *eb)
{
TimerRegs *timer;
UInt hwiKey;
Timer_TimerSupportProxy_enable(obj->id, eb);
timer = (TimerRegs *)Timer_module->device[obj->id].baseAddr;
hwiKey = Hwi_disable();
timer->tclr = 0;
while (timer->twps & TIMER_TWPS_W_PEND_TCLR)
;
timer->tcrr = 0;
while (timer->twps & TIMER_TWPS_W_PEND_TCRR)
;
timer->tldr = 0;
while (timer->twps & TIMER_TWPS_W_PEND_TLDR)
;
if (obj->hwi) {
/* clear any previously latched timer interrupts */
Hwi_clearInterrupt(obj->intNum);
Hwi_disableInterrupt(obj->intNum);
}
Hwi_restore(hwiKey);
}
/*
* ======== Hwi_reconfig ========
* Reconfigure a dispatched interrupt.
*/
Void Hwi_reconfig(Hwi_Object *hwi, Hwi_FuncPtr fxn, const Hwi_Params *params)
{
UInt intNum;
for (intNum = 0; intNum < Hwi_NUM_INTERRUPTS; intNum++) {
if (Hwi_module->dispatchTable[intNum] == hwi) {
break;
}
}
Hwi_disableInterrupt(intNum);
hwi->fxn = fxn;
hwi->arg = params->arg;
hwi->sense = params->sense;
hwi->type = params->type;
hwi->priority = params->priority;
Hwi_setSense(intNum, hwi->sense);
Hwi_setType(intNum, hwi->type);
Hwi_setPriority(intNum, hwi->priority);
if (params->enableInt) {
Hwi_enableInterrupt(intNum);
}
}
/*
* ======== Timer_stop ========
* 1. stop timer
* 2. disable timer interrupt
*/
Void Timer_stop(Timer_Object *obj)
{
CTM_ctm.CTCR[obj->ctmid] = 2; /* reset, stop, disable */
if (obj->hwi) {
Hwi_disableInterrupt(obj->intNum);
}
}
/*
* ======== Hwi_RestoreInterrupt ========
*/
Void Hwi_restoreInterrupt(UInt intNum, UInt key)
{
if (key & (1 << (intNum))) {
Hwi_enableInterrupt(intNum);
}
else {
Hwi_disableInterrupt(intNum);
}
}
/*
* ======== Hwi_reconfig ========
* Reconfigure a dispatched interrupt.
*/
Void Hwi_reconfig(Hwi_Object *hwi, Hwi_FuncPtr fxn, const Hwi_Params *params)
{
UInt intNum;
Int priority;
for (intNum = 0; intNum < Hwi_NUM_INTERRUPTS; intNum++) {
if (Hwi_module->dispatchTable[intNum] == hwi) {
break;
}
}
Hwi_disableInterrupt(intNum);
hwi->fxn = fxn;
hwi->arg = params->arg;
priority = params->priority;
/*
* the -1 sentinel priority is the default passed by hal Hwi_create().
* Translate it to 31, which is our default priority.
*/
if (priority == -1) {
priority = 31;
}
Hwi_module->priorities[intNum] = priority;
Hwi_setPriority(intNum, priority);
Assert_isTrue((params->maskSetting != Hwi_MaskingOption_BITMASK),
Hwi_A_unsupportedMaskingOption);
switch (params->maskSetting) {
case Hwi_MaskingOption_NONE:
hwi->handler = Hwi_handlerNONE;
break;
case Hwi_MaskingOption_ALL:
hwi->handler = Hwi_handlerALL;
break;
case Hwi_MaskingOption_LOWER:
hwi->handler = Hwi_handlerLOWER;
break;
case Hwi_MaskingOption_BITMASK:
case Hwi_MaskingOption_SELF:
hwi->handler = Hwi_handlerSELF;
break;
}
if (params->enableInt) {
Hwi_enableInterrupt(intNum);
}
}
/*
* ======== Timer_stop ========
* 1. stop timer
* 2. disable timer interrupt
*/
Void Timer_stop(Timer_Object *obj)
{
ti_catalog_arm_peripherals_timers_TimerRegsM4 *timer;
timer = (ti_catalog_arm_peripherals_timers_TimerRegsM4 *)Timer_module->device[obj->id].baseAddr;
/* stop timer by clearing bit0 (TAEN) */
Timer_write(obj->altclk, &timer->GPTMCTL, timer->GPTMCTL & ~0x1);
if (obj->hwi) {
Hwi_disableInterrupt(obj->intNum);
}
}
/*
* ======== Hwi_reconfig ========
* Reconfigure a dispatched interrupt.
*/
Void Hwi_reconfig(Hwi_Object *hwi, Hwi_FuncPtr fxn, const Hwi_Params *params)
{
UInt intNum;
for (intNum = 0; intNum < Hwi_NUM_INTERRUPTS; intNum++) {
if (Hwi_module->dispatchTable[intNum] == hwi) {
break;
}
}
if (intNum == Hwi_NUM_INTERRUPTS) {
Error_raise(NULL, Hwi_E_handleNotFound, hwi, 0);
return;
}
Hwi_disableInterrupt(intNum);
hwi->fxn = fxn;
hwi->arg = params->arg;
switch (params->maskSetting) {
case Hwi_MaskingOption_NONE:
hwi->disableMask = 0;
hwi->restoreMask = 0;
break;
case Hwi_MaskingOption_ALL:
hwi->disableMask = 0xffff;
hwi->restoreMask = 0xffff;
break;
default:
case Hwi_MaskingOption_SELF:
hwi->disableMask = 1 << intNum;
hwi->restoreMask = 1 << intNum;
break;
case Hwi_MaskingOption_BITMASK:
hwi->disableMask = params->disableMask;
hwi->restoreMask = params->restoreMask;
break;
}
if (params->eventId != -1) {
Hwi_eventMap(intNum, params->eventId);
}
/* keep intEvents[] current for ROV */
Hwi_module->intEvents[intNum] = Hwi_getEventId(intNum);
if (params->enableInt) {
Hwi_enableInterrupt(intNum);
}
}
/*
* ======== Timer_stop ========
* 1. stop timer
* 2. disable timer interrupt
*/
Void Timer_stop(Timer_Object *obj)
{
if (obj->id == 0) { /* SysTick Timer */
Hwi_nvic.STCSR = 0;
}
else { /* CTM Timer */
CTM_ctm.CTCR[obj->ctmid] = 2; /* reset, stop, disable */
}
if (obj->hwi) {
Hwi_disableInterrupt(obj->intNum);
}
}
/*!
* ======== InterruptM3_intDisable ========
* Disables remote processor interrupt
*/
Void InterruptM3_intDisable()
{
/*
* If the remote processor communicates via mailboxes, we should disable
* the Mailbox IRQ instead of disabling the Hwi because multiple mailboxes
* share the same Hwi
*/
if (Core_getId() == 0) {
REG32(MAILBOX_IRQENABLE_CLR_M3) = MAILBOX_REG_VAL(SYSM3_MBX);
}
else {
Hwi_disableInterrupt(M3INT);
}
}
/* ======== Timer_initDevice ========
* 1. stop timer
* 2. disable timer interrupt. (IER and any timer specific interrupt enable)
* 3. clear pending interrupt. (IFR and any timer specific interrupt flags)
* 4. Set control registers back to reset value.
* 5. clear counters
* 6. clear period register.
*/
Void Timer_initDevice(Timer_Object *obj)
{
UInt key;
key = Hwi_disable();
CTM_ctm.CTCR[obj->ctmid] = 2; /* reset, stop, disable */
if (obj->hwi) {
Hwi_disableInterrupt(obj->intNum);
Hwi_clearInterrupt(obj->intNum);
}
Hwi_restore(key);
}
/*
* ======== Hwi_Instance_finalize ========
* Here on Hwi_delete() or failed Hwi_create().
*/
Void Hwi_Instance_finalize(Hwi_Object *hwi, Int status)
{
Int i, cnt;
UInt intNum;
if (status == 1) { /* failed early in Hwi_Instance_init() */
return;
}
for (intNum = 0; intNum < Hwi_NUM_INTERRUPTS; intNum++) {
if (Hwi_module->dispatchTable[intNum] == hwi) {
break;
}
}
if (intNum == Hwi_NUM_INTERRUPTS) {
Error_raise(NULL, Hwi_E_handleNotFound, hwi, 0);
return; /* never reached, but keep Coverity happy */
}
Hwi_disableInterrupt(intNum);
Hwi_module->dispatchTable[intNum] = NULL;
Hwi_plug(intNum, Hwi_unPluggedInterrupt);
if (status == 2) { /* failed mid-way into Hwi_Instance_init() */
return;
}
#ifndef ti_sysbios_hal_Hwi_DISABLE_ALL_HOOKS
if (Hwi_hooks.length > 0) {
if (status == 0) {
cnt = Hwi_hooks.length;
}
else {
cnt = status - 3; /* failed within hook init */
}
for (i = 0; i < cnt; i++) {
if (Hwi_hooks.elem[i].deleteFxn != NULL) {
Hwi_hooks.elem[i].deleteFxn((IHwi_Handle)hwi);
}
}
Memory_free(Hwi_Object_heap(), hwi->hookEnv,
Hwi_hooks.length * sizeof(Ptr));
}
#endif
}
/* ======== initDevice ========
* 1. stop timer
* 2. disable timer interrupt. (IER and any timer specific interrupt enable)
* 3. clear pending interrupt. (IFR and any timer specific interrupt flags)
* 4. Set control registers back to reset value.
* 5. clear counters
* 6. clear period register.
*/
static Void initDevice(Timer_Object *obj)
{
UInt key;
key = Hwi_disable();
timerDevices[obj->id].cntl = obj->controlRegInit;
if (obj->hwi) {
Hwi_disableInterrupt(obj->intNum);
Hwi_clearInterrupt(obj->intNum);
}
timerDevices[obj->id].load = 0;
timerDevices[obj->id].read = 0;
Hwi_restore(key);
}
/* ======== initDevice ========
* 1. stop timer
* 2. disable timer interrupt. (IER and any timer specific interrupt enable)
* 3. clear pending interrupt. (IFR and any timer specific interrupt flags)
* 4. Set control registers back to reset value.
* 5. clear counters
* 6. clear period register.
*/
static Void initDevice(Timer_Object *obj)
{
UInt key;
key = Hwi_disable();
Hwi_nvic.STCSR = 0; /* stop the timer */
Hwi_nvic.STRVR = 0; /* reset reload value */
Hwi_nvic.STCVR = 0; /* reset current value */
if (obj->hwi) {
Hwi_disableInterrupt(obj->intNum);
Hwi_clearInterrupt(obj->intNum);
}
Hwi_restore(key);
}
/*
* ======== Hwi_Instance_finalize ========
*/
Void Hwi_Instance_finalize(Hwi_Object *hwi, Int status)
{
#ifndef ti_sysbios_hal_Hwi_DISABLE_ALL_HOOKS
Int i, cnt;
#endif
UInt intNum;
for (intNum = 0; intNum < Hwi_NUM_INTERRUPTS; intNum++) {
if (Hwi_module->dispatchTable[intNum] == hwi) {
break;
}
}
if (intNum == Hwi_NUM_INTERRUPTS) {
Error_raise(NULL, Hwi_E_handleNotFound, hwi, 0);
return;
}
Hwi_disableInterrupt(intNum);
Hwi_module->dispatchTable[intNum] =
ti_sysbios_family_arm_gic_Hwi_Module_State_nonPluggedHwi();
if (status == 1) { /* failed Hwi_create */
return;
}
#ifndef ti_sysbios_hal_Hwi_DISABLE_ALL_HOOKS
if (Hwi_hooks.length > 0) {
if (status == 0) {
cnt = Hwi_hooks.length;
}
else {
cnt = status - 2;
}
for (i = 0; i < cnt; i++) {
if (Hwi_hooks.elem[i].deleteFxn != NULL) {
Hwi_hooks.elem[i].deleteFxn((IHwi_Handle)hwi);
}
}
Memory_free(Hwi_Object_heap(), hwi->hookEnv,
Hwi_hooks.length * sizeof(Ptr));
}
#endif
}
/* ======== Timer_initDevice ========
* 1. stop timer
* 2. disable timer interrupt. (IER and any timer specific interrupt enable)
* 3. clear pending interrupt. (IFR and any timer specific interrupt flags)
* 4. Set control registers back to reset value.
* 5. clear counters
* 6. clear period register.
*/
Void Timer_initDevice(Timer_Object *obj)
{
UInt key;
ti_catalog_arm_peripherals_timers_TimerRegsM4 *timer;
timer = (ti_catalog_arm_peripherals_timers_TimerRegsM4 *)
Timer_module->device[obj->id].baseAddr;
key = Hwi_disable();
if (obj->hwi) {
Hwi_disableInterrupt(obj->intNum);
Hwi_clearInterrupt(obj->intNum);
}
/* mode setting purposely delayed a while after finishing reset */
Timer_write(obj->altclk, &timer->GPTMCFG, 0); /* force 32 bit timer mode */
Hwi_restore(key);
}
/*
* ======== Hwi_Instance_finalize ========
* Here on Hwi_delete() or failed Hwi_create().
*/
Void Hwi_Instance_finalize(Hwi_Object *hwi, Int status)
{
Int i, cnt;
UInt intNum;
for (intNum = 0; intNum < Hwi_NUM_INTERRUPTS; intNum++) {
if (Hwi_module->dispatchTable[intNum] == hwi) {
break;
}
}
/* Kill the interrupt */
Hwi_disableInterrupt(intNum);
/* null out the dispatch table entry */
Hwi_module->dispatchTable[intNum] = NULL;
if (status == 1) { /* failed Hwi_create */
return;
}
#ifndef ti_sysbios_hal_Hwi_DISABLE_ALL_HOOKS
if (Hwi_hooks.length > 0) {
if (status == 0) {
cnt = Hwi_hooks.length;
}
else {
cnt = status - 2;
}
for (i = 0; i < cnt; i++) {
if (Hwi_hooks.elem[i].deleteFxn != NULL) {
Hwi_hooks.elem[i].deleteFxn((IHwi_Handle)hwi);
}
}
Memory_free(Hwi_Object_heap(), hwi->hookEnv,
Hwi_hooks.length * sizeof(Ptr));
}
#endif
}
/*
* ======== Timer_stop ========
* 1. stop timer
* 2. disable timer interrupt
*/
Void Timer_stop(Timer_Object *obj)
{
Bits32 tisr;
TimerRegs *timer;
timer = (TimerRegs *)Timer_module->device[obj->id].baseAddr;
timer->tclr &= TIMER_TCLR_STOP_MASK;
while (timer->twps & TIMER_TWPS_W_PEND_TCLR)
;
if (obj->hwi) {
Hwi_disableInterrupt(obj->intNum);
}
tisr = timer->tisr;
if (tisr) {
timer->tisr = tisr;
}
}
/* ======== initDevice ========
* 1. stop timer
* 2. disable timer interrupt. (IER and any timer specific interrupt enable)
* 3. clear pending interrupt. (IFR and any timer specific interrupt flags)
* 4. Set control registers back to reset value.
* 5. clear counters
* 6. clear period register.
*/
static Void initDevice(Timer_Object *obj)
{
UInt key;
key = Hwi_disable();
if (obj->id == 0) { /* SysTick */
Hwi_nvic.STCSR = 0; /* stop the timer */
Hwi_nvic.STRVR = 0; /* reset reload value */
Hwi_nvic.STCVR = 0; /* reset current value */
}
else { /* CTM Timer */
CTM_ctm.CTCR[obj->ctmid] = 2; /* reset, stop, disable */
}
if (obj->hwi) {
Hwi_disableInterrupt(obj->intNum);
Hwi_clearInterrupt(obj->intNum);
}
Hwi_restore(key);
}
/*
* ======== Hwi_reconfig ========
* Reconfigure a dispatched interrupt.
*/
Void Hwi_reconfig(Hwi_Object *hwi, Hwi_FuncPtr fxn, const Hwi_Params *params)
{
UInt intNum;
for (intNum = 0; intNum < Hwi_NUM_INTERRUPTS; intNum++) {
if (Hwi_module->dispatchTable[intNum] == hwi) {
break;
}
}
Hwi_disableInterrupt(intNum);
hwi->fxn = fxn;
hwi->arg = params->arg;
switch (params->maskSetting) {
case Hwi_MaskingOption_NONE:
hwi->disableMask = 0;
hwi->restoreMask = 0;
break;
case Hwi_MaskingOption_ALL:
hwi->disableMask = 0xffff;
hwi->restoreMask = 0xffff;
break;
default:
case Hwi_MaskingOption_SELF:
hwi->disableMask = 1 << intNum;
hwi->restoreMask = 1 << intNum;
break;
case Hwi_MaskingOption_BITMASK:
hwi->disableMask = params->disableMask;
hwi->restoreMask = params->restoreMask;
break;
}
if (params->enableInt) {
Hwi_enableInterrupt(intNum);
}
}
BOOL Intr_DisableEvent(Intr *pThis)
{
//CSL_Status intStat;
//If CIC Event is provided in the Interrupt table
if(pThis->oIntrTableParam.bCicRequired == TRUE)
{
CpIntc_disableHostInt(0, pThis->oIntrTableParam.HostInt);//newly added for new Chip
CpIntc_disableSysInt(0, pThis->oIntrTableParam.SysInt);//newly added for new Chip
//intStat = CSL_cicHwControl(pThis->CicHandle, CSL_CIC_CMD_EVTDISABLE, NULL); //disabled for new Chip
//if(intStat != CSL_SOK)
//{
// #ifdef _STE_APP
// LOG_TRACE0( "INTR : CIC HwControl to disable event ... Failed.\n");
// #endif
// return FALSE;
//}
}
#ifdef _STE_APP
//Disable the Vector interrupt
//C64_disableIER(1 << pThis->oIntrTableParam.eIntcVectorId );// DSP BIOS API
Hwi_disableInterrupt(pThis->oIntrTableParam.eIntcVectorId);// SYS BIOS API
#endif
#ifdef _STE_BOOT
intStat = CSL_intcHwControl(pThis->oIntcHandle, CSL_INTC_CMD_EVTDISABLE, NULL);
if(intStat != CSL_SOK)
{
#ifdef DEBUG
printf("INTR: HwControl to disable event ... Failed.\n");
#endif
}
#endif
return TRUE;
}
/*
* ======== osi_RegisterInterruptHandler ========
* SimpleLink Host Driver API to register a function to handle network
* processor interrupts.
*/
int osi_RegisterInterruptHandler(P_EVENT_HANDLER InterruptHdl , void *pValue)
{
WiFiCC3100_Object *object = wifiHandle->object;
#if !defined(MSP430WARE)
WiFiCC3100_HWAttrs const *hwAttrs = wifiHandle->hwAttrs;
#endif
if(InterruptHdl == NULL) {
#if !defined(MSP430WARE)
Hwi_disableInterrupt(hwAttrs->irqIntNum);
Hwi_clearInterrupt(hwAttrs->irqIntNum);
#endif
object->wifiIntFxn = NULL;
}
else {
object->wifiIntFxn = InterruptHdl;
#if !defined(MSP430WARE)
Hwi_enableInterrupt(hwAttrs->irqIntNum);
#endif
}
return (0);
}
/*!
* @brief Function to start a transfer from the CC26XX I2C peripheral specified
* by the I2C handle.
*
* This function is used for both transmitting and receiving data. If the I2C
* is configured in ::I2C_MODE_CALLBACK mode, it is possible to chain transactions
* together and receive a callback when all transactions are done.
* When active I2C transactions exist, the device might enter idle, not standby.
*
* @pre I2CCC26XX_open() has to be called first.
* Calling context: Hwi and Swi (only if using ::I2C_MODE_CALLBACK), Task
*
* @param handle An I2C_Handle returned by I2C_open()
*
* @param transaction Pointer to a I2C transaction object
*
* @return TRUE on successful transfer.
* FALSE on an error, such as a I2C bus fault.
*
* @note The generic I2C API should be used when accessing the I2CCC26XX.
*
* @sa I2CCC26XX_open(), I2C_transfer()
*/
bool I2CCC26XX_transfer(I2C_Handle handle,
I2C_Transaction *transaction)
{
bool ret = false;
UInt key;
I2CCC26XX_Object *object;
I2CCC26XX_HWAttrs const *hwAttrs;
/* Get the pointer to the object and hwAttrs */
object = handle->object;
hwAttrs = handle->hwAttrs;
/* Check if anything needs to be written or read */
if ((!transaction->writeCount) && (!transaction->readCount)) {
/* Nothing to write or read */
return (ret);
}
if (object->transferMode == I2C_MODE_CALLBACK) {
/* Check if a transfer is in progress */
key = Hwi_disable();
if (object->headPtr) {
/* Transfer in progress */
/*
* Update the message pointed by the tailPtr to point to the next
* message in the queue
*/
object->tailPtr->nextPtr = transaction;
/* Update the tailPtr to point to the last message */
object->tailPtr = transaction;
/* I2C is still being used */
Hwi_restore(key);
return (true);
}
else {
/* Store the headPtr indicating I2C is in use */
object->headPtr = transaction;
object->tailPtr = transaction;
}
Hwi_restore(key);
}
/* Set standby disallow constraint. */
threadSafeStdbyDisSet();
/* Acquire the lock for this particular I2C handle */
Semaphore_pend(Semaphore_handle(&(object->mutex)), BIOS_WAIT_FOREVER);
/*
* I2CCC26XX_primeTransfer is a longer process and
* protection is needed from the I2C interrupt
*/
Hwi_disableInterrupt(hwAttrs->intNum);
I2CCC26XX_primeTransfer(handle, transaction);
Hwi_enableInterrupt(hwAttrs->intNum);
if (object->transferMode == I2C_MODE_BLOCKING) {
Log_print1(Diags_USER1,
"I2C:(%p) Pending on transferComplete semaphore",
hwAttrs->baseAddr);
/*
* Wait for the transfer to complete here.
* It's OK to block from here because the I2C's Hwi will unblock
* upon errors
*/
Semaphore_pend(Semaphore_handle(&(object->transferComplete)), BIOS_WAIT_FOREVER);
/* Release standby disallow constraint. */
threadSafeStdbyDisRelease();
Log_print1(Diags_USER1,
"I2C:(%p) Transaction completed",
hwAttrs->baseAddr);
/* Hwi handle has posted a 'transferComplete' check for Errors */
if (object->mode == I2CCC26XX_IDLE_MODE) {
Log_print1(Diags_USER1,
"I2C:(%p) Transfer OK",
hwAttrs->baseAddr);
ret = true;
}
}
else {
/* Always return true if in Asynchronous mode */
ret = true;
}
/* Release the lock for this particular I2C handle */
Semaphore_post(Semaphore_handle(&(object->mutex)));
/* Return status */
return (ret);
}
/*
* ======== Hwi_reconfig ========
* Reconfigure a dispatched interrupt.
*/
Void Hwi_reconfig(Hwi_Object *hwi, Hwi_FuncPtr fxn, const Hwi_Params *params)
{
UInt intNum;
for (intNum = 0; intNum < Hwi_NUM_INTERRUPTS; intNum++) {
if (Hwi_module->dispatchTable[intNum] == hwi) {
break;
}
}
Hwi_disableInterrupt(intNum);
hwi->fxn = fxn;
hwi->arg = params->arg;
/*
* The -1 sentinel priority is the default passed by hal Hwi_create().
* Priority is the same as the intNum by default.
*/
if (params->priority == -1) {
hwi->priority = intNum;
}
else {
hwi->priority = params->priority;
}
hwi->type = params->type;
switch (params->maskSetting) {
case Hwi_MaskingOption_NONE:
hwi->disableMask0 = 0;
hwi->disableMask1 = 0;
hwi->restoreMask0 = 0;
hwi->restoreMask1 = 0;
break;
case Hwi_MaskingOption_ALL:
hwi->disableMask0 = 0xffffffff;
hwi->disableMask1 = 0xffffffff;
hwi->restoreMask0 = 0xffffffff;
hwi->restoreMask1 = 0xffffffff;
break;
default:
case Hwi_MaskingOption_SELF:
if (intNum < 32) {
hwi->disableMask0 = 1 << intNum;
hwi->disableMask1 = 0;
hwi->restoreMask0 = 1 << intNum;
hwi->restoreMask1 = 0;
}
else {
hwi->disableMask0 = 0;
hwi->disableMask1 = 1 << intNum%32;
hwi->restoreMask0 = 0;
hwi->restoreMask1 = 1 << intNum%32;
}
break;
case Hwi_MaskingOption_BITMASK:
hwi->disableMask0 = params->disableMask0;
hwi->disableMask1 = params->disableMask1;
hwi->restoreMask0 = params->restoreMask0;
hwi->restoreMask1 = params->restoreMask1;
break;
}
if (params->enableInt) {
Hwi_enableInterrupt(intNum);
}
}
/*!
* ======== InterruptDsp_intDisable ========
* Disables GPP interrupt
*/
Void InterruptDsp_intDisable(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo)
{
Hwi_disableInterrupt(intInfo->intVectorId);
}
/*!
* ======== InterruptHost_intDisable ========
*/
Void InterruptHost_intDisable(UInt16 remoteProcId, IInterrupt_IntInfo *intInfo)
{
Hwi_disableInterrupt(HOSTINT);
}
/*!
* ======== InterruptArp32_intDisable ========
* Disables remote processor interrupt
*/
Void InterruptArp32_intDisable(UInt16 remoteProcId,
IInterrupt_IntInfo *intInfo)
{
REG32(MAILBOX_IRQENABLE_CLR(MBX_INTR_TO_ARP32)) = MAILBOX_REG_VAL(DSP_TO_ARP32);
Hwi_disableInterrupt(ARP32INT);
}
