void I2C_SLAVE_IRQHandler(void) { uint8_t status = I2C_SlaveGetStatusFlags(EXAMPLE_I2C_SLAVE_BASEADDR); /* Clear pending flag. */ EXAMPLE_I2C_SLAVE_BASEADDR->S = kI2C_IntPendingFlag; if (status & kI2C_AddressMatchFlag) { /* Slave transmit, master reading from slave. */ if (status & kI2C_TransferDirectionFlag) { /* Change direction to send data. */ EXAMPLE_I2C_SLAVE_BASEADDR->C1 |= I2C_C1_TX_MASK; /* Start to send data in tx buffer. */ g_slaveTxIndex = 0; } else { /* Slave receive, master writing to slave. */ EXAMPLE_I2C_SLAVE_BASEADDR->C1 &= ~(I2C_C1_TX_MASK | I2C_C1_TXAK_MASK); /* Read dummy to free the bus. */ EXAMPLE_I2C_SLAVE_BASEADDR->D; return; } } if (g_slaveTxIndex == I2C_DATA_LENGTH) { /* Change to RX mode when send out all data in tx buffer. */ EXAMPLE_I2C_SLAVE_BASEADDR->C1 &= ~(I2C_C1_TX_MASK | I2C_C1_TXAK_MASK); /* Read dummy to release bus. */ EXAMPLE_I2C_SLAVE_BASEADDR->D; } /* If tx Index < I2C_DATA_LENGTH, master receive->slave send transfer is ongoing. */ if (g_slaveTxIndex < I2C_DATA_LENGTH) { EXAMPLE_I2C_SLAVE_BASEADDR->D = g_slave_buff[g_slaveTxIndex]; g_slaveTxIndex++; } /* If rx Index < I2C_DATA_LENGTH, slave receive->master send transfer is ongoing. */ if (g_slaveRxIndex < I2C_DATA_LENGTH) { /* Send NAK at the last byte. */ if (g_slaveRxIndex == (I2C_DATA_LENGTH - 1U)) { EXAMPLE_I2C_SLAVE_BASEADDR->C1 |= I2C_C1_TXAK_MASK; } g_slave_buff[g_slaveRxIndex] = EXAMPLE_I2C_SLAVE_BASEADDR->D; g_slaveRxIndex++; } }
int i2c_slave_receive(i2c_t *obj) { uint32_t status_flags = I2C_SlaveGetStatusFlags(i2c_addrs[obj->instance]); if (status_flags & kI2C_AddressMatchFlag) { if (status_flags & kI2C_TransferDirectionFlag) { // read addressed return 1; } else { // write addressed return 3; } } else { // slave not addressed return 0; } }