/* Scan rtx X for references to elimination source or target registers
in contexts that would prevent the elimination from happening.
Update the table of eliminables to reflect the changed state.
MEM_MODE is the mode of an enclosing MEM rtx, or VOIDmode if not
within a MEM. */
static void
mark_not_eliminable (rtx x, machine_mode mem_mode)
{
enum rtx_code code = GET_CODE (x);
struct lra_elim_table *ep;
int i, j;
const char *fmt;
switch (code)
{
case PRE_INC:
case POST_INC:
case PRE_DEC:
case POST_DEC:
case POST_MODIFY:
case PRE_MODIFY:
if (XEXP (x, 0) == stack_pointer_rtx
&& ((code != PRE_MODIFY && code != POST_MODIFY)
|| (GET_CODE (XEXP (x, 1)) == PLUS
&& XEXP (x, 0) == XEXP (XEXP (x, 1), 0)
&& CONST_INT_P (XEXP (XEXP (x, 1), 1)))))
{
int size = GET_MODE_SIZE (mem_mode);
#ifdef PUSH_ROUNDING
/* If more bytes than MEM_MODE are pushed, account for
them. */
size = PUSH_ROUNDING (size);
#endif
if (code == PRE_DEC || code == POST_DEC)
curr_sp_change -= size;
else if (code == PRE_INC || code == POST_INC)
curr_sp_change += size;
else if (code == PRE_MODIFY || code == POST_MODIFY)
curr_sp_change += INTVAL (XEXP (XEXP (x, 1), 1));
}
else if (REG_P (XEXP (x, 0))
&& REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER)
{
/* If we modify the source of an elimination rule, disable
it. Do the same if it is the destination and not the
hard frame register. */
for (ep = reg_eliminate;
ep < ®_eliminate[NUM_ELIMINABLE_REGS];
ep++)
if (ep->from_rtx == XEXP (x, 0)
|| (ep->to_rtx == XEXP (x, 0)
&& ep->to_rtx != hard_frame_pointer_rtx))
setup_can_eliminate (ep, false);
}
return;
case USE:
if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
/* If using a hard register that is the source of an eliminate
we still think can be performed, note it cannot be
performed since we don't know how this hard register is
used. */
for (ep = reg_eliminate;
ep < ®_eliminate[NUM_ELIMINABLE_REGS];
ep++)
if (ep->from_rtx == XEXP (x, 0)
&& ep->to_rtx != hard_frame_pointer_rtx)
setup_can_eliminate (ep, false);
return;
case CLOBBER:
if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
/* If clobbering a hard register that is the replacement
register for an elimination we still think can be
performed, note that it cannot be performed. Otherwise, we
need not be concerned about it. */
for (ep = reg_eliminate;
ep < ®_eliminate[NUM_ELIMINABLE_REGS];
ep++)
if (ep->to_rtx == XEXP (x, 0)
&& ep->to_rtx != hard_frame_pointer_rtx)
setup_can_eliminate (ep, false);
return;
case SET:
if (SET_DEST (x) == stack_pointer_rtx
&& GET_CODE (SET_SRC (x)) == PLUS
&& XEXP (SET_SRC (x), 0) == SET_DEST (x)
&& CONST_INT_P (XEXP (SET_SRC (x), 1)))
{
curr_sp_change += INTVAL (XEXP (SET_SRC (x), 1));
return;
}
if (! REG_P (SET_DEST (x))
|| REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER)
mark_not_eliminable (SET_DEST (x), mem_mode);
else
{
/* See if this is setting the replacement hard register for
an elimination.
If DEST is the hard frame pointer, we do nothing because
we assume that all assignments to the frame pointer are
for non-local gotos and are being done at a time when
they are valid and do not disturb anything else. Some
machines want to eliminate a fake argument pointer (or
even a fake frame pointer) with either the real frame
pointer or the stack pointer. Assignments to the hard
frame pointer must not prevent this elimination. */
for (ep = reg_eliminate;
ep < ®_eliminate[NUM_ELIMINABLE_REGS];
ep++)
if (ep->to_rtx == SET_DEST (x)
&& SET_DEST (x) != hard_frame_pointer_rtx)
setup_can_eliminate (ep, false);
}
mark_not_eliminable (SET_SRC (x), mem_mode);
return;
case MEM:
/* Our only special processing is to pass the mode of the MEM to
our recursive call. */
mark_not_eliminable (XEXP (x, 0), GET_MODE (x));
return;
default:
break;
}
fmt = GET_RTX_FORMAT (code);
for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
{
if (*fmt == 'e')
mark_not_eliminable (XEXP (x, i), mem_mode);
else if (*fmt == 'E')
for (j = 0; j < XVECLEN (x, i); j++)
mark_not_eliminable (XVECEXP (x, i, j), mem_mode);
}
}
OBJ
builtin_quotient(int numArgs){
#ifdef DEBUG
if( DETAILED_TYPES->state) printf(RED "WARNING:" RESET " division is implemented for integers only and will truncate fractions!\n");
#endif
OBJ theArg;
switch (numArgs){
case 0:
js_error("(/): at least one arg expected", js_nil);
/* NOT REACHED */
case 1:
theArg = POP();
if( !ISINTEGER(theArg)){
js_error("(/): non-integer argument", theArg);
/* NOT REACHED */
}
if( INTVAL(theArg) == 0){
js_error("(/): division by zero", theArg);
/* NOT REACHED */
}
return newInteger( 1 / INTVAL(theArg) );
default:
theArg = NTH_ARG(numArgs, 0);
if( !ISINTEGER(theArg)){
POPN(numArgs);
js_error("(/): non-integer argument", theArg);
/* NOT REACHED */
}
if( INTVAL(theArg) == 0){
for(int i = 1; i < numArgs; i++){
OBJ nextArg = NTH_ARG(numArgs, i);
if( !ISINTEGER(nextArg) ){
POPN(numArgs);
js_error("(/): non-integer argument", theArg);
/* NOT REACHED */
}
if( INTVAL(nextArg) == 0){
POPN(numArgs);
js_error("(/): division by zero", nextArg);
/* NOT REACHED */
}
}
POPN(numArgs);
return newInteger(0);
}
jscheme_int64 quotient = INTVAL(theArg);
for(int i = 1; i < numArgs; i++){
OBJ nextArg = NTH_ARG(numArgs, i);
if( !ISINTEGER(nextArg) ){
POPN(numArgs);
js_error("(/): non-integer argument", theArg);
/* NOT REACHED */
}
if( INTVAL(nextArg) == 0){
POPN(numArgs);
js_error("(/): division by zero", nextArg);
/* NOT REACHED */
}
quotient = quotient / INTVAL(nextArg);
}
POPN(numArgs);
return newInteger(quotient);
}
/* NOT REACHED */
return js_nil;
}
static void
print_exp (char *buf, const_rtx x, int verbose)
{
char tmp[BUF_LEN];
const char *st[4];
char *cur = buf;
const char *fun = (char *) 0;
const char *sep;
rtx op[4];
int i;
for (i = 0; i < 4; i++)
{
st[i] = (char *) 0;
op[i] = NULL_RTX;
}
switch (GET_CODE (x))
{
case PLUS:
op[0] = XEXP (x, 0);
if (CONST_INT_P (XEXP (x, 1))
&& INTVAL (XEXP (x, 1)) < 0)
{
st[1] = "-";
op[1] = GEN_INT (-INTVAL (XEXP (x, 1)));
}
else
{
st[1] = "+";
op[1] = XEXP (x, 1);
}
break;
case LO_SUM:
op[0] = XEXP (x, 0);
st[1] = "+low(";
op[1] = XEXP (x, 1);
st[2] = ")";
break;
case MINUS:
op[0] = XEXP (x, 0);
st[1] = "-";
op[1] = XEXP (x, 1);
break;
case COMPARE:
fun = "cmp";
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
break;
case NEG:
st[0] = "-";
op[0] = XEXP (x, 0);
break;
case MULT:
op[0] = XEXP (x, 0);
st[1] = "*";
op[1] = XEXP (x, 1);
break;
case DIV:
op[0] = XEXP (x, 0);
st[1] = "/";
op[1] = XEXP (x, 1);
break;
case UDIV:
fun = "udiv";
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
break;
case MOD:
op[0] = XEXP (x, 0);
st[1] = "%";
op[1] = XEXP (x, 1);
break;
case UMOD:
fun = "umod";
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
break;
case SMIN:
fun = "smin";
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
break;
case SMAX:
fun = "smax";
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
break;
case UMIN:
fun = "umin";
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
break;
case UMAX:
fun = "umax";
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
break;
case NOT:
st[0] = "!";
op[0] = XEXP (x, 0);
break;
case AND:
op[0] = XEXP (x, 0);
st[1] = "&";
op[1] = XEXP (x, 1);
break;
case IOR:
op[0] = XEXP (x, 0);
st[1] = "|";
op[1] = XEXP (x, 1);
break;
case XOR:
op[0] = XEXP (x, 0);
st[1] = "^";
op[1] = XEXP (x, 1);
break;
case ASHIFT:
op[0] = XEXP (x, 0);
st[1] = "<<";
op[1] = XEXP (x, 1);
break;
case LSHIFTRT:
op[0] = XEXP (x, 0);
st[1] = " 0>>";
op[1] = XEXP (x, 1);
break;
case ASHIFTRT:
op[0] = XEXP (x, 0);
st[1] = ">>";
op[1] = XEXP (x, 1);
break;
case ROTATE:
op[0] = XEXP (x, 0);
st[1] = "<-<";
op[1] = XEXP (x, 1);
break;
case ROTATERT:
op[0] = XEXP (x, 0);
st[1] = ">->";
op[1] = XEXP (x, 1);
break;
case ABS:
fun = "abs";
op[0] = XEXP (x, 0);
break;
case SQRT:
fun = "sqrt";
op[0] = XEXP (x, 0);
break;
case FFS:
fun = "ffs";
op[0] = XEXP (x, 0);
break;
case EQ:
op[0] = XEXP (x, 0);
st[1] = "==";
op[1] = XEXP (x, 1);
break;
case NE:
op[0] = XEXP (x, 0);
st[1] = "!=";
op[1] = XEXP (x, 1);
break;
case GT:
op[0] = XEXP (x, 0);
st[1] = ">";
op[1] = XEXP (x, 1);
break;
case GTU:
fun = "gtu";
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
break;
case LT:
op[0] = XEXP (x, 0);
st[1] = "<";
op[1] = XEXP (x, 1);
break;
case LTU:
fun = "ltu";
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
break;
case GE:
op[0] = XEXP (x, 0);
st[1] = ">=";
op[1] = XEXP (x, 1);
break;
case GEU:
fun = "geu";
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
break;
case LE:
op[0] = XEXP (x, 0);
st[1] = "<=";
op[1] = XEXP (x, 1);
break;
case LEU:
fun = "leu";
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
break;
case SIGN_EXTRACT:
fun = (verbose) ? "sign_extract" : "sxt";
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
op[2] = XEXP (x, 2);
break;
case ZERO_EXTRACT:
fun = (verbose) ? "zero_extract" : "zxt";
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
op[2] = XEXP (x, 2);
break;
case SIGN_EXTEND:
fun = (verbose) ? "sign_extend" : "sxn";
op[0] = XEXP (x, 0);
break;
case ZERO_EXTEND:
fun = (verbose) ? "zero_extend" : "zxn";
op[0] = XEXP (x, 0);
break;
case FLOAT_EXTEND:
fun = (verbose) ? "float_extend" : "fxn";
op[0] = XEXP (x, 0);
break;
case TRUNCATE:
fun = (verbose) ? "trunc" : "trn";
op[0] = XEXP (x, 0);
break;
case FLOAT_TRUNCATE:
fun = (verbose) ? "float_trunc" : "ftr";
op[0] = XEXP (x, 0);
break;
case FLOAT:
fun = (verbose) ? "float" : "flt";
op[0] = XEXP (x, 0);
break;
case UNSIGNED_FLOAT:
fun = (verbose) ? "uns_float" : "ufl";
op[0] = XEXP (x, 0);
break;
case FIX:
fun = "fix";
op[0] = XEXP (x, 0);
break;
case UNSIGNED_FIX:
fun = (verbose) ? "uns_fix" : "ufx";
op[0] = XEXP (x, 0);
break;
case PRE_DEC:
st[0] = "--";
op[0] = XEXP (x, 0);
break;
case PRE_INC:
st[0] = "++";
op[0] = XEXP (x, 0);
break;
case POST_DEC:
op[0] = XEXP (x, 0);
st[1] = "--";
break;
case POST_INC:
op[0] = XEXP (x, 0);
st[1] = "++";
break;
case PRE_MODIFY:
st[0] = "pre ";
op[0] = XEXP (XEXP (x, 1), 0);
st[1] = "+=";
op[1] = XEXP (XEXP (x, 1), 1);
break;
case POST_MODIFY:
st[0] = "post ";
op[0] = XEXP (XEXP (x, 1), 0);
st[1] = "+=";
op[1] = XEXP (XEXP (x, 1), 1);
break;
case CALL:
st[0] = "call ";
op[0] = XEXP (x, 0);
if (verbose)
{
st[1] = " argc:";
op[1] = XEXP (x, 1);
}
break;
case IF_THEN_ELSE:
st[0] = "{(";
op[0] = XEXP (x, 0);
st[1] = ")?";
op[1] = XEXP (x, 1);
st[2] = ":";
op[2] = XEXP (x, 2);
st[3] = "}";
break;
case TRAP_IF:
fun = "trap_if";
op[0] = TRAP_CONDITION (x);
break;
case PREFETCH:
fun = "prefetch";
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
op[2] = XEXP (x, 2);
break;
case UNSPEC:
case UNSPEC_VOLATILE:
{
cur = safe_concat (buf, cur, "unspec");
if (GET_CODE (x) == UNSPEC_VOLATILE)
cur = safe_concat (buf, cur, "/v");
cur = safe_concat (buf, cur, "[");
sep = "";
for (i = 0; i < XVECLEN (x, 0); i++)
{
print_pattern (tmp, XVECEXP (x, 0, i), verbose);
cur = safe_concat (buf, cur, sep);
cur = safe_concat (buf, cur, tmp);
sep = ",";
}
cur = safe_concat (buf, cur, "] ");
sprintf (tmp, "%d", XINT (x, 1));
cur = safe_concat (buf, cur, tmp);
}
break;
default:
/* If (verbose) debug_rtx (x); */
st[0] = GET_RTX_NAME (GET_CODE (x));
break;
}
/* Print this as a function? */
if (fun)
{
cur = safe_concat (buf, cur, fun);
cur = safe_concat (buf, cur, "(");
}
for (i = 0; i < 4; i++)
{
if (st[i])
cur = safe_concat (buf, cur, st[i]);
if (op[i])
{
if (fun && i != 0)
cur = safe_concat (buf, cur, ",");
print_value (tmp, op[i], verbose);
cur = safe_concat (buf, cur, tmp);
}
}
if (fun)
cur = safe_concat (buf, cur, ")");
} /* print_exp */
static void
print_exp (pretty_printer *pp, const_rtx x, int verbose)
{
const char *st[4];
const char *fun;
rtx op[4];
int i;
fun = (char *) 0;
for (i = 0; i < 4; i++)
{
st[i] = (char *) 0;
op[i] = NULL_RTX;
}
switch (GET_CODE (x))
{
case PLUS:
op[0] = XEXP (x, 0);
if (CONST_INT_P (XEXP (x, 1))
&& INTVAL (XEXP (x, 1)) < 0)
{
st[1] = "-";
op[1] = GEN_INT (-INTVAL (XEXP (x, 1)));
}
else
{
st[1] = "+";
op[1] = XEXP (x, 1);
}
break;
case LO_SUM:
op[0] = XEXP (x, 0);
st[1] = "+low(";
op[1] = XEXP (x, 1);
st[2] = ")";
break;
case MINUS:
op[0] = XEXP (x, 0);
st[1] = "-";
op[1] = XEXP (x, 1);
break;
case COMPARE:
fun = "cmp";
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
break;
case NEG:
st[0] = "-";
op[0] = XEXP (x, 0);
break;
case FMA:
st[0] = "{";
op[0] = XEXP (x, 0);
st[1] = "*";
op[1] = XEXP (x, 1);
st[2] = "+";
op[2] = XEXP (x, 2);
st[3] = "}";
break;
case MULT:
op[0] = XEXP (x, 0);
st[1] = "*";
op[1] = XEXP (x, 1);
break;
case DIV:
op[0] = XEXP (x, 0);
st[1] = "/";
op[1] = XEXP (x, 1);
break;
case UDIV:
fun = "udiv";
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
break;
case MOD:
op[0] = XEXP (x, 0);
st[1] = "%";
op[1] = XEXP (x, 1);
break;
case UMOD:
fun = "umod";
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
break;
case SMIN:
fun = "smin";
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
break;
case SMAX:
fun = "smax";
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
break;
case UMIN:
fun = "umin";
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
break;
case UMAX:
fun = "umax";
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
break;
case NOT:
st[0] = "!";
op[0] = XEXP (x, 0);
break;
case AND:
op[0] = XEXP (x, 0);
st[1] = "&";
op[1] = XEXP (x, 1);
break;
case IOR:
op[0] = XEXP (x, 0);
st[1] = "|";
op[1] = XEXP (x, 1);
break;
case XOR:
op[0] = XEXP (x, 0);
st[1] = "^";
op[1] = XEXP (x, 1);
break;
case ASHIFT:
op[0] = XEXP (x, 0);
st[1] = "<<";
op[1] = XEXP (x, 1);
break;
case LSHIFTRT:
op[0] = XEXP (x, 0);
st[1] = " 0>>";
op[1] = XEXP (x, 1);
break;
case ASHIFTRT:
op[0] = XEXP (x, 0);
st[1] = ">>";
op[1] = XEXP (x, 1);
break;
case ROTATE:
op[0] = XEXP (x, 0);
st[1] = "<-<";
op[1] = XEXP (x, 1);
break;
case ROTATERT:
op[0] = XEXP (x, 0);
st[1] = ">->";
op[1] = XEXP (x, 1);
break;
case NE:
op[0] = XEXP (x, 0);
st[1] = "!=";
op[1] = XEXP (x, 1);
break;
case EQ:
op[0] = XEXP (x, 0);
st[1] = "==";
op[1] = XEXP (x, 1);
break;
case GE:
op[0] = XEXP (x, 0);
st[1] = ">=";
op[1] = XEXP (x, 1);
break;
case GT:
op[0] = XEXP (x, 0);
st[1] = ">";
op[1] = XEXP (x, 1);
break;
case LE:
op[0] = XEXP (x, 0);
st[1] = "<=";
op[1] = XEXP (x, 1);
break;
case LT:
op[0] = XEXP (x, 0);
st[1] = "<";
op[1] = XEXP (x, 1);
break;
case SIGN_EXTRACT:
fun = (verbose) ? "sign_extract" : "sxt";
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
op[2] = XEXP (x, 2);
break;
case ZERO_EXTRACT:
fun = (verbose) ? "zero_extract" : "zxt";
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
op[2] = XEXP (x, 2);
break;
case SIGN_EXTEND:
fun = (verbose) ? "sign_extend" : "sxn";
op[0] = XEXP (x, 0);
break;
case ZERO_EXTEND:
fun = (verbose) ? "zero_extend" : "zxn";
op[0] = XEXP (x, 0);
break;
case FLOAT_EXTEND:
fun = (verbose) ? "float_extend" : "fxn";
op[0] = XEXP (x, 0);
break;
case TRUNCATE:
fun = (verbose) ? "trunc" : "trn";
op[0] = XEXP (x, 0);
break;
case FLOAT_TRUNCATE:
fun = (verbose) ? "float_trunc" : "ftr";
op[0] = XEXP (x, 0);
break;
case FLOAT:
fun = (verbose) ? "float" : "flt";
op[0] = XEXP (x, 0);
break;
case UNSIGNED_FLOAT:
fun = (verbose) ? "uns_float" : "ufl";
op[0] = XEXP (x, 0);
break;
case FIX:
fun = "fix";
op[0] = XEXP (x, 0);
break;
case UNSIGNED_FIX:
fun = (verbose) ? "uns_fix" : "ufx";
op[0] = XEXP (x, 0);
break;
case PRE_DEC:
st[0] = "--";
op[0] = XEXP (x, 0);
break;
case PRE_INC:
st[0] = "++";
op[0] = XEXP (x, 0);
break;
case POST_DEC:
op[0] = XEXP (x, 0);
st[1] = "--";
break;
case POST_INC:
op[0] = XEXP (x, 0);
st[1] = "++";
break;
case PRE_MODIFY:
st[0] = "pre ";
op[0] = XEXP (XEXP (x, 1), 0);
st[1] = "+=";
op[1] = XEXP (XEXP (x, 1), 1);
break;
case POST_MODIFY:
st[0] = "post ";
op[0] = XEXP (XEXP (x, 1), 0);
st[1] = "+=";
op[1] = XEXP (XEXP (x, 1), 1);
break;
case CALL:
st[0] = "call ";
op[0] = XEXP (x, 0);
if (verbose)
{
st[1] = " argc:";
op[1] = XEXP (x, 1);
}
break;
case IF_THEN_ELSE:
st[0] = "{(";
op[0] = XEXP (x, 0);
st[1] = ")?";
op[1] = XEXP (x, 1);
st[2] = ":";
op[2] = XEXP (x, 2);
st[3] = "}";
break;
case TRAP_IF:
fun = "trap_if";
op[0] = TRAP_CONDITION (x);
break;
case PREFETCH:
fun = "prefetch";
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
op[2] = XEXP (x, 2);
break;
case UNSPEC:
case UNSPEC_VOLATILE:
{
pp_string (pp, "unspec");
if (GET_CODE (x) == UNSPEC_VOLATILE)
pp_string (pp, "/v");
pp_left_bracket (pp);
for (i = 0; i < XVECLEN (x, 0); i++)
{
if (i != 0)
pp_comma (pp);
print_pattern (pp, XVECEXP (x, 0, i), verbose);
}
pp_string (pp, "] ");
pp_decimal_int (pp, XINT (x, 1));
}
break;
default:
{
/* Most unhandled codes can be printed as pseudo-functions. */
if (GET_RTX_CLASS (GET_CODE (x)) == RTX_UNARY)
{
fun = GET_RTX_NAME (GET_CODE (x));
op[0] = XEXP (x, 0);
}
else if (GET_RTX_CLASS (GET_CODE (x)) == RTX_COMPARE
|| GET_RTX_CLASS (GET_CODE (x)) == RTX_COMM_COMPARE
|| GET_RTX_CLASS (GET_CODE (x)) == RTX_BIN_ARITH
|| GET_RTX_CLASS (GET_CODE (x)) == RTX_COMM_ARITH)
{
fun = GET_RTX_NAME (GET_CODE (x));
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
}
else if (GET_RTX_CLASS (GET_CODE (x)) == RTX_TERNARY)
{
fun = GET_RTX_NAME (GET_CODE (x));
op[0] = XEXP (x, 0);
op[1] = XEXP (x, 1);
op[2] = XEXP (x, 2);
}
else
/* Give up, just print the RTX name. */
st[0] = GET_RTX_NAME (GET_CODE (x));
}
break;
}
/* Print this as a function? */
if (fun)
{
pp_string (pp, fun);
pp_left_paren (pp);
}
for (i = 0; i < 4; i++)
{
if (st[i])
pp_string (pp, st[i]);
if (op[i])
{
if (fun && i != 0)
pp_comma (pp);
print_value (pp, op[i], verbose);
}
}
if (fun)
pp_right_paren (pp);
} /* print_exp */
static void
print_rtx (rtx in_rtx)
{
int i = 0;
int j;
const char *format_ptr;
int is_insn;
if (sawclose)
{
if (flag_simple)
fputc (' ', outfile);
else
fprintf (outfile, "\n%s%*s", print_rtx_head, indent * 2, "");
sawclose = 0;
}
if (in_rtx == 0)
{
fputs ("(nil)", outfile);
sawclose = 1;
return;
}
else if (GET_CODE (in_rtx) > NUM_RTX_CODE)
{
fprintf (outfile, "(??? bad code %d\n)", GET_CODE (in_rtx));
sawclose = 1;
return;
}
is_insn = INSN_P (in_rtx);
/* When printing in VCG format we write INSNs, NOTE, LABEL, and BARRIER
in separate nodes and therefore have to handle them special here. */
if (dump_for_graph
&& (is_insn || NOTE_P (in_rtx)
|| LABEL_P (in_rtx) || BARRIER_P (in_rtx)))
{
i = 3;
indent = 0;
}
else
{
/* Print name of expression code. */
if (flag_simple && GET_CODE (in_rtx) == CONST_INT)
fputc ('(', outfile);
else
fprintf (outfile, "(%s", GET_RTX_NAME (GET_CODE (in_rtx)));
if (! flag_simple)
{
if (RTX_FLAG (in_rtx, in_struct))
fputs ("/s", outfile);
if (RTX_FLAG (in_rtx, volatil))
fputs ("/v", outfile);
if (RTX_FLAG (in_rtx, unchanging))
fputs ("/u", outfile);
if (RTX_FLAG (in_rtx, frame_related))
fputs ("/f", outfile);
if (RTX_FLAG (in_rtx, jump))
fputs ("/j", outfile);
if (RTX_FLAG (in_rtx, call))
fputs ("/c", outfile);
if (RTX_FLAG (in_rtx, return_val))
fputs ("/i", outfile);
/* Print REG_NOTE names for EXPR_LIST and INSN_LIST. */
if (GET_CODE (in_rtx) == EXPR_LIST
|| GET_CODE (in_rtx) == INSN_LIST)
fprintf (outfile, ":%s",
GET_REG_NOTE_NAME (GET_MODE (in_rtx)));
/* For other rtl, print the mode if it's not VOID. */
else if (GET_MODE (in_rtx) != VOIDmode)
fprintf (outfile, ":%s", GET_MODE_NAME (GET_MODE (in_rtx)));
}
}
#ifndef GENERATOR_FILE
if (GET_CODE (in_rtx) == CONST_DOUBLE && FLOAT_MODE_P (GET_MODE (in_rtx)))
i = 5;
#endif
/* Get the format string and skip the first elements if we have handled
them already. */
format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx)) + i;
for (; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
switch (*format_ptr++)
{
const char *str;
case 'T':
str = XTMPL (in_rtx, i);
goto string;
case 'S':
case 's':
str = XSTR (in_rtx, i);
string:
if (str == 0)
fputs (dump_for_graph ? " \\\"\\\"" : " \"\"", outfile);
else
{
if (dump_for_graph)
fprintf (outfile, " (\\\"%s\\\")", str);
else
fprintf (outfile, " (\"%s\")", str);
}
sawclose = 1;
break;
/* 0 indicates a field for internal use that should not be printed.
An exception is the third field of a NOTE, where it indicates
that the field has several different valid contents. */
case '0':
if (i == 1 && REG_P (in_rtx))
{
if (REGNO (in_rtx) != ORIGINAL_REGNO (in_rtx))
fprintf (outfile, " [%d]", ORIGINAL_REGNO (in_rtx));
}
#ifndef GENERATOR_FILE
else if (i == 1 && GET_CODE (in_rtx) == SYMBOL_REF)
{
int flags = SYMBOL_REF_FLAGS (in_rtx);
if (flags)
fprintf (outfile, " [flags 0x%x]", flags);
}
else if (i == 2 && GET_CODE (in_rtx) == SYMBOL_REF)
{
tree decl = SYMBOL_REF_DECL (in_rtx);
if (decl)
print_node_brief (outfile, "", decl, 0);
}
#endif
else if (i == 4 && NOTE_P (in_rtx))
{
switch (NOTE_LINE_NUMBER (in_rtx))
{
case NOTE_INSN_EH_REGION_BEG:
case NOTE_INSN_EH_REGION_END:
if (flag_dump_unnumbered)
fprintf (outfile, " #");
else
fprintf (outfile, " %d", NOTE_EH_HANDLER (in_rtx));
sawclose = 1;
break;
case NOTE_INSN_BLOCK_BEG:
case NOTE_INSN_BLOCK_END:
#ifndef GENERATOR_FILE
dump_addr (outfile, " ", NOTE_BLOCK (in_rtx));
#endif
sawclose = 1;
break;
case NOTE_INSN_BASIC_BLOCK:
{
#ifndef GENERATOR_FILE
basic_block bb = NOTE_BASIC_BLOCK (in_rtx);
if (bb != 0)
fprintf (outfile, " [bb %d]", bb->index);
#endif
break;
}
case NOTE_INSN_EXPECTED_VALUE:
indent += 2;
if (!sawclose)
fprintf (outfile, " ");
print_rtx (NOTE_EXPECTED_VALUE (in_rtx));
indent -= 2;
break;
case NOTE_INSN_DELETED_LABEL:
{
const char *label = NOTE_DELETED_LABEL_NAME (in_rtx);
if (label)
fprintf (outfile, " (\"%s\")", label);
else
fprintf (outfile, " \"\"");
}
break;
case NOTE_INSN_SWITCH_TEXT_SECTIONS:
{
#ifndef GENERATOR_FILE
basic_block bb = NOTE_BASIC_BLOCK (in_rtx);
if (bb != 0)
fprintf (outfile, " [bb %d]", bb->index);
#endif
break;
}
case NOTE_INSN_VAR_LOCATION:
#ifndef GENERATOR_FILE
fprintf (outfile, " (");
print_mem_expr (outfile, NOTE_VAR_LOCATION_DECL (in_rtx));
fprintf (outfile, " ");
print_rtx (NOTE_VAR_LOCATION_LOC (in_rtx));
fprintf (outfile, ")");
#endif
break;
default:
{
const char * const str = X0STR (in_rtx, i);
if (NOTE_LINE_NUMBER (in_rtx) < 0)
;
else if (str == 0)
fputs (dump_for_graph ? " \\\"\\\"" : " \"\"", outfile);
else
{
if (dump_for_graph)
fprintf (outfile, " (\\\"%s\\\")", str);
else
fprintf (outfile, " (\"%s\")", str);
}
break;
}
}
}
break;
case 'e':
do_e:
indent += 2;
if (!sawclose)
fprintf (outfile, " ");
print_rtx (XEXP (in_rtx, i));
indent -= 2;
break;
case 'E':
case 'V':
indent += 2;
if (sawclose)
{
fprintf (outfile, "\n%s%*s",
print_rtx_head, indent * 2, "");
sawclose = 0;
}
fputs (" [", outfile);
if (NULL != XVEC (in_rtx, i))
{
indent += 2;
if (XVECLEN (in_rtx, i))
sawclose = 1;
for (j = 0; j < XVECLEN (in_rtx, i); j++)
print_rtx (XVECEXP (in_rtx, i, j));
indent -= 2;
}
if (sawclose)
fprintf (outfile, "\n%s%*s", print_rtx_head, indent * 2, "");
fputs ("]", outfile);
sawclose = 1;
indent -= 2;
break;
case 'w':
if (! flag_simple)
fprintf (outfile, " ");
fprintf (outfile, HOST_WIDE_INT_PRINT_DEC, XWINT (in_rtx, i));
if (! flag_simple)
fprintf (outfile, " [" HOST_WIDE_INT_PRINT_HEX "]",
XWINT (in_rtx, i));
break;
case 'i':
if (i == 4 && INSN_P (in_rtx))
{
#ifndef GENERATOR_FILE
/* Pretty-print insn locators. Ignore scoping as it is mostly
redundant with line number information and do not print anything
when there is no location information available. */
if (INSN_LOCATOR (in_rtx) && insn_file (in_rtx))
fprintf(outfile, " %s:%i", insn_file (in_rtx), insn_line (in_rtx));
#endif
}
else if (i == 6 && NOTE_P (in_rtx))
{
/* This field is only used for NOTE_INSN_DELETED_LABEL, and
other times often contains garbage from INSN->NOTE death. */
if (NOTE_LINE_NUMBER (in_rtx) == NOTE_INSN_DELETED_LABEL)
fprintf (outfile, " %d", XINT (in_rtx, i));
}
else
{
int value = XINT (in_rtx, i);
const char *name;
#ifndef GENERATOR_FILE
if (REG_P (in_rtx) && value < FIRST_PSEUDO_REGISTER)
fprintf (outfile, " %d %s", REGNO (in_rtx),
reg_names[REGNO (in_rtx)]);
else if (REG_P (in_rtx)
&& value <= LAST_VIRTUAL_REGISTER)
{
if (value == VIRTUAL_INCOMING_ARGS_REGNUM)
fprintf (outfile, " %d virtual-incoming-args", value);
else if (value == VIRTUAL_STACK_VARS_REGNUM)
fprintf (outfile, " %d virtual-stack-vars", value);
else if (value == VIRTUAL_STACK_DYNAMIC_REGNUM)
fprintf (outfile, " %d virtual-stack-dynamic", value);
else if (value == VIRTUAL_OUTGOING_ARGS_REGNUM)
fprintf (outfile, " %d virtual-outgoing-args", value);
else if (value == VIRTUAL_CFA_REGNUM)
fprintf (outfile, " %d virtual-cfa", value);
else
fprintf (outfile, " %d virtual-reg-%d", value,
value-FIRST_VIRTUAL_REGISTER);
}
else
#endif
if (flag_dump_unnumbered
&& (is_insn || NOTE_P (in_rtx)))
fputc ('#', outfile);
else
fprintf (outfile, " %d", value);
#ifndef GENERATOR_FILE
if (REG_P (in_rtx) && REG_ATTRS (in_rtx))
{
fputs (" [", outfile);
if (ORIGINAL_REGNO (in_rtx) != REGNO (in_rtx))
fprintf (outfile, "orig:%i", ORIGINAL_REGNO (in_rtx));
if (REG_EXPR (in_rtx))
print_mem_expr (outfile, REG_EXPR (in_rtx));
if (REG_OFFSET (in_rtx))
fprintf (outfile, "+" HOST_WIDE_INT_PRINT_DEC,
REG_OFFSET (in_rtx));
fputs (" ]", outfile);
}
#endif
if (is_insn && &INSN_CODE (in_rtx) == &XINT (in_rtx, i)
&& XINT (in_rtx, i) >= 0
&& (name = get_insn_name (XINT (in_rtx, i))) != NULL)
fprintf (outfile, " {%s}", name);
sawclose = 0;
}
break;
/* Print NOTE_INSN names rather than integer codes. */
case 'n':
if (XINT (in_rtx, i) >= (int) NOTE_INSN_BIAS
&& XINT (in_rtx, i) < (int) NOTE_INSN_MAX)
fprintf (outfile, " %s", GET_NOTE_INSN_NAME (XINT (in_rtx, i)));
else
fprintf (outfile, " %d", XINT (in_rtx, i));
sawclose = 0;
break;
case 'u':
if (XEXP (in_rtx, i) != NULL)
{
rtx sub = XEXP (in_rtx, i);
enum rtx_code subc = GET_CODE (sub);
if (GET_CODE (in_rtx) == LABEL_REF)
{
if (subc == NOTE
&& NOTE_LINE_NUMBER (sub) == NOTE_INSN_DELETED_LABEL)
{
if (flag_dump_unnumbered)
fprintf (outfile, " [# deleted]");
else
fprintf (outfile, " [%d deleted]", INSN_UID (sub));
sawclose = 0;
break;
}
if (subc != CODE_LABEL)
goto do_e;
}
if (flag_dump_unnumbered)
fputs (" #", outfile);
else
fprintf (outfile, " %d", INSN_UID (sub));
}
else
fputs (" 0", outfile);
sawclose = 0;
break;
case 'b':
#ifndef GENERATOR_FILE
if (XBITMAP (in_rtx, i) == NULL)
fputs (" {null}", outfile);
else
bitmap_print (outfile, XBITMAP (in_rtx, i), " {", "}");
#endif
sawclose = 0;
break;
case 't':
#ifndef GENERATOR_FILE
dump_addr (outfile, " ", XTREE (in_rtx, i));
#endif
break;
case '*':
fputs (" Unknown", outfile);
sawclose = 0;
break;
case 'B':
#ifndef GENERATOR_FILE
if (XBBDEF (in_rtx, i))
fprintf (outfile, " %i", XBBDEF (in_rtx, i)->index);
#endif
break;
default:
gcc_unreachable ();
}
switch (GET_CODE (in_rtx))
{
#ifndef GENERATOR_FILE
case MEM:
fprintf (outfile, " [" HOST_WIDE_INT_PRINT_DEC, MEM_ALIAS_SET (in_rtx));
if (MEM_EXPR (in_rtx))
print_mem_expr (outfile, MEM_EXPR (in_rtx));
if (MEM_OFFSET (in_rtx))
fprintf (outfile, "+" HOST_WIDE_INT_PRINT_DEC,
INTVAL (MEM_OFFSET (in_rtx)));
if (MEM_SIZE (in_rtx))
fprintf (outfile, " S" HOST_WIDE_INT_PRINT_DEC,
INTVAL (MEM_SIZE (in_rtx)));
if (MEM_ALIGN (in_rtx) != 1)
fprintf (outfile, " A%u", MEM_ALIGN (in_rtx));
fputc (']', outfile);
break;
case CONST_DOUBLE:
if (FLOAT_MODE_P (GET_MODE (in_rtx)))
{
char s[60];
real_to_decimal (s, CONST_DOUBLE_REAL_VALUE (in_rtx),
sizeof (s), 0, 1);
fprintf (outfile, " %s", s);
real_to_hexadecimal (s, CONST_DOUBLE_REAL_VALUE (in_rtx),
sizeof (s), 0, 1);
fprintf (outfile, " [%s]", s);
}
break;
#endif
case CODE_LABEL:
fprintf (outfile, " [%d uses]", LABEL_NUSES (in_rtx));
switch (LABEL_KIND (in_rtx))
{
case LABEL_NORMAL: break;
case LABEL_STATIC_ENTRY: fputs (" [entry]", outfile); break;
case LABEL_GLOBAL_ENTRY: fputs (" [global entry]", outfile); break;
case LABEL_WEAK_ENTRY: fputs (" [weak entry]", outfile); break;
default: gcc_unreachable ();
}
break;
default:
break;
}
if (dump_for_graph
&& (is_insn || NOTE_P (in_rtx)
|| LABEL_P (in_rtx) || BARRIER_P (in_rtx)))
sawclose = 0;
else
{
fputc (')', outfile);
sawclose = 1;
}
}
static bool
parse_add_or_inc (rtx insn, bool before_mem)
{
rtx pat = single_set (insn);
if (!pat)
return false;
/* Result must be single reg. */
if (!REG_P (SET_DEST (pat)))
return false;
if ((GET_CODE (SET_SRC (pat)) != PLUS)
&& (GET_CODE (SET_SRC (pat)) != MINUS))
return false;
if (!REG_P (XEXP (SET_SRC (pat), 0)))
return false;
inc_insn.insn = insn;
inc_insn.pat = pat;
inc_insn.reg_res = SET_DEST (pat);
inc_insn.reg0 = XEXP (SET_SRC (pat), 0);
if (rtx_equal_p (inc_insn.reg_res, inc_insn.reg0))
inc_insn.form = before_mem ? FORM_PRE_INC : FORM_POST_INC;
else
inc_insn.form = before_mem ? FORM_PRE_ADD : FORM_POST_ADD;
if (CONST_INT_P (XEXP (SET_SRC (pat), 1)))
{
/* Process a = b + c where c is a const. */
inc_insn.reg1_is_const = true;
if (GET_CODE (SET_SRC (pat)) == PLUS)
{
inc_insn.reg1 = XEXP (SET_SRC (pat), 1);
inc_insn.reg1_val = INTVAL (inc_insn.reg1);
}
else
{
inc_insn.reg1_val = -INTVAL (XEXP (SET_SRC (pat), 1));
inc_insn.reg1 = GEN_INT (inc_insn.reg1_val);
}
return true;
}
else if ((HAVE_PRE_MODIFY_REG || HAVE_POST_MODIFY_REG)
&& (REG_P (XEXP (SET_SRC (pat), 1)))
&& GET_CODE (SET_SRC (pat)) == PLUS)
{
/* Process a = b + c where c is a reg. */
inc_insn.reg1 = XEXP (SET_SRC (pat), 1);
inc_insn.reg1_is_const = false;
if (inc_insn.form == FORM_PRE_INC
|| inc_insn.form == FORM_POST_INC)
return true;
else if (rtx_equal_p (inc_insn.reg_res, inc_insn.reg1))
{
/* Reverse the two operands and turn *_ADD into *_INC since
a = c + a. */
reverse_inc ();
inc_insn.form = before_mem ? FORM_PRE_INC : FORM_POST_INC;
return true;
}
else
return true;
}
return false;
}
void
add_rtx (const_rtx x, hash &hstate)
{
enum rtx_code code;
machine_mode mode;
int i, j;
const char *fmt;
if (x == NULL_RTX)
return;
code = GET_CODE (x);
hstate.add_object (code);
mode = GET_MODE (x);
hstate.add_object (mode);
switch (code)
{
case REG:
hstate.add_int (REGNO (x));
return;
case CONST_INT:
hstate.add_object (INTVAL (x));
return;
case CONST_WIDE_INT:
for (i = 0; i < CONST_WIDE_INT_NUNITS (x); i++)
hstate.add_object (CONST_WIDE_INT_ELT (x, i));
return;
case SYMBOL_REF:
if (XSTR (x, 0))
hstate.add (XSTR (x, 0), strlen (XSTR (x, 0)) + 1);
return;
case LABEL_REF:
case DEBUG_EXPR:
case VALUE:
case SCRATCH:
case CONST_DOUBLE:
case CONST_FIXED:
case DEBUG_IMPLICIT_PTR:
case DEBUG_PARAMETER_REF:
return;
default:
break;
}
fmt = GET_RTX_FORMAT (code);
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
switch (fmt[i])
{
case 'w':
hstate.add_object (XWINT (x, i));
break;
case 'n':
case 'i':
hstate.add_object (XINT (x, i));
break;
case 'V':
case 'E':
j = XVECLEN (x, i);
hstate.add_int (j);
for (j = 0; j < XVECLEN (x, i); j++)
inchash::add_rtx (XVECEXP (x, i, j), hstate);
break;
case 'e':
inchash::add_rtx (XEXP (x, i), hstate);
break;
case 'S':
case 's':
if (XSTR (x, i))
hstate.add (XSTR (x, 0), strlen (XSTR (x, 0)) + 1);
break;
default:
break;
}
}
static void
combine_stack_adjustments_for_block (basic_block bb)
{
HOST_WIDE_INT last_sp_adjust = 0;
rtx last_sp_set = NULL_RTX;
struct csa_reflist *reflist = NULL;
rtx insn, next, set;
struct record_stack_refs_data data;
bool end_of_block = false;
for (insn = BB_HEAD (bb); !end_of_block ; insn = next)
{
end_of_block = insn == BB_END (bb);
next = NEXT_INSN (insn);
if (! INSN_P (insn))
continue;
set = single_set_for_csa (insn);
if (set)
{
rtx dest = SET_DEST (set);
rtx src = SET_SRC (set);
/* Find constant additions to the stack pointer. */
if (dest == stack_pointer_rtx
&& GET_CODE (src) == PLUS
&& XEXP (src, 0) == stack_pointer_rtx
&& CONST_INT_P (XEXP (src, 1)))
{
HOST_WIDE_INT this_adjust = INTVAL (XEXP (src, 1));
/* If we've not seen an adjustment previously, record
it now and continue. */
if (! last_sp_set)
{
last_sp_set = insn;
last_sp_adjust = this_adjust;
continue;
}
/* If not all recorded refs can be adjusted, or the
adjustment is now too large for a constant addition,
we cannot merge the two stack adjustments.
Also we need to be careful to not move stack pointer
such that we create stack accesses outside the allocated
area. We can combine an allocation into the first insn,
or a deallocation into the second insn. We can not
combine an allocation followed by a deallocation.
The only somewhat frequent occurrence of the later is when
a function allocates a stack frame but does not use it.
For this case, we would need to analyze rtl stream to be
sure that allocated area is really unused. This means not
only checking the memory references, but also all registers
or global memory references possibly containing a stack
frame address.
Perhaps the best way to address this problem is to teach
gcc not to allocate stack for objects never used. */
/* Combine an allocation into the first instruction. */
if (STACK_GROWS_DOWNWARD ? this_adjust <= 0 : this_adjust >= 0)
{
if (try_apply_stack_adjustment (last_sp_set, reflist,
last_sp_adjust + this_adjust,
this_adjust))
{
if (RTX_FRAME_RELATED_P (last_sp_set))
adjust_frame_related_expr (last_sp_set, insn,
this_adjust);
/* It worked! */
delete_insn (insn);
last_sp_adjust += this_adjust;
continue;
}
}
/* Otherwise we have a deallocation. Do not combine with
a previous allocation. Combine into the second insn. */
else if (STACK_GROWS_DOWNWARD
? last_sp_adjust >= 0 : last_sp_adjust <= 0)
{
if (try_apply_stack_adjustment (insn, reflist,
last_sp_adjust + this_adjust,
-last_sp_adjust))
{
/* It worked! */
delete_insn (last_sp_set);
last_sp_set = insn;
last_sp_adjust += this_adjust;
free_csa_reflist (reflist);
reflist = NULL;
continue;
}
}
/* Combination failed. Restart processing from here. If
deallocation+allocation conspired to cancel, we can
delete the old deallocation insn. */
if (last_sp_set && last_sp_adjust == 0)
delete_insn (last_sp_set);
free_csa_reflist (reflist);
reflist = NULL;
last_sp_set = insn;
last_sp_adjust = this_adjust;
continue;
}
/* Find a store with pre-(dec|inc)rement or pre-modify of exactly
the previous adjustment and turn it into a simple store. This
is equivalent to anticipating the stack adjustment so this must
be an allocation. */
if (MEM_P (dest)
&& ((STACK_GROWS_DOWNWARD
? (GET_CODE (XEXP (dest, 0)) == PRE_DEC
&& last_sp_adjust
== (HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (dest)))
: (GET_CODE (XEXP (dest, 0)) == PRE_INC
&& last_sp_adjust
== -(HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (dest))))
|| ((STACK_GROWS_DOWNWARD
? last_sp_adjust >= 0 : last_sp_adjust <= 0)
&& GET_CODE (XEXP (dest, 0)) == PRE_MODIFY
&& GET_CODE (XEXP (XEXP (dest, 0), 1)) == PLUS
&& XEXP (XEXP (XEXP (dest, 0), 1), 0)
== stack_pointer_rtx
&& GET_CODE (XEXP (XEXP (XEXP (dest, 0), 1), 1))
== CONST_INT
&& INTVAL (XEXP (XEXP (XEXP (dest, 0), 1), 1))
== -last_sp_adjust))
&& XEXP (XEXP (dest, 0), 0) == stack_pointer_rtx
&& !reg_mentioned_p (stack_pointer_rtx, src)
&& memory_address_p (GET_MODE (dest), stack_pointer_rtx)
&& try_apply_stack_adjustment (insn, reflist, 0,
-last_sp_adjust))
{
delete_insn (last_sp_set);
free_csa_reflist (reflist);
reflist = NULL;
last_sp_set = NULL_RTX;
last_sp_adjust = 0;
continue;
}
}
data.insn = insn;
data.reflist = reflist;
if (!CALL_P (insn) && last_sp_set
&& !for_each_rtx (&PATTERN (insn), record_stack_refs, &data))
{
reflist = data.reflist;
continue;
}
reflist = data.reflist;
/* Otherwise, we were not able to process the instruction.
Do not continue collecting data across such a one. */
if (last_sp_set
&& (CALL_P (insn)
|| reg_mentioned_p (stack_pointer_rtx, PATTERN (insn))))
{
if (last_sp_set && last_sp_adjust == 0)
delete_insn (last_sp_set);
free_csa_reflist (reflist);
reflist = NULL;
last_sp_set = NULL_RTX;
last_sp_adjust = 0;
}
}
if (last_sp_set && last_sp_adjust == 0)
delete_insn (last_sp_set);
if (reflist)
free_csa_reflist (reflist);
}
hashval_t
iterative_hash_rtx (const_rtx x, hashval_t hash)
{
enum rtx_code code;
enum machine_mode mode;
int i, j;
const char *fmt;
if (x == NULL_RTX)
return hash;
code = GET_CODE (x);
hash = iterative_hash_object (code, hash);
mode = GET_MODE (x);
hash = iterative_hash_object (mode, hash);
switch (code)
{
case REG:
i = REGNO (x);
return iterative_hash_object (i, hash);
case CONST_INT:
return iterative_hash_object (INTVAL (x), hash);
case SYMBOL_REF:
if (XSTR (x, 0))
return iterative_hash (XSTR (x, 0), strlen (XSTR (x, 0)) + 1,
hash);
return hash;
case LABEL_REF:
case DEBUG_EXPR:
case VALUE:
case SCRATCH:
case CONST_DOUBLE:
case CONST_FIXED:
case DEBUG_IMPLICIT_PTR:
case DEBUG_PARAMETER_REF:
return hash;
default:
break;
}
fmt = GET_RTX_FORMAT (code);
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
switch (fmt[i])
{
case 'w':
hash = iterative_hash_object (XWINT (x, i), hash);
break;
case 'n':
case 'i':
hash = iterative_hash_object (XINT (x, i), hash);
break;
case 'V':
case 'E':
j = XVECLEN (x, i);
hash = iterative_hash_object (j, hash);
for (j = 0; j < XVECLEN (x, i); j++)
hash = iterative_hash_rtx (XVECEXP (x, i, j), hash);
break;
case 'e':
hash = iterative_hash_rtx (XEXP (x, i), hash);
break;
case 'S':
case 's':
if (XSTR (x, i))
hash = iterative_hash (XSTR (x, 0), strlen (XSTR (x, 0)) + 1,
hash);
break;
default:
break;
}
return hash;
}
static inline int
x86_64_zext_immediate_operand_1 (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
#line 221 "../.././gcc/config/i386/predicates.md"
{
switch (GET_CODE (op))
{
case CONST_DOUBLE:
if (HOST_BITS_PER_WIDE_INT == 32)
return (GET_MODE (op) == VOIDmode && !CONST_DOUBLE_HIGH (op));
else
return 0;
case CONST_INT:
if (HOST_BITS_PER_WIDE_INT == 32)
return INTVAL (op) >= 0;
else
return !(INTVAL (op) & ~(HOST_WIDE_INT) 0xffffffff);
case SYMBOL_REF:
/* For certain code models, the symbolic references are known to fit. */
/* TLS symbols are not constant. */
if (SYMBOL_REF_TLS_MODEL (op))
return false;
return (ix86_cmodel == CM_SMALL
|| (ix86_cmodel == CM_MEDIUM
&& !SYMBOL_REF_FAR_ADDR_P (op)));
case LABEL_REF:
/* For certain code models, the code is near as well. */
return ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM;
case CONST:
/* We also may accept the offsetted memory references in certain
special cases. */
if (GET_CODE (XEXP (op, 0)) == PLUS)
{
rtx op1 = XEXP (XEXP (op, 0), 0);
rtx op2 = XEXP (XEXP (op, 0), 1);
if (ix86_cmodel == CM_LARGE)
return 0;
switch (GET_CODE (op1))
{
case SYMBOL_REF:
/* TLS symbols are not constant. */
if (SYMBOL_REF_TLS_MODEL (op1))
return 0;
/* For small code model we may accept pretty large positive
offsets, since one bit is available for free. Negative
offsets are limited by the size of NULL pointer area
specified by the ABI. */
if ((ix86_cmodel == CM_SMALL
|| (ix86_cmodel == CM_MEDIUM
&& !SYMBOL_REF_FAR_ADDR_P (op1)))
&& CONST_INT_P (op2)
&& trunc_int_for_mode (INTVAL (op2), DImode) > -0x10000
&& trunc_int_for_mode (INTVAL (op2), SImode) == INTVAL (op2))
return 1;
/* ??? For the kernel, we may accept adjustment of
-0x10000000, since we know that it will just convert
negative address space to positive, but perhaps this
is not worthwhile. */
break;
case LABEL_REF:
/* These conditions are similar to SYMBOL_REF ones, just the
constraints for code models differ. */
if ((ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM)
&& CONST_INT_P (op2)
&& trunc_int_for_mode (INTVAL (op2), DImode) > -0x10000
&& trunc_int_for_mode (INTVAL (op2), SImode) == INTVAL (op2))
return 1;
break;
default:
return 0;
}
}
break;
default:
gcc_unreachable ();
}
return 0;
}
static bool
combine_set_extension (ext_cand *cand, rtx curr_insn, rtx *orig_set)
{
rtx orig_src = SET_SRC (*orig_set);
rtx new_reg = gen_rtx_REG (cand->mode, REGNO (SET_DEST (*orig_set)));
rtx new_set;
/* Merge constants by directly moving the constant into the register under
some conditions. Recall that RTL constants are sign-extended. */
if (GET_CODE (orig_src) == CONST_INT
&& HOST_BITS_PER_WIDE_INT >= GET_MODE_BITSIZE (cand->mode))
{
if (INTVAL (orig_src) >= 0 || cand->code == SIGN_EXTEND)
new_set = gen_rtx_SET (VOIDmode, new_reg, orig_src);
else
{
/* Zero-extend the negative constant by masking out the bits outside
the source mode. */
enum machine_mode src_mode = GET_MODE (SET_DEST (*orig_set));
rtx new_const_int
= GEN_INT (INTVAL (orig_src) & GET_MODE_MASK (src_mode));
new_set = gen_rtx_SET (VOIDmode, new_reg, new_const_int);
}
}
else if (GET_MODE (orig_src) == VOIDmode)
{
/* This is mostly due to a call insn that should not be optimized. */
return false;
}
else if (GET_CODE (orig_src) == cand->code)
{
/* Here is a sequence of two extensions. Try to merge them. */
rtx temp_extension
= gen_rtx_fmt_e (cand->code, cand->mode, XEXP (orig_src, 0));
rtx simplified_temp_extension = simplify_rtx (temp_extension);
if (simplified_temp_extension)
temp_extension = simplified_temp_extension;
new_set = gen_rtx_SET (VOIDmode, new_reg, temp_extension);
}
else if (GET_CODE (orig_src) == IF_THEN_ELSE)
{
/* Only IF_THEN_ELSE of phi-type copies are combined. Otherwise,
in general, IF_THEN_ELSE should not be combined. */
return false;
}
else
{
/* This is the normal case. */
rtx temp_extension
= gen_rtx_fmt_e (cand->code, cand->mode, orig_src);
rtx simplified_temp_extension = simplify_rtx (temp_extension);
if (simplified_temp_extension)
temp_extension = simplified_temp_extension;
new_set = gen_rtx_SET (VOIDmode, new_reg, temp_extension);
}
/* This change is a part of a group of changes. Hence,
validate_change will not try to commit the change. */
if (validate_change (curr_insn, orig_set, new_set, true))
{
if (dump_file)
{
fprintf (dump_file,
"Tentatively merged extension with definition:\n");
print_rtl_single (dump_file, curr_insn);
}
return true;
}
return false;
}
static inline int
x86_64_immediate_operand_1 (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
#line 94 "../.././gcc/config/i386/predicates.md"
{
if (!TARGET_64BIT)
return immediate_operand (op, mode);
switch (GET_CODE (op))
{
case CONST_INT:
/* CONST_DOUBLES never match, since HOST_BITS_PER_WIDE_INT is known
to be at least 32 and this all acceptable constants are
represented as CONST_INT. */
if (HOST_BITS_PER_WIDE_INT == 32)
return 1;
else
{
HOST_WIDE_INT val = trunc_int_for_mode (INTVAL (op), DImode);
return trunc_int_for_mode (val, SImode) == val;
}
break;
case SYMBOL_REF:
/* For certain code models, the symbolic references are known to fit.
in CM_SMALL_PIC model we know it fits if it is local to the shared
library. Don't count TLS SYMBOL_REFs here, since they should fit
only if inside of UNSPEC handled below. */
/* TLS symbols are not constant. */
if (SYMBOL_REF_TLS_MODEL (op))
return false;
return (ix86_cmodel == CM_SMALL || ix86_cmodel == CM_KERNEL
|| (ix86_cmodel == CM_MEDIUM && !SYMBOL_REF_FAR_ADDR_P (op)));
case LABEL_REF:
/* For certain code models, the code is near as well. */
return (ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM
|| ix86_cmodel == CM_KERNEL);
case CONST:
/* We also may accept the offsetted memory references in certain
special cases. */
if (GET_CODE (XEXP (op, 0)) == UNSPEC)
switch (XINT (XEXP (op, 0), 1))
{
case UNSPEC_GOTPCREL:
case UNSPEC_DTPOFF:
case UNSPEC_GOTNTPOFF:
case UNSPEC_NTPOFF:
return 1;
default:
break;
}
if (GET_CODE (XEXP (op, 0)) == PLUS)
{
rtx op1 = XEXP (XEXP (op, 0), 0);
rtx op2 = XEXP (XEXP (op, 0), 1);
HOST_WIDE_INT offset;
if (ix86_cmodel == CM_LARGE)
return 0;
if (!CONST_INT_P (op2))
return 0;
offset = trunc_int_for_mode (INTVAL (op2), DImode);
switch (GET_CODE (op1))
{
case SYMBOL_REF:
/* TLS symbols are not constant. */
if (SYMBOL_REF_TLS_MODEL (op1))
return 0;
/* For CM_SMALL assume that latest object is 16MB before
end of 31bits boundary. We may also accept pretty
large negative constants knowing that all objects are
in the positive half of address space. */
if ((ix86_cmodel == CM_SMALL
|| (ix86_cmodel == CM_MEDIUM
&& !SYMBOL_REF_FAR_ADDR_P (op1)))
&& offset < 16*1024*1024
&& trunc_int_for_mode (offset, SImode) == offset)
return 1;
/* For CM_KERNEL we know that all object resist in the
negative half of 32bits address space. We may not
accept negative offsets, since they may be just off
and we may accept pretty large positive ones. */
if (ix86_cmodel == CM_KERNEL
&& offset > 0
&& trunc_int_for_mode (offset, SImode) == offset)
return 1;
break;
case LABEL_REF:
/* These conditions are similar to SYMBOL_REF ones, just the
constraints for code models differ. */
if ((ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM)
&& offset < 16*1024*1024
&& trunc_int_for_mode (offset, SImode) == offset)
return 1;
if (ix86_cmodel == CM_KERNEL
&& offset > 0
&& trunc_int_for_mode (offset, SImode) == offset)
return 1;
break;
case UNSPEC:
switch (XINT (op1, 1))
{
case UNSPEC_DTPOFF:
case UNSPEC_NTPOFF:
if (offset > 0
&& trunc_int_for_mode (offset, SImode) == offset)
return 1;
}
break;
default:
break;
}
}
break;
default:
gcc_unreachable ();
}
return 0;
}
static void
adjust_frame_related_expr (rtx last_sp_set, rtx insn,
HOST_WIDE_INT this_adjust)
{
rtx note = find_reg_note (last_sp_set, REG_FRAME_RELATED_EXPR, NULL_RTX);
rtx new_expr = NULL_RTX;
if (note == NULL_RTX && RTX_FRAME_RELATED_P (insn))
return;
if (note
&& GET_CODE (XEXP (note, 0)) == SEQUENCE
&& XVECLEN (XEXP (note, 0), 0) >= 2)
{
rtx expr = XEXP (note, 0);
rtx last = XVECEXP (expr, 0, XVECLEN (expr, 0) - 1);
int i;
if (GET_CODE (last) == SET
&& RTX_FRAME_RELATED_P (last) == RTX_FRAME_RELATED_P (insn)
&& SET_DEST (last) == stack_pointer_rtx
&& GET_CODE (SET_SRC (last)) == PLUS
&& XEXP (SET_SRC (last), 0) == stack_pointer_rtx
&& GET_CODE (XEXP (SET_SRC (last), 1)) == CONST_INT)
{
XEXP (SET_SRC (last), 1)
= GEN_INT (INTVAL (XEXP (SET_SRC (last), 1)) + this_adjust);
return;
}
new_expr = gen_rtx_SEQUENCE (VOIDmode,
rtvec_alloc (XVECLEN (expr, 0) + 1));
for (i = 0; i < XVECLEN (expr, 0); i++)
XVECEXP (new_expr, 0, i) = XVECEXP (expr, 0, i);
}
else
{
new_expr = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (2));
if (note)
XVECEXP (new_expr, 0, 0) = XEXP (note, 0);
else
{
rtx expr = copy_rtx (single_set_for_csa (last_sp_set));
XEXP (SET_SRC (expr), 1)
= GEN_INT (INTVAL (XEXP (SET_SRC (expr), 1)) - this_adjust);
RTX_FRAME_RELATED_P (expr) = 1;
XVECEXP (new_expr, 0, 0) = expr;
}
}
XVECEXP (new_expr, 0, XVECLEN (new_expr, 0) - 1)
= copy_rtx (single_set_for_csa (insn));
RTX_FRAME_RELATED_P (XVECEXP (new_expr, 0, XVECLEN (new_expr, 0) - 1))
= RTX_FRAME_RELATED_P (insn);
if (note)
XEXP (note, 0) = new_expr;
else
REG_NOTES (last_sp_set)
= gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR, new_expr,
REG_NOTES (last_sp_set));
}
void
eliminate_regs_in_insn (rtx_insn *insn, bool replace_p, bool first_p,
HOST_WIDE_INT update_sp_offset)
{
int icode = recog_memoized (insn);
rtx old_set = single_set (insn);
bool validate_p;
int i;
rtx substed_operand[MAX_RECOG_OPERANDS];
rtx orig_operand[MAX_RECOG_OPERANDS];
struct lra_elim_table *ep;
rtx plus_src, plus_cst_src;
lra_insn_recog_data_t id;
struct lra_static_insn_data *static_id;
if (icode < 0 && asm_noperands (PATTERN (insn)) < 0 && ! DEBUG_INSN_P (insn))
{
lra_assert (GET_CODE (PATTERN (insn)) == USE
|| GET_CODE (PATTERN (insn)) == CLOBBER
|| GET_CODE (PATTERN (insn)) == ASM_INPUT);
return;
}
/* Check for setting an eliminable register. */
if (old_set != 0 && REG_P (SET_DEST (old_set))
&& (ep = get_elimination (SET_DEST (old_set))) != NULL)
{
for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
if (ep->from_rtx == SET_DEST (old_set) && ep->can_eliminate)
{
bool delete_p = replace_p;
#ifdef HARD_FRAME_POINTER_REGNUM
if (ep->from == FRAME_POINTER_REGNUM
&& ep->to == HARD_FRAME_POINTER_REGNUM)
/* If this is setting the frame pointer register to the
hardware frame pointer register and this is an
elimination that will be done (tested above), this
insn is really adjusting the frame pointer downward
to compensate for the adjustment done before a
nonlocal goto. */
{
rtx src = SET_SRC (old_set);
rtx off = remove_reg_equal_offset_note (insn, ep->to_rtx);
/* We should never process such insn with non-zero
UPDATE_SP_OFFSET. */
lra_assert (update_sp_offset == 0);
if (off != NULL_RTX
|| src == ep->to_rtx
|| (GET_CODE (src) == PLUS
&& XEXP (src, 0) == ep->to_rtx
&& CONST_INT_P (XEXP (src, 1))))
{
HOST_WIDE_INT offset;
if (replace_p)
{
SET_DEST (old_set) = ep->to_rtx;
lra_update_insn_recog_data (insn);
return;
}
offset = (off != NULL_RTX ? INTVAL (off)
: src == ep->to_rtx ? 0 : INTVAL (XEXP (src, 1)));
offset -= (ep->offset - ep->previous_offset);
src = plus_constant (Pmode, ep->to_rtx, offset);
/* First see if this insn remains valid when we
make the change. If not, keep the INSN_CODE
the same and let the constraint pass fit it
up. */
validate_change (insn, &SET_SRC (old_set), src, 1);
validate_change (insn, &SET_DEST (old_set),
ep->from_rtx, 1);
if (! apply_change_group ())
{
SET_SRC (old_set) = src;
SET_DEST (old_set) = ep->from_rtx;
}
lra_update_insn_recog_data (insn);
/* Add offset note for future updates. */
add_reg_note (insn, REG_EQUAL, src);
return;
}
}
#endif
/* This insn isn't serving a useful purpose. We delete it
when REPLACE is set. */
if (delete_p)
lra_delete_dead_insn (insn);
return;
}
}
/* We allow one special case which happens to work on all machines we
currently support: a single set with the source or a REG_EQUAL
note being a PLUS of an eliminable register and a constant. */
plus_src = plus_cst_src = 0;
if (old_set && REG_P (SET_DEST (old_set)))
{
if (GET_CODE (SET_SRC (old_set)) == PLUS)
plus_src = SET_SRC (old_set);
/* First see if the source is of the form (plus (...) CST). */
if (plus_src
&& CONST_INT_P (XEXP (plus_src, 1)))
plus_cst_src = plus_src;
/* Check that the first operand of the PLUS is a hard reg or
the lowpart subreg of one. */
if (plus_cst_src)
{
rtx reg = XEXP (plus_cst_src, 0);
if (GET_CODE (reg) == SUBREG && subreg_lowpart_p (reg))
reg = SUBREG_REG (reg);
if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
plus_cst_src = 0;
}
}
if (plus_cst_src)
{
rtx reg = XEXP (plus_cst_src, 0);
HOST_WIDE_INT offset = INTVAL (XEXP (plus_cst_src, 1));
if (GET_CODE (reg) == SUBREG)
reg = SUBREG_REG (reg);
if (REG_P (reg) && (ep = get_elimination (reg)) != NULL)
{
rtx to_rtx = replace_p ? ep->to_rtx : ep->from_rtx;
if (! replace_p)
{
if (update_sp_offset == 0)
offset += (ep->offset - ep->previous_offset);
if (ep->to_rtx == stack_pointer_rtx)
{
if (first_p)
offset -= lra_get_insn_recog_data (insn)->sp_offset;
else
offset += update_sp_offset;
}
offset = trunc_int_for_mode (offset, GET_MODE (plus_cst_src));
}
if (GET_CODE (XEXP (plus_cst_src, 0)) == SUBREG)
to_rtx = gen_lowpart (GET_MODE (XEXP (plus_cst_src, 0)), to_rtx);
/* If we have a nonzero offset, and the source is already a
simple REG, the following transformation would increase
the cost of the insn by replacing a simple REG with (plus
(reg sp) CST). So try only when we already had a PLUS
before. */
if (offset == 0 || plus_src)
{
rtx new_src = plus_constant (GET_MODE (to_rtx), to_rtx, offset);
old_set = single_set (insn);
/* First see if this insn remains valid when we make the
change. If not, try to replace the whole pattern
with a simple set (this may help if the original insn
was a PARALLEL that was only recognized as single_set
due to REG_UNUSED notes). If this isn't valid
either, keep the INSN_CODE the same and let the
constraint pass fix it up. */
if (! validate_change (insn, &SET_SRC (old_set), new_src, 0))
{
rtx new_pat = gen_rtx_SET (SET_DEST (old_set), new_src);
if (! validate_change (insn, &PATTERN (insn), new_pat, 0))
SET_SRC (old_set) = new_src;
}
lra_update_insn_recog_data (insn);
/* This can't have an effect on elimination offsets, so skip
right to the end. */
return;
}
}
}
/* Eliminate all eliminable registers occurring in operands that
can be handled by the constraint pass. */
id = lra_get_insn_recog_data (insn);
static_id = id->insn_static_data;
validate_p = false;
for (i = 0; i < static_id->n_operands; i++)
{
orig_operand[i] = *id->operand_loc[i];
substed_operand[i] = *id->operand_loc[i];
/* For an asm statement, every operand is eliminable. */
if (icode < 0 || insn_data[icode].operand[i].eliminable)
{
/* Check for setting a hard register that we know about. */
if (static_id->operand[i].type != OP_IN
&& REG_P (orig_operand[i]))
{
/* If we are assigning to a hard register that can be
eliminated, it must be as part of a PARALLEL, since
the code above handles single SETs. This reg can not
be longer eliminated -- it is forced by
mark_not_eliminable. */
for (ep = reg_eliminate;
ep < ®_eliminate[NUM_ELIMINABLE_REGS];
ep++)
lra_assert (ep->from_rtx != orig_operand[i]
|| ! ep->can_eliminate);
}
/* Companion to the above plus substitution, we can allow
invariants as the source of a plain move. */
substed_operand[i]
= lra_eliminate_regs_1 (insn, *id->operand_loc[i], VOIDmode,
replace_p, ! replace_p && ! first_p,
update_sp_offset, first_p);
if (substed_operand[i] != orig_operand[i])
validate_p = true;
}
}
if (! validate_p)
return;
/* Substitute the operands; the new values are in the substed_operand
array. */
for (i = 0; i < static_id->n_operands; i++)
*id->operand_loc[i] = substed_operand[i];
for (i = 0; i < static_id->n_dups; i++)
*id->dup_loc[i] = substed_operand[(int) static_id->dup_num[i]];
/* If we had a move insn but now we don't, re-recognize it.
This will cause spurious re-recognition if the old move had a
PARALLEL since the new one still will, but we can't call
single_set without having put new body into the insn and the
re-recognition won't hurt in this rare case. */
id = lra_update_insn_recog_data (insn);
static_id = id->insn_static_data;
}
/**
* \brief Parse command line style overrides (--ass-force-style option)
* \param track track to apply overrides to
* The format for overrides is [StyleName.]Field=Value
*/
void ass_process_force_style(ASS_Track *track)
{
char **fs, *eq, *dt, *style, *tname, *token;
ASS_Style *target;
int sid;
char **list = track->library->style_overrides;
if (!list)
return;
for (fs = list; *fs; ++fs) {
eq = strrchr(*fs, '=');
if (!eq)
continue;
*eq = '\0';
token = eq + 1;
if (!strcasecmp(*fs, "PlayResX"))
track->PlayResX = atoi(token);
else if (!strcasecmp(*fs, "PlayResY"))
track->PlayResY = atoi(token);
else if (!strcasecmp(*fs, "Timer"))
track->Timer = ass_atof(token);
else if (!strcasecmp(*fs, "WrapStyle"))
track->WrapStyle = atoi(token);
else if (!strcasecmp(*fs, "ScaledBorderAndShadow"))
track->ScaledBorderAndShadow = parse_bool(token);
else if (!strcasecmp(*fs, "Kerning"))
track->Kerning = parse_bool(token);
dt = strrchr(*fs, '.');
if (dt) {
*dt = '\0';
style = *fs;
tname = dt + 1;
} else {
style = NULL;
tname = *fs;
}
for (sid = 0; sid < track->n_styles; ++sid) {
if (style == NULL
|| strcasecmp(track->styles[sid].Name, style) == 0) {
target = track->styles + sid;
if (0) {
STRVAL(FontName)
COLORVAL(PrimaryColour)
COLORVAL(SecondaryColour)
COLORVAL(OutlineColour)
COLORVAL(BackColour)
FPVAL(FontSize)
INTVAL(Bold)
INTVAL(Italic)
INTVAL(Underline)
INTVAL(StrikeOut)
FPVAL(Spacing)
INTVAL(Angle)
INTVAL(BorderStyle)
INTVAL(Alignment)
INTVAL(MarginL)
INTVAL(MarginR)
INTVAL(MarginV)
INTVAL(Encoding)
FPVAL(ScaleX)
FPVAL(ScaleY)
FPVAL(Outline)
FPVAL(Shadow)
}
}
}
*eq = '=';
if (dt)
*dt = '.';
}
/* Function to check whether the OP is a valid load/store operation.
This is a helper function for the predicates:
'nds32_load_multiple_operation' and 'nds32_store_multiple_operation'
in predicates.md file.
The OP is supposed to be a parallel rtx.
For each element within this parallel rtx:
(set (reg) (mem addr)) is the form for load operation.
(set (mem addr) (reg)) is the form for store operation.
We have to extract reg and mem of every element and
check if the information is valid for multiple load/store operation. */
bool
nds32_valid_multiple_load_store_p (rtx op, bool load_p, bool bim_p)
{
int count;
int first_elt_regno;
int update_base_elt_idx;
int offset;
rtx elt;
rtx update_base;
/* Get the counts of elements in the parallel rtx.
Last one is update base register if bim_p.
and pick up the first element. */
if (bim_p)
{
count = XVECLEN (op, 0) - 1;
elt = XVECEXP (op, 0, 1);
}
else
{
count = XVECLEN (op, 0);
elt = XVECEXP (op, 0, 0);
}
/* Perform some quick check for the first element in the parallel rtx. */
if (GET_CODE (elt) != SET
|| count <= 1
|| count > 25)
return false;
/* Pick up regno of first element for further detail checking.
Note that the form is different between load and store operation. */
if (load_p)
{
if (GET_CODE (SET_DEST (elt)) != REG
|| GET_CODE (SET_SRC (elt)) != MEM)
return false;
first_elt_regno = REGNO (SET_DEST (elt));
}
else
{
if (GET_CODE (SET_SRC (elt)) != REG
|| GET_CODE (SET_DEST (elt)) != MEM)
return false;
first_elt_regno = REGNO (SET_SRC (elt));
}
/* Perform detail check for each element.
Refer to nds32-multiple.md for more information
about following checking.
The starting element of parallel rtx is index 0. */
if (!nds32_consecutive_registers_load_store_p (op, load_p, bim_p ? 1 : 0,
first_elt_regno,
count))
return false;
if (bim_p)
{
update_base_elt_idx = 0;
update_base = XVECEXP (op, 0, update_base_elt_idx);
if (!REG_P (SET_DEST (update_base)))
return false;
if (GET_CODE (SET_SRC (update_base)) != PLUS)
return false;
else
{
offset = count * UNITS_PER_WORD;
elt = XEXP (SET_SRC (update_base), 1);
if (GET_CODE (elt) != CONST_INT
|| (INTVAL (elt) != offset))
return false;
}
}
/* Pass all test, this is a valid rtx. */
return true;
}
static bool
find_mem (rtx *address_of_x)
{
rtx x = *address_of_x;
enum rtx_code code = GET_CODE (x);
const char *const fmt = GET_RTX_FORMAT (code);
int i;
if (code == MEM && REG_P (XEXP (x, 0)))
{
/* Match with *reg0. */
mem_insn.mem_loc = address_of_x;
mem_insn.reg0 = XEXP (x, 0);
mem_insn.reg1_is_const = true;
mem_insn.reg1_val = 0;
mem_insn.reg1 = GEN_INT (0);
if (find_inc (true))
return true;
}
if (code == MEM && GET_CODE (XEXP (x, 0)) == PLUS
&& REG_P (XEXP (XEXP (x, 0), 0)))
{
rtx reg1 = XEXP (XEXP (x, 0), 1);
mem_insn.mem_loc = address_of_x;
mem_insn.reg0 = XEXP (XEXP (x, 0), 0);
mem_insn.reg1 = reg1;
if (CONST_INT_P (reg1))
{
mem_insn.reg1_is_const = true;
/* Match with *(reg0 + c) where c is a const. */
mem_insn.reg1_val = INTVAL (reg1);
if (find_inc (true))
return true;
}
else if (REG_P (reg1))
{
/* Match with *(reg0 + reg1). */
mem_insn.reg1_is_const = false;
if (find_inc (true))
return true;
}
}
if (code == SIGN_EXTRACT || code == ZERO_EXTRACT)
{
/* If REG occurs inside a MEM used in a bit-field reference,
that is unacceptable. */
return false;
}
/* Time for some deep diving. */
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
{
if (fmt[i] == 'e')
{
if (find_mem (&XEXP (x, i)))
return true;
}
else if (fmt[i] == 'E')
{
int j;
for (j = XVECLEN (x, i) - 1; j >= 0; j--)
if (find_mem (&XVECEXP (x, i, j)))
return true;
}
}
return false;
}
static void
gen_int_relational (enum rtx_code code,
rtx result,
rtx cmp0,
rtx cmp1,
rtx destination)
{
enum machine_mode mode;
int branch_p;
mode = GET_MODE (cmp0);
if (mode == VOIDmode)
mode = GET_MODE (cmp1);
/* Is this a branch or compare. */
branch_p = (destination != 0);
/* Instruction set doesn't support LE or LT, so swap operands and use
GE, GT. */
switch (code)
{
case LE:
case LT:
case LEU:
case LTU:
{
rtx temp;
code = swap_condition (code);
temp = cmp0;
cmp0 = cmp1;
cmp1 = temp;
break;
}
default:
break;
}
if (branch_p)
{
rtx insn, cond, label;
/* Operands must be in registers. */
if (!register_operand (cmp0, mode))
cmp0 = force_reg (mode, cmp0);
if (!register_operand (cmp1, mode))
cmp1 = force_reg (mode, cmp1);
/* Generate conditional branch instruction. */
cond = gen_rtx_fmt_ee (code, mode, cmp0, cmp1);
label = gen_rtx_LABEL_REF (VOIDmode, destination);
insn = gen_rtx_SET (VOIDmode, pc_rtx,
gen_rtx_IF_THEN_ELSE (VOIDmode,
cond, label, pc_rtx));
emit_jump_insn (insn);
}
else
{
/* We can't have const_ints in cmp0, other than 0. */
if ((GET_CODE (cmp0) == CONST_INT) && (INTVAL (cmp0) != 0))
cmp0 = force_reg (mode, cmp0);
/* If the comparison is against an int not in legal range
move it into a register. */
if (GET_CODE (cmp1) == CONST_INT)
{
switch (code)
{
case EQ:
case NE:
case LE:
case LT:
case GE:
case GT:
if (!satisfies_constraint_K (cmp1))
cmp1 = force_reg (mode, cmp1);
break;
case LEU:
case LTU:
case GEU:
case GTU:
if (!satisfies_constraint_L (cmp1))
cmp1 = force_reg (mode, cmp1);
break;
default:
gcc_unreachable ();
}
}
/* Generate compare instruction. */
emit_move_insn (result, gen_rtx_fmt_ee (code, mode, cmp0, cmp1));
}
}
static int
find_address (rtx *address_of_x)
{
rtx x = *address_of_x;
enum rtx_code code = GET_CODE (x);
const char *const fmt = GET_RTX_FORMAT (code);
int i;
int value = 0;
int tem;
if (code == MEM && rtx_equal_p (XEXP (x, 0), inc_insn.reg_res))
{
/* Match with *reg0. */
mem_insn.mem_loc = address_of_x;
mem_insn.reg0 = inc_insn.reg_res;
mem_insn.reg1_is_const = true;
mem_insn.reg1_val = 0;
mem_insn.reg1 = GEN_INT (0);
return -1;
}
if (code == MEM && GET_CODE (XEXP (x, 0)) == PLUS
&& rtx_equal_p (XEXP (XEXP (x, 0), 0), inc_insn.reg_res))
{
rtx b = XEXP (XEXP (x, 0), 1);
mem_insn.mem_loc = address_of_x;
mem_insn.reg0 = inc_insn.reg_res;
mem_insn.reg1 = b;
mem_insn.reg1_is_const = inc_insn.reg1_is_const;
if (CONST_INT_P (b))
{
/* Match with *(reg0 + reg1) where reg1 is a const. */
HOST_WIDE_INT val = INTVAL (b);
if (inc_insn.reg1_is_const
&& (inc_insn.reg1_val == val || inc_insn.reg1_val == -val))
{
mem_insn.reg1_val = val;
return -1;
}
}
else if (!inc_insn.reg1_is_const
&& rtx_equal_p (inc_insn.reg1, b))
/* Match with *(reg0 + reg1). */
return -1;
}
if (code == SIGN_EXTRACT || code == ZERO_EXTRACT)
{
/* If REG occurs inside a MEM used in a bit-field reference,
that is unacceptable. */
if (find_address (&XEXP (x, 0)))
return 1;
}
if (x == inc_insn.reg_res)
return 1;
/* Time for some deep diving. */
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
{
if (fmt[i] == 'e')
{
tem = find_address (&XEXP (x, i));
/* If this is the first use, let it go so the rest of the
insn can be checked. */
if (value == 0)
value = tem;
else if (tem != 0)
/* More than one match was found. */
return 1;
}
else if (fmt[i] == 'E')
{
int j;
for (j = XVECLEN (x, i) - 1; j >= 0; j--)
{
tem = find_address (&XVECEXP (x, i, j));
/* If this is the first use, let it go so the rest of
the insn can be checked. */
if (value == 0)
value = tem;
else if (tem != 0)
/* More than one match was found. */
return 1;
}
}
}
return value;
}
static bool
lm32_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED,
int *total, bool speed)
{
enum machine_mode mode = GET_MODE (x);
bool small_mode;
const int arithmetic_latency = 1;
const int shift_latency = 1;
const int compare_latency = 2;
const int multiply_latency = 3;
const int load_latency = 3;
const int libcall_size_cost = 5;
/* Determine if we can handle the given mode size in a single instruction. */
small_mode = (mode == QImode) || (mode == HImode) || (mode == SImode);
switch (code)
{
case PLUS:
case MINUS:
case AND:
case IOR:
case XOR:
case NOT:
case NEG:
if (!speed)
*total = COSTS_N_INSNS (LM32_NUM_REGS (mode));
else
*total =
COSTS_N_INSNS (arithmetic_latency + (LM32_NUM_REGS (mode) - 1));
break;
case COMPARE:
if (small_mode)
{
if (!speed)
*total = COSTS_N_INSNS (1);
else
*total = COSTS_N_INSNS (compare_latency);
}
else
{
/* FIXME. Guessing here. */
*total = COSTS_N_INSNS (LM32_NUM_REGS (mode) * (2 + 3) / 2);
}
break;
case ASHIFT:
case ASHIFTRT:
case LSHIFTRT:
if (TARGET_BARREL_SHIFT_ENABLED && small_mode)
{
if (!speed)
*total = COSTS_N_INSNS (1);
else
*total = COSTS_N_INSNS (shift_latency);
}
else if (TARGET_BARREL_SHIFT_ENABLED)
{
/* FIXME: Guessing here. */
*total = COSTS_N_INSNS (LM32_NUM_REGS (mode) * 4);
}
else if (small_mode && GET_CODE (XEXP (x, 1)) == CONST_INT)
{
*total = COSTS_N_INSNS (INTVAL (XEXP (x, 1)));
}
else
{
/* Libcall. */
if (!speed)
*total = COSTS_N_INSNS (libcall_size_cost);
else
*total = COSTS_N_INSNS (100);
}
break;
case MULT:
if (TARGET_MULTIPLY_ENABLED && small_mode)
{
if (!speed)
*total = COSTS_N_INSNS (1);
else
*total = COSTS_N_INSNS (multiply_latency);
}
else
{
/* Libcall. */
if (!speed)
*total = COSTS_N_INSNS (libcall_size_cost);
else
*total = COSTS_N_INSNS (100);
}
break;
case DIV:
case MOD:
case UDIV:
case UMOD:
if (TARGET_DIVIDE_ENABLED && small_mode)
{
if (!speed)
*total = COSTS_N_INSNS (1);
else
{
if (GET_CODE (XEXP (x, 1)) == CONST_INT)
{
int cycles = 0;
unsigned HOST_WIDE_INT i = INTVAL (XEXP (x, 1));
while (i)
{
i >>= 2;
cycles++;
}
if (IN_RANGE (i, 0, 65536))
*total = COSTS_N_INSNS (1 + 1 + cycles);
else
*total = COSTS_N_INSNS (2 + 1 + cycles);
return true;
}
else if (GET_CODE (XEXP (x, 1)) == REG)
{
*total = COSTS_N_INSNS (1 + GET_MODE_SIZE (mode) / 2);
return true;
}
else
{
*total = COSTS_N_INSNS (1 + GET_MODE_SIZE (mode) / 2);
return false;
}
}
}
void
print_value (pretty_printer *pp, const_rtx x, int verbose)
{
char tmp[1024];
if (!x)
{
pp_string (pp, "(nil)");
return;
}
switch (GET_CODE (x))
{
case CONST_INT:
pp_scalar (pp, HOST_WIDE_INT_PRINT_HEX,
(unsigned HOST_WIDE_INT) INTVAL (x));
break;
case CONST_WIDE_INT:
{
const char *sep = "<";
int i;
for (i = CONST_WIDE_INT_NUNITS (x) - 1; i >= 0; i--)
{
pp_string (pp, sep);
sep = ",";
sprintf (tmp, HOST_WIDE_INT_PRINT_HEX,
(unsigned HOST_WIDE_INT) CONST_WIDE_INT_ELT (x, i));
pp_string (pp, tmp);
}
pp_greater (pp);
}
break;
case CONST_DOUBLE:
if (FLOAT_MODE_P (GET_MODE (x)))
{
real_to_decimal (tmp, CONST_DOUBLE_REAL_VALUE (x),
sizeof (tmp), 0, 1);
pp_string (pp, tmp);
}
else
pp_printf (pp, "<%wx,%wx>",
(unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x),
(unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x));
break;
case CONST_FIXED:
fixed_to_decimal (tmp, CONST_FIXED_VALUE (x), sizeof (tmp));
pp_string (pp, tmp);
break;
case CONST_STRING:
pp_printf (pp, "\"%s\"", XSTR (x, 0));
break;
case SYMBOL_REF:
pp_printf (pp, "`%s'", XSTR (x, 0));
break;
case LABEL_REF:
pp_printf (pp, "L%d", INSN_UID (XEXP (x, 0)));
break;
case CONST:
case HIGH:
case STRICT_LOW_PART:
pp_printf (pp, "%s(", GET_RTX_NAME (GET_CODE (x)));
print_value (pp, XEXP (x, 0), verbose);
pp_right_paren (pp);
break;
case REG:
if (REGNO (x) < FIRST_PSEUDO_REGISTER)
{
if (ISDIGIT (reg_names[REGNO (x)][0]))
pp_modulo (pp);
pp_string (pp, reg_names[REGNO (x)]);
}
else
pp_printf (pp, "r%d", REGNO (x));
if (verbose)
pp_printf (pp, ":%s", GET_MODE_NAME (GET_MODE (x)));
break;
case SUBREG:
print_value (pp, SUBREG_REG (x), verbose);
pp_printf (pp, "#%d", SUBREG_BYTE (x));
break;
case SCRATCH:
case CC0:
case PC:
pp_string (pp, GET_RTX_NAME (GET_CODE (x)));
break;
case MEM:
pp_left_bracket (pp);
print_value (pp, XEXP (x, 0), verbose);
pp_right_bracket (pp);
break;
case DEBUG_EXPR:
pp_printf (pp, "D#%i", DEBUG_TEMP_UID (DEBUG_EXPR_TREE_DECL (x)));
break;
default:
print_exp (pp, x, verbose);
break;
}
} /* print_value */
static void
fixup_reorder_chain (void)
{
basic_block bb, prev_bb;
int index;
rtx insn = NULL;
if (cfg_layout_function_header)
{
set_first_insn (cfg_layout_function_header);
insn = cfg_layout_function_header;
while (NEXT_INSN (insn))
insn = NEXT_INSN (insn);
}
/* First do the bulk reordering -- rechain the blocks without regard to
the needed changes to jumps and labels. */
for (bb = ENTRY_BLOCK_PTR->next_bb, index = NUM_FIXED_BLOCKS;
bb != 0;
bb = bb->aux, index++)
{
if (bb->il.rtl->header)
{
if (insn)
NEXT_INSN (insn) = bb->il.rtl->header;
else
set_first_insn (bb->il.rtl->header);
PREV_INSN (bb->il.rtl->header) = insn;
insn = bb->il.rtl->header;
while (NEXT_INSN (insn))
insn = NEXT_INSN (insn);
}
if (insn)
NEXT_INSN (insn) = BB_HEAD (bb);
else
set_first_insn (BB_HEAD (bb));
PREV_INSN (BB_HEAD (bb)) = insn;
insn = BB_END (bb);
if (bb->il.rtl->footer)
{
NEXT_INSN (insn) = bb->il.rtl->footer;
PREV_INSN (bb->il.rtl->footer) = insn;
while (NEXT_INSN (insn))
insn = NEXT_INSN (insn);
}
}
gcc_assert (index == n_basic_blocks);
NEXT_INSN (insn) = cfg_layout_function_footer;
if (cfg_layout_function_footer)
PREV_INSN (cfg_layout_function_footer) = insn;
while (NEXT_INSN (insn))
insn = NEXT_INSN (insn);
set_last_insn (insn);
#ifdef ENABLE_CHECKING
verify_insn_chain ();
#endif
delete_dead_jumptables ();
/* Now add jumps and labels as needed to match the blocks new
outgoing edges. */
for (bb = ENTRY_BLOCK_PTR->next_bb; bb ; bb = bb->aux)
{
edge e_fall, e_taken, e;
rtx bb_end_insn;
basic_block nb;
edge_iterator ei;
if (EDGE_COUNT (bb->succs) == 0)
continue;
/* Find the old fallthru edge, and another non-EH edge for
a taken jump. */
e_taken = e_fall = NULL;
FOR_EACH_EDGE (e, ei, bb->succs)
if (e->flags & EDGE_FALLTHRU)
e_fall = e;
else if (! (e->flags & EDGE_EH))
e_taken = e;
bb_end_insn = BB_END (bb);
if (JUMP_P (bb_end_insn))
{
if (any_condjump_p (bb_end_insn))
{
/* If the old fallthru is still next, nothing to do. */
if (bb->aux == e_fall->dest
|| e_fall->dest == EXIT_BLOCK_PTR)
continue;
/* The degenerated case of conditional jump jumping to the next
instruction can happen for jumps with side effects. We need
to construct a forwarder block and this will be done just
fine by force_nonfallthru below. */
if (!e_taken)
;
/* There is another special case: if *neither* block is next,
such as happens at the very end of a function, then we'll
need to add a new unconditional jump. Choose the taken
edge based on known or assumed probability. */
else if (bb->aux != e_taken->dest)
{
rtx note = find_reg_note (bb_end_insn, REG_BR_PROB, 0);
if (note
&& INTVAL (XEXP (note, 0)) < REG_BR_PROB_BASE / 2
&& invert_jump (bb_end_insn,
(e_fall->dest == EXIT_BLOCK_PTR
? NULL_RTX
: label_for_bb (e_fall->dest)), 0))
{
e_fall->flags &= ~EDGE_FALLTHRU;
#ifdef ENABLE_CHECKING
gcc_assert (could_fall_through
(e_taken->src, e_taken->dest));
#endif
e_taken->flags |= EDGE_FALLTHRU;
update_br_prob_note (bb);
e = e_fall, e_fall = e_taken, e_taken = e;
}
}
/* If the "jumping" edge is a crossing edge, and the fall
through edge is non-crossing, leave things as they are. */
else if ((e_taken->flags & EDGE_CROSSING)
&& !(e_fall->flags & EDGE_CROSSING))
continue;
/* Otherwise we can try to invert the jump. This will
basically never fail, however, keep up the pretense. */
else if (invert_jump (bb_end_insn,
(e_fall->dest == EXIT_BLOCK_PTR
? NULL_RTX
: label_for_bb (e_fall->dest)), 0))
{
e_fall->flags &= ~EDGE_FALLTHRU;
#ifdef ENABLE_CHECKING
gcc_assert (could_fall_through
(e_taken->src, e_taken->dest));
#endif
e_taken->flags |= EDGE_FALLTHRU;
update_br_prob_note (bb);
continue;
}
}
else
{
/* Otherwise we have some return, switch or computed
jump. In the 99% case, there should not have been a
fallthru edge. */
gcc_assert (returnjump_p (bb_end_insn) || !e_fall);
continue;
}
}
else
{
/* No fallthru implies a noreturn function with EH edges, or
something similarly bizarre. In any case, we don't need to
do anything. */
if (! e_fall)
continue;
/* If the fallthru block is still next, nothing to do. */
if (bb->aux == e_fall->dest)
continue;
/* A fallthru to exit block. */
if (e_fall->dest == EXIT_BLOCK_PTR)
continue;
}
/* We got here if we need to add a new jump insn. */
nb = force_nonfallthru (e_fall);
if (nb)
{
nb->il.rtl->visited = 1;
nb->aux = bb->aux;
bb->aux = nb;
/* Don't process this new block. */
bb = nb;
/* Make sure new bb is tagged for correct section (same as
fall-thru source, since you cannot fall-throu across
section boundaries). */
BB_COPY_PARTITION (e_fall->src, single_pred (bb));
if (flag_reorder_blocks_and_partition
&& targetm.have_named_sections
&& JUMP_P (BB_END (bb))
&& !any_condjump_p (BB_END (bb))
&& (EDGE_SUCC (bb, 0)->flags & EDGE_CROSSING))
REG_NOTES (BB_END (bb)) = gen_rtx_EXPR_LIST
(REG_CROSSING_JUMP, NULL_RTX, REG_NOTES (BB_END (bb)));
}
}
/* Put basic_block_info in the new order. */
if (dump_file)
{
fprintf (dump_file, "Reordered sequence:\n");
for (bb = ENTRY_BLOCK_PTR->next_bb, index = NUM_FIXED_BLOCKS;
bb;
bb = bb->aux, index++)
{
fprintf (dump_file, " %i ", index);
if (get_bb_original (bb))
fprintf (dump_file, "duplicate of %i ",
get_bb_original (bb)->index);
else if (forwarder_block_p (bb)
&& !LABEL_P (BB_HEAD (bb)))
fprintf (dump_file, "compensation ");
else
fprintf (dump_file, "bb %i ", bb->index);
fprintf (dump_file, " [%i]\n", bb->frequency);
}
}
prev_bb = ENTRY_BLOCK_PTR;
bb = ENTRY_BLOCK_PTR->next_bb;
index = NUM_FIXED_BLOCKS;
for (; bb; prev_bb = bb, bb = bb->aux, index ++)
{
bb->index = index;
SET_BASIC_BLOCK (index, bb);
bb->prev_bb = prev_bb;
prev_bb->next_bb = bb;
}
prev_bb->next_bb = EXIT_BLOCK_PTR;
EXIT_BLOCK_PTR->prev_bb = prev_bb;
/* Annoying special case - jump around dead jumptables left in the code. */
FOR_EACH_BB (bb)
{
edge e;
edge_iterator ei;
FOR_EACH_EDGE (e, ei, bb->succs)
if (e->flags & EDGE_FALLTHRU)
break;
if (e && !can_fallthru (e->src, e->dest))
force_nonfallthru (e);
}
}
static bool
combine_set_extension (ext_cand *cand, rtx_insn *curr_insn, rtx *orig_set)
{
rtx orig_src = SET_SRC (*orig_set);
machine_mode orig_mode = GET_MODE (SET_DEST (*orig_set));
rtx new_set;
rtx cand_pat = PATTERN (cand->insn);
/* If the extension's source/destination registers are not the same
then we need to change the original load to reference the destination
of the extension. Then we need to emit a copy from that destination
to the original destination of the load. */
rtx new_reg;
bool copy_needed
= (REGNO (SET_DEST (cand_pat)) != REGNO (XEXP (SET_SRC (cand_pat), 0)));
if (copy_needed)
new_reg = gen_rtx_REG (cand->mode, REGNO (SET_DEST (cand_pat)));
else
new_reg = gen_rtx_REG (cand->mode, REGNO (SET_DEST (*orig_set)));
#if 0
/* Rethinking test. Temporarily disabled. */
/* We're going to be widening the result of DEF_INSN, ensure that doing so
doesn't change the number of hard registers needed for the result. */
if (HARD_REGNO_NREGS (REGNO (new_reg), cand->mode)
!= HARD_REGNO_NREGS (REGNO (SET_DEST (*orig_set)),
GET_MODE (SET_DEST (*orig_set))))
return false;
#endif
/* Merge constants by directly moving the constant into the register under
some conditions. Recall that RTL constants are sign-extended. */
if (GET_CODE (orig_src) == CONST_INT
&& HOST_BITS_PER_WIDE_INT >= GET_MODE_BITSIZE (cand->mode))
{
if (INTVAL (orig_src) >= 0 || cand->code == SIGN_EXTEND)
new_set = gen_rtx_SET (new_reg, orig_src);
else
{
/* Zero-extend the negative constant by masking out the bits outside
the source mode. */
rtx new_const_int
= gen_int_mode (INTVAL (orig_src) & GET_MODE_MASK (orig_mode),
GET_MODE (new_reg));
new_set = gen_rtx_SET (new_reg, new_const_int);
}
}
else if (GET_MODE (orig_src) == VOIDmode)
{
/* This is mostly due to a call insn that should not be optimized. */
return false;
}
else if (GET_CODE (orig_src) == cand->code)
{
/* Here is a sequence of two extensions. Try to merge them. */
rtx temp_extension
= gen_rtx_fmt_e (cand->code, cand->mode, XEXP (orig_src, 0));
rtx simplified_temp_extension = simplify_rtx (temp_extension);
if (simplified_temp_extension)
temp_extension = simplified_temp_extension;
new_set = gen_rtx_SET (new_reg, temp_extension);
}
else if (GET_CODE (orig_src) == IF_THEN_ELSE)
{
/* Only IF_THEN_ELSE of phi-type copies are combined. Otherwise,
in general, IF_THEN_ELSE should not be combined. */
return false;
}
else
{
/* This is the normal case. */
rtx temp_extension
= gen_rtx_fmt_e (cand->code, cand->mode, orig_src);
rtx simplified_temp_extension = simplify_rtx (temp_extension);
if (simplified_temp_extension)
temp_extension = simplified_temp_extension;
new_set = gen_rtx_SET (new_reg, temp_extension);
}
/* This change is a part of a group of changes. Hence,
validate_change will not try to commit the change. */
if (validate_change (curr_insn, orig_set, new_set, true)
&& update_reg_equal_equiv_notes (curr_insn, cand->mode, orig_mode,
cand->code))
{
if (dump_file)
{
fprintf (dump_file,
"Tentatively merged extension with definition %s:\n",
(copy_needed) ? "(copy needed)" : "");
print_rtl_single (dump_file, curr_insn);
}
return true;
}
return false;
}
void
fr30_print_operand (FILE *file, rtx x, int code)
{
rtx x0;
switch (code)
{
case '#':
/* Output a :D if this instruction is delayed. */
if (dbr_sequence_length () != 0)
fputs (":D", file);
return;
case 'p':
/* Compute the register name of the second register in a hi/lo
register pair. */
if (GET_CODE (x) != REG)
output_operand_lossage ("fr30_print_operand: unrecognized %%p code");
else
fprintf (file, "r%d", REGNO (x) + 1);
return;
case 'b':
/* Convert GCC's comparison operators into FR30 comparison codes. */
switch (GET_CODE (x))
{
case EQ: fprintf (file, "eq"); break;
case NE: fprintf (file, "ne"); break;
case LT: fprintf (file, "lt"); break;
case LE: fprintf (file, "le"); break;
case GT: fprintf (file, "gt"); break;
case GE: fprintf (file, "ge"); break;
case LTU: fprintf (file, "c"); break;
case LEU: fprintf (file, "ls"); break;
case GTU: fprintf (file, "hi"); break;
case GEU: fprintf (file, "nc"); break;
default:
output_operand_lossage ("fr30_print_operand: unrecognized %%b code");
break;
}
return;
case 'B':
/* Convert GCC's comparison operators into the complimentary FR30
comparison codes. */
switch (GET_CODE (x))
{
case EQ: fprintf (file, "ne"); break;
case NE: fprintf (file, "eq"); break;
case LT: fprintf (file, "ge"); break;
case LE: fprintf (file, "gt"); break;
case GT: fprintf (file, "le"); break;
case GE: fprintf (file, "lt"); break;
case LTU: fprintf (file, "nc"); break;
case LEU: fprintf (file, "hi"); break;
case GTU: fprintf (file, "ls"); break;
case GEU: fprintf (file, "c"); break;
default:
output_operand_lossage ("fr30_print_operand: unrecognized %%B code");
break;
}
return;
case 'A':
/* Print a signed byte value as an unsigned value. */
if (GET_CODE (x) != CONST_INT)
output_operand_lossage ("fr30_print_operand: invalid operand to %%A code");
else
{
HOST_WIDE_INT val;
val = INTVAL (x);
val &= 0xff;
fprintf (file, HOST_WIDE_INT_PRINT_DEC, val);
}
return;
case 'x':
if (GET_CODE (x) != CONST_INT
|| INTVAL (x) < 16
|| INTVAL (x) > 32)
output_operand_lossage ("fr30_print_operand: invalid %%x code");
else
fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) - 16);
return;
case 'F':
if (GET_CODE (x) != CONST_DOUBLE)
output_operand_lossage ("fr30_print_operand: invalid %%F code");
else
{
char str[30];
real_to_decimal (str, CONST_DOUBLE_REAL_VALUE (x),
sizeof (str), 0, 1);
fputs (str, file);
}
return;
case 0:
/* Handled below. */
break;
default:
fprintf (stderr, "unknown code = %x\n", code);
output_operand_lossage ("fr30_print_operand: unknown code");
return;
}
switch (GET_CODE (x))
{
case REG:
fputs (reg_names [REGNO (x)], file);
break;
case MEM:
x0 = XEXP (x,0);
switch (GET_CODE (x0))
{
case REG:
gcc_assert ((unsigned) REGNO (x0) < ARRAY_SIZE (reg_names));
fprintf (file, "@%s", reg_names [REGNO (x0)]);
break;
case PLUS:
if (GET_CODE (XEXP (x0, 0)) != REG
|| REGNO (XEXP (x0, 0)) < FRAME_POINTER_REGNUM
|| REGNO (XEXP (x0, 0)) > STACK_POINTER_REGNUM
|| GET_CODE (XEXP (x0, 1)) != CONST_INT)
{
fprintf (stderr, "bad INDEXed address:");
debug_rtx (x);
output_operand_lossage ("fr30_print_operand: unhandled MEM");
}
else if (REGNO (XEXP (x0, 0)) == FRAME_POINTER_REGNUM)
{
HOST_WIDE_INT val = INTVAL (XEXP (x0, 1));
if (val < -(1 << 9) || val > ((1 << 9) - 4))
{
fprintf (stderr, "frame INDEX out of range:");
debug_rtx (x);
output_operand_lossage ("fr30_print_operand: unhandled MEM");
}
fprintf (file, "@(r14, #" HOST_WIDE_INT_PRINT_DEC ")", val);
}
else
{
HOST_WIDE_INT val = INTVAL (XEXP (x0, 1));
if (val < 0 || val > ((1 << 6) - 4))
{
fprintf (stderr, "stack INDEX out of range:");
debug_rtx (x);
output_operand_lossage ("fr30_print_operand: unhandled MEM");
}
fprintf (file, "@(r15, #" HOST_WIDE_INT_PRINT_DEC ")", val);
}
break;
case SYMBOL_REF:
output_address (x0);
break;
default:
fprintf (stderr, "bad MEM code = %x\n", GET_CODE (x0));
debug_rtx (x);
output_operand_lossage ("fr30_print_operand: unhandled MEM");
break;
}
break;
case CONST_DOUBLE :
/* We handle SFmode constants here as output_addr_const doesn't. */
if (GET_MODE (x) == SFmode)
{
REAL_VALUE_TYPE d;
long l;
REAL_VALUE_FROM_CONST_DOUBLE (d, x);
REAL_VALUE_TO_TARGET_SINGLE (d, l);
fprintf (file, "0x%08lx", l);
break;
}
/* Fall through. Let output_addr_const deal with it. */
default:
output_addr_const (file, x);
break;
}
return;
}
/* A helper function to return memory format. */
enum nds32_16bit_address_type
nds32_mem_format (rtx op)
{
enum machine_mode mode_test;
int val;
int regno;
if (!TARGET_16_BIT)
return ADDRESS_NOT_16BIT_FORMAT;
mode_test = GET_MODE (op);
op = XEXP (op, 0);
/* 45 format. */
if (GET_CODE (op) == REG && (mode_test == SImode))
return ADDRESS_REG;
/* 333 format for QI/HImode. */
if (GET_CODE (op) == REG && (REGNO (op) < R8_REGNUM))
return ADDRESS_LO_REG_IMM3U;
/* post_inc 333 format. */
if ((GET_CODE (op) == POST_INC) && (mode_test == SImode))
{
regno = REGNO(XEXP (op, 0));
if (regno < 8)
return ADDRESS_POST_INC_LO_REG_IMM3U;
}
/* post_inc 333 format. */
if ((GET_CODE (op) == POST_MODIFY)
&& (mode_test == SImode)
&& (REG_P (XEXP (XEXP (op, 1), 0)))
&& (CONST_INT_P (XEXP (XEXP (op, 1), 1))))
{
regno = REGNO (XEXP (XEXP (op, 1), 0));
val = INTVAL (XEXP (XEXP (op, 1), 1));
if (regno < 8 && val < 32)
return ADDRESS_POST_INC_LO_REG_IMM3U;
}
if ((GET_CODE (op) == PLUS)
&& (GET_CODE (XEXP (op, 0)) == REG)
&& (GET_CODE (XEXP (op, 1)) == CONST_INT))
{
val = INTVAL (XEXP (op, 1));
regno = REGNO(XEXP (op, 0));
if (regno > 7
&& regno != SP_REGNUM
&& regno != FP_REGNUM)
return ADDRESS_NOT_16BIT_FORMAT;
switch (mode_test)
{
case QImode:
/* 333 format. */
if (val >= 0 && val < 8 && regno < 8)
return ADDRESS_LO_REG_IMM3U;
break;
case HImode:
/* 333 format. */
if (val >= 0 && val < 16 && (val % 2 == 0) && regno < 8)
return ADDRESS_LO_REG_IMM3U;
break;
case SImode:
case SFmode:
case DFmode:
/* fp imply 37 format. */
if ((regno == FP_REGNUM) &&
(val >= 0 && val < 512 && (val % 4 == 0)))
return ADDRESS_FP_IMM7U;
/* sp imply 37 format. */
else if ((regno == SP_REGNUM) &&
(val >= 0 && val < 512 && (val % 4 == 0)))
return ADDRESS_SP_IMM7U;
/* 333 format. */
else if (val >= 0 && val < 32 && (val % 4 == 0) && regno < 8)
return ADDRESS_LO_REG_IMM3U;
break;
default:
break;
}
}
return ADDRESS_NOT_16BIT_FORMAT;
}
static void
print_value (char *buf, rtx x, int verbose)
{
char t[BUF_LEN];
char *cur = buf;
switch (GET_CODE (x))
{
case CONST_INT:
sprintf (t, HOST_WIDE_INT_PRINT_HEX, INTVAL (x));
cur = safe_concat (buf, cur, t);
break;
case CONST_DOUBLE:
if (FLOAT_MODE_P (GET_MODE (x)))
real_to_decimal (t, CONST_DOUBLE_REAL_VALUE (x), sizeof (t), 0, 1);
else
sprintf (t, "<0x%lx,0x%lx>", (long) XWINT (x, 2), (long) XWINT (x, 3));
cur = safe_concat (buf, cur, t);
break;
case CONST_STRING:
cur = safe_concat (buf, cur, "\"");
cur = safe_concat (buf, cur, XSTR (x, 0));
cur = safe_concat (buf, cur, "\"");
break;
case SYMBOL_REF:
cur = safe_concat (buf, cur, "`");
cur = safe_concat (buf, cur, XSTR (x, 0));
cur = safe_concat (buf, cur, "'");
break;
case LABEL_REF:
sprintf (t, "L%d", INSN_UID (XEXP (x, 0)));
cur = safe_concat (buf, cur, t);
break;
case CONST:
print_value (t, XEXP (x, 0), verbose);
cur = safe_concat (buf, cur, "const(");
cur = safe_concat (buf, cur, t);
cur = safe_concat (buf, cur, ")");
break;
case HIGH:
print_value (t, XEXP (x, 0), verbose);
cur = safe_concat (buf, cur, "high(");
cur = safe_concat (buf, cur, t);
cur = safe_concat (buf, cur, ")");
break;
case REG:
if (REGNO (x) < FIRST_PSEUDO_REGISTER)
{
int c = reg_names[REGNO (x)][0];
if (ISDIGIT (c))
cur = safe_concat (buf, cur, "%");
cur = safe_concat (buf, cur, reg_names[REGNO (x)]);
}
else
{
sprintf (t, "r%d", REGNO (x));
cur = safe_concat (buf, cur, t);
}
break;
case SUBREG:
print_value (t, SUBREG_REG (x), verbose);
cur = safe_concat (buf, cur, t);
sprintf (t, "#%d", SUBREG_BYTE (x));
cur = safe_concat (buf, cur, t);
break;
case SCRATCH:
cur = safe_concat (buf, cur, "scratch");
break;
case CC0:
cur = safe_concat (buf, cur, "cc0");
break;
case PC:
cur = safe_concat (buf, cur, "pc");
break;
case MEM:
print_value (t, XEXP (x, 0), verbose);
cur = safe_concat (buf, cur, "[");
cur = safe_concat (buf, cur, t);
cur = safe_concat (buf, cur, "]");
break;
default:
print_exp (t, x, verbose);
cur = safe_concat (buf, cur, t);
break;
}
} /* print_value */
static void
gen_exp (rtx x, enum rtx_code subroutine_type, char *used)
{
RTX_CODE code;
int i;
int len;
const char *fmt;
if (x == 0)
{
printf ("NULL_RTX");
return;
}
code = GET_CODE (x);
switch (code)
{
case MATCH_OPERAND:
case MATCH_DUP:
if (used)
{
if (used[XINT (x, 0)])
{
printf ("copy_rtx (operand%d)", XINT (x, 0));
return;
}
used[XINT (x, 0)] = 1;
}
printf ("operand%d", XINT (x, 0));
return;
case MATCH_OP_DUP:
printf ("gen_rtx_fmt_");
for (i = 0; i < XVECLEN (x, 1); i++)
printf ("e");
printf (" (GET_CODE (operand%d), ", XINT (x, 0));
if (GET_MODE (x) == VOIDmode)
printf ("GET_MODE (operand%d)", XINT (x, 0));
else
printf ("%smode", GET_MODE_NAME (GET_MODE (x)));
for (i = 0; i < XVECLEN (x, 1); i++)
{
printf (",\n\t\t");
gen_exp (XVECEXP (x, 1, i), subroutine_type, used);
}
printf (")");
return;
case MATCH_OPERATOR:
printf ("gen_rtx_fmt_");
for (i = 0; i < XVECLEN (x, 2); i++)
printf ("e");
printf (" (GET_CODE (operand%d)", XINT (x, 0));
printf (", %smode", GET_MODE_NAME (GET_MODE (x)));
for (i = 0; i < XVECLEN (x, 2); i++)
{
printf (",\n\t\t");
gen_exp (XVECEXP (x, 2, i), subroutine_type, used);
}
printf (")");
return;
case MATCH_PARALLEL:
case MATCH_PAR_DUP:
printf ("operand%d", XINT (x, 0));
return;
case MATCH_SCRATCH:
gen_rtx_scratch (x, subroutine_type);
return;
case ADDRESS:
fatal ("ADDRESS expression code used in named instruction pattern");
case PC:
printf ("pc_rtx");
return;
case RETURN:
printf ("ret_rtx");
return;
case SIMPLE_RETURN:
printf ("simple_return_rtx");
return;
case CLOBBER:
if (REG_P (XEXP (x, 0)))
{
printf ("gen_hard_reg_clobber (%smode, %i)", GET_MODE_NAME (GET_MODE (XEXP (x, 0))),
REGNO (XEXP (x, 0)));
return;
}
break;
case CC0:
printf ("cc0_rtx");
return;
case CONST_INT:
if (INTVAL (x) == 0)
printf ("const0_rtx");
else if (INTVAL (x) == 1)
printf ("const1_rtx");
else if (INTVAL (x) == -1)
printf ("constm1_rtx");
else if (-MAX_SAVED_CONST_INT <= INTVAL (x)
&& INTVAL (x) <= MAX_SAVED_CONST_INT)
printf ("const_int_rtx[MAX_SAVED_CONST_INT + (%d)]",
(int) INTVAL (x));
else if (INTVAL (x) == STORE_FLAG_VALUE)
printf ("const_true_rtx");
else
{
printf ("GEN_INT (");
printf (HOST_WIDE_INT_PRINT_DEC_C, INTVAL (x));
printf (")");
}
return;
case CONST_DOUBLE:
case CONST_FIXED:
/* These shouldn't be written in MD files. Instead, the appropriate
routines in varasm.c should be called. */
gcc_unreachable ();
default:
break;
}
printf ("gen_rtx_");
print_code (code);
printf (" (%smode", GET_MODE_NAME (GET_MODE (x)));
fmt = GET_RTX_FORMAT (code);
len = GET_RTX_LENGTH (code);
for (i = 0; i < len; i++)
{
if (fmt[i] == '0')
break;
printf (",\n\t");
switch (fmt[i])
{
case 'e': case 'u':
gen_exp (XEXP (x, i), subroutine_type, used);
break;
case 'i':
printf ("%u", XINT (x, i));
break;
case 's':
printf ("\"%s\"", XSTR (x, i));
break;
case 'E':
{
int j;
printf ("gen_rtvec (%d", XVECLEN (x, i));
for (j = 0; j < XVECLEN (x, i); j++)
{
printf (",\n\t\t");
gen_exp (XVECEXP (x, i, j), subroutine_type, used);
}
printf (")");
break;
}
default:
gcc_unreachable ();
}
}
printf (")");
}
static void
fixup_reorder_chain (void)
{
basic_block bb, prev_bb;
int index;
rtx insn = NULL;
if (cfg_layout_function_header)
{
set_first_insn (cfg_layout_function_header);
insn = cfg_layout_function_header;
while (NEXT_INSN (insn))
insn = NEXT_INSN (insn);
}
/* First do the bulk reordering -- rechain the blocks without regard to
the needed changes to jumps and labels. */
for (bb = ENTRY_BLOCK_PTR->next_bb, index = 0;
bb != 0;
bb = bb->rbi->next, index++)
{
if (bb->rbi->header)
{
if (insn)
NEXT_INSN (insn) = bb->rbi->header;
else
set_first_insn (bb->rbi->header);
PREV_INSN (bb->rbi->header) = insn;
insn = bb->rbi->header;
while (NEXT_INSN (insn))
insn = NEXT_INSN (insn);
}
if (insn)
NEXT_INSN (insn) = BB_HEAD (bb);
else
set_first_insn (BB_HEAD (bb));
PREV_INSN (BB_HEAD (bb)) = insn;
insn = BB_END (bb);
if (bb->rbi->footer)
{
NEXT_INSN (insn) = bb->rbi->footer;
PREV_INSN (bb->rbi->footer) = insn;
while (NEXT_INSN (insn))
insn = NEXT_INSN (insn);
}
}
if (index != n_basic_blocks)
abort ();
NEXT_INSN (insn) = cfg_layout_function_footer;
if (cfg_layout_function_footer)
PREV_INSN (cfg_layout_function_footer) = insn;
while (NEXT_INSN (insn))
insn = NEXT_INSN (insn);
set_last_insn (insn);
#ifdef ENABLE_CHECKING
verify_insn_chain ();
#endif
delete_dead_jumptables ();
/* Now add jumps and labels as needed to match the blocks new
outgoing edges. */
for (bb = ENTRY_BLOCK_PTR->next_bb; bb ; bb = bb->rbi->next)
{
edge e_fall, e_taken, e;
rtx bb_end_insn;
basic_block nb;
if (bb->succ == NULL)
continue;
/* Find the old fallthru edge, and another non-EH edge for
a taken jump. */
e_taken = e_fall = NULL;
for (e = bb->succ; e ; e = e->succ_next)
if (e->flags & EDGE_FALLTHRU)
e_fall = e;
else if (! (e->flags & EDGE_EH))
e_taken = e;
bb_end_insn = BB_END (bb);
if (GET_CODE (bb_end_insn) == JUMP_INSN)
{
if (any_condjump_p (bb_end_insn))
{
/* If the old fallthru is still next, nothing to do. */
if (bb->rbi->next == e_fall->dest
|| (!bb->rbi->next
&& e_fall->dest == EXIT_BLOCK_PTR))
continue;
/* The degenerated case of conditional jump jumping to the next
instruction can happen on target having jumps with side
effects.
Create temporarily the duplicated edge representing branch.
It will get unidentified by force_nonfallthru_and_redirect
that would otherwise get confused by fallthru edge not pointing
to the next basic block. */
if (!e_taken)
{
rtx note;
edge e_fake;
e_fake = unchecked_make_edge (bb, e_fall->dest, 0);
if (!redirect_jump (BB_END (bb), block_label (bb), 0))
abort ();
note = find_reg_note (BB_END (bb), REG_BR_PROB, NULL_RTX);
if (note)
{
int prob = INTVAL (XEXP (note, 0));
e_fake->probability = prob;
e_fake->count = e_fall->count * prob / REG_BR_PROB_BASE;
e_fall->probability -= e_fall->probability;
e_fall->count -= e_fake->count;
if (e_fall->probability < 0)
e_fall->probability = 0;
if (e_fall->count < 0)
e_fall->count = 0;
}
}
/* There is one special case: if *neither* block is next,
such as happens at the very end of a function, then we'll
need to add a new unconditional jump. Choose the taken
edge based on known or assumed probability. */
else if (bb->rbi->next != e_taken->dest)
{
rtx note = find_reg_note (bb_end_insn, REG_BR_PROB, 0);
if (note
&& INTVAL (XEXP (note, 0)) < REG_BR_PROB_BASE / 2
&& invert_jump (bb_end_insn,
label_for_bb (e_fall->dest), 0))
{
e_fall->flags &= ~EDGE_FALLTHRU;
e_taken->flags |= EDGE_FALLTHRU;
update_br_prob_note (bb);
e = e_fall, e_fall = e_taken, e_taken = e;
}
}
/* Otherwise we can try to invert the jump. This will
basically never fail, however, keep up the pretense. */
else if (invert_jump (bb_end_insn,
label_for_bb (e_fall->dest), 0))
{
e_fall->flags &= ~EDGE_FALLTHRU;
e_taken->flags |= EDGE_FALLTHRU;
update_br_prob_note (bb);
continue;
}
}
else if (returnjump_p (bb_end_insn))
continue;
else
{
/* Otherwise we have some switch or computed jump. In the
99% case, there should not have been a fallthru edge. */
if (! e_fall)
continue;
#ifdef CASE_DROPS_THROUGH
/* Except for VAX. Since we didn't have predication for the
tablejump, the fallthru block should not have moved. */
if (bb->rbi->next == e_fall->dest)
continue;
bb_end_insn = skip_insns_after_block (bb);
#else
abort ();
#endif
}
}
else
{
/* No fallthru implies a noreturn function with EH edges, or
something similarly bizarre. In any case, we don't need to
do anything. */
if (! e_fall)
continue;
/* If the fallthru block is still next, nothing to do. */
if (bb->rbi->next == e_fall->dest)
continue;
/* A fallthru to exit block. */
if (!bb->rbi->next && e_fall->dest == EXIT_BLOCK_PTR)
continue;
}
/* We got here if we need to add a new jump insn. */
nb = force_nonfallthru (e_fall);
if (nb)
{
cfg_layout_initialize_rbi (nb);
nb->rbi->visited = 1;
nb->rbi->next = bb->rbi->next;
bb->rbi->next = nb;
/* Don't process this new block. */
bb = nb;
}
}
/* Put basic_block_info in the new order. */
if (rtl_dump_file)
{
fprintf (rtl_dump_file, "Reordered sequence:\n");
for (bb = ENTRY_BLOCK_PTR->next_bb, index = 0; bb; bb = bb->rbi->next, index ++)
{
fprintf (rtl_dump_file, " %i ", index);
if (bb->rbi->original)
fprintf (rtl_dump_file, "duplicate of %i ",
bb->rbi->original->index);
else if (forwarder_block_p (bb) && GET_CODE (BB_HEAD (bb)) != CODE_LABEL)
fprintf (rtl_dump_file, "compensation ");
else
fprintf (rtl_dump_file, "bb %i ", bb->index);
fprintf (rtl_dump_file, " [%i]\n", bb->frequency);
}
}
prev_bb = ENTRY_BLOCK_PTR;
bb = ENTRY_BLOCK_PTR->next_bb;
index = 0;
for (; bb; prev_bb = bb, bb = bb->rbi->next, index ++)
{
bb->index = index;
BASIC_BLOCK (index) = bb;
bb->prev_bb = prev_bb;
prev_bb->next_bb = bb;
}
prev_bb->next_bb = EXIT_BLOCK_PTR;
EXIT_BLOCK_PTR->prev_bb = prev_bb;
/* Annoying special case - jump around dead jumptables left in the code. */
FOR_EACH_BB (bb)
{
edge e;
for (e = bb->succ; e && !(e->flags & EDGE_FALLTHRU); e = e->succ_next)
continue;
if (e && !can_fallthru (e->src, e->dest))
force_nonfallthru (e);
}
}
void
print_value (char *buf, const_rtx x, int verbose)
{
char t[BUF_LEN];
char *cur = buf;
switch (GET_CODE (x))
{
case CONST_INT:
sprintf (t, HOST_WIDE_INT_PRINT_HEX,
(unsigned HOST_WIDE_INT) INTVAL (x));
cur = safe_concat (buf, cur, t);
break;
case CONST_DOUBLE:
if (FLOAT_MODE_P (GET_MODE (x)))
real_to_decimal (t, CONST_DOUBLE_REAL_VALUE (x), sizeof (t), 0, 1);
else
sprintf (t,
"<" HOST_WIDE_INT_PRINT_HEX "," HOST_WIDE_INT_PRINT_HEX ">",
(unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x),
(unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x));
cur = safe_concat (buf, cur, t);
break;
case CONST_FIXED:
fixed_to_decimal (t, CONST_FIXED_VALUE (x), sizeof (t));
cur = safe_concat (buf, cur, t);
break;
case CONST_STRING:
cur = safe_concat (buf, cur, "\"");
cur = safe_concat (buf, cur, XSTR (x, 0));
cur = safe_concat (buf, cur, "\"");
break;
case SYMBOL_REF:
cur = safe_concat (buf, cur, "`");
cur = safe_concat (buf, cur, XSTR (x, 0));
cur = safe_concat (buf, cur, "'");
break;
case LABEL_REF:
sprintf (t, "L%d", INSN_UID (XEXP (x, 0)));
cur = safe_concat (buf, cur, t);
break;
case CONST:
print_value (t, XEXP (x, 0), verbose);
cur = safe_concat (buf, cur, "const(");
cur = safe_concat (buf, cur, t);
cur = safe_concat (buf, cur, ")");
break;
case HIGH:
print_value (t, XEXP (x, 0), verbose);
cur = safe_concat (buf, cur, "high(");
cur = safe_concat (buf, cur, t);
cur = safe_concat (buf, cur, ")");
break;
case REG:
if (REGNO (x) < FIRST_PSEUDO_REGISTER)
{
int c = reg_names[REGNO (x)][0];
if (ISDIGIT (c))
cur = safe_concat (buf, cur, "%");
cur = safe_concat (buf, cur, reg_names[REGNO (x)]);
}
else
{
sprintf (t, "r%d", REGNO (x));
cur = safe_concat (buf, cur, t);
}
if (verbose
#ifdef INSN_SCHEDULING
&& !current_sched_info
#endif
)
{
sprintf (t, ":%s", GET_MODE_NAME (GET_MODE (x)));
cur = safe_concat (buf, cur, t);
}
break;
case SUBREG:
print_value (t, SUBREG_REG (x), verbose);
cur = safe_concat (buf, cur, t);
sprintf (t, "#%d", SUBREG_BYTE (x));
cur = safe_concat (buf, cur, t);
break;
case SCRATCH:
cur = safe_concat (buf, cur, "scratch");
break;
case CC0:
cur = safe_concat (buf, cur, "cc0");
break;
case PC:
cur = safe_concat (buf, cur, "pc");
break;
case MEM:
print_value (t, XEXP (x, 0), verbose);
cur = safe_concat (buf, cur, "[");
cur = safe_concat (buf, cur, t);
cur = safe_concat (buf, cur, "]");
break;
case DEBUG_EXPR:
sprintf (t, "D#%i", DEBUG_TEMP_UID (DEBUG_EXPR_TREE_DECL (x)));
cur = safe_concat (buf, cur, t);
break;
default:
print_exp (t, x, verbose);
cur = safe_concat (buf, cur, t);
break;
}
} /* print_value */
/* Scan X and replace any eliminable registers (such as fp) with a
replacement (such as sp) if SUBST_P, plus an offset. The offset is
a change in the offset between the eliminable register and its
substitution if UPDATE_P, or the full offset if FULL_P, or
otherwise zero. If FULL_P, we also use the SP offsets for
elimination to SP. If UPDATE_P, use UPDATE_SP_OFFSET for updating
offsets of register elimnable to SP. If UPDATE_SP_OFFSET is
non-zero, don't use difference of the offset and the previous
offset.
MEM_MODE is the mode of an enclosing MEM. We need this to know how
much to adjust a register for, e.g., PRE_DEC. Also, if we are
inside a MEM, we are allowed to replace a sum of a hard register
and the constant zero with the hard register, which we cannot do
outside a MEM. In addition, we need to record the fact that a
hard register is referenced outside a MEM.
If we make full substitution to SP for non-null INSN, add the insn
sp offset. */
rtx
lra_eliminate_regs_1 (rtx_insn *insn, rtx x, machine_mode mem_mode,
bool subst_p, bool update_p,
HOST_WIDE_INT update_sp_offset, bool full_p)
{
enum rtx_code code = GET_CODE (x);
struct lra_elim_table *ep;
rtx new_rtx;
int i, j;
const char *fmt;
int copied = 0;
lra_assert (!update_p || !full_p);
lra_assert (update_sp_offset == 0 || (!subst_p && update_p && !full_p));
if (! current_function_decl)
return x;
switch (code)
{
CASE_CONST_ANY:
case CONST:
case SYMBOL_REF:
case CODE_LABEL:
case PC:
case CC0:
case ASM_INPUT:
case ADDR_VEC:
case ADDR_DIFF_VEC:
case RETURN:
return x;
case REG:
/* First handle the case where we encounter a bare hard register
that is eliminable. Replace it with a PLUS. */
if ((ep = get_elimination (x)) != NULL)
{
rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
if (update_sp_offset != 0)
{
if (ep->to_rtx == stack_pointer_rtx)
return plus_constant (Pmode, to, update_sp_offset);
return to;
}
else if (update_p)
return plus_constant (Pmode, to, ep->offset - ep->previous_offset);
else if (full_p)
return plus_constant (Pmode, to,
ep->offset
- (insn != NULL_RTX
&& ep->to_rtx == stack_pointer_rtx
? lra_get_insn_recog_data (insn)->sp_offset
: 0));
else
return to;
}
return x;
case PLUS:
/* If this is the sum of an eliminable register and a constant, rework
the sum. */
if (REG_P (XEXP (x, 0)) && CONSTANT_P (XEXP (x, 1)))
{
if ((ep = get_elimination (XEXP (x, 0))) != NULL)
{
HOST_WIDE_INT offset;
rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
if (! update_p && ! full_p)
return gen_rtx_PLUS (Pmode, to, XEXP (x, 1));
if (update_sp_offset != 0)
offset = ep->to_rtx == stack_pointer_rtx ? update_sp_offset : 0;
else
offset = (update_p
? ep->offset - ep->previous_offset : ep->offset);
if (full_p && insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx)
offset -= lra_get_insn_recog_data (insn)->sp_offset;
if (CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) == -offset)
return to;
else
return gen_rtx_PLUS (Pmode, to,
plus_constant (Pmode,
XEXP (x, 1), offset));
}
/* If the hard register is not eliminable, we are done since
the other operand is a constant. */
return x;
}
/* If this is part of an address, we want to bring any constant
to the outermost PLUS. We will do this by doing hard
register replacement in our operands and seeing if a constant
shows up in one of them.
Note that there is no risk of modifying the structure of the
insn, since we only get called for its operands, thus we are
either modifying the address inside a MEM, or something like
an address operand of a load-address insn. */
{
rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
subst_p, update_p,
update_sp_offset, full_p);
rtx new1 = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
subst_p, update_p,
update_sp_offset, full_p);
new0 = move_plus_up (new0);
new1 = move_plus_up (new1);
if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
return form_sum (new0, new1);
}
return x;
case MULT:
/* If this is the product of an eliminable hard register and a
constant, apply the distribute law and move the constant out
so that we have (plus (mult ..) ..). This is needed in order
to keep load-address insns valid. This case is pathological.
We ignore the possibility of overflow here. */
if (REG_P (XEXP (x, 0)) && CONST_INT_P (XEXP (x, 1))
&& (ep = get_elimination (XEXP (x, 0))) != NULL)
{
rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
if (update_sp_offset != 0)
{
if (ep->to_rtx == stack_pointer_rtx)
return plus_constant (Pmode,
gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
update_sp_offset * INTVAL (XEXP (x, 1)));
return gen_rtx_MULT (Pmode, to, XEXP (x, 1));
}
else if (update_p)
return plus_constant (Pmode,
gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
(ep->offset - ep->previous_offset)
* INTVAL (XEXP (x, 1)));
else if (full_p)
{
HOST_WIDE_INT offset = ep->offset;
if (insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx)
offset -= lra_get_insn_recog_data (insn)->sp_offset;
return
plus_constant (Pmode,
gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
offset * INTVAL (XEXP (x, 1)));
}
else
return gen_rtx_MULT (Pmode, to, XEXP (x, 1));
}
/* fall through */
case CALL:
case COMPARE:
/* See comments before PLUS about handling MINUS. */
case MINUS:
case DIV: case UDIV:
case MOD: case UMOD:
case AND: case IOR: case XOR:
case ROTATERT: case ROTATE:
case ASHIFTRT: case LSHIFTRT: case ASHIFT:
case NE: case EQ:
case GE: case GT: case GEU: case GTU:
case LE: case LT: case LEU: case LTU:
{
rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
subst_p, update_p,
update_sp_offset, full_p);
rtx new1 = XEXP (x, 1)
? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
subst_p, update_p,
update_sp_offset, full_p) : 0;
if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
return gen_rtx_fmt_ee (code, GET_MODE (x), new0, new1);
}
return x;
case EXPR_LIST:
/* If we have something in XEXP (x, 0), the usual case,
eliminate it. */
if (XEXP (x, 0))
{
new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
subst_p, update_p,
update_sp_offset, full_p);
if (new_rtx != XEXP (x, 0))
{
/* If this is a REG_DEAD note, it is not valid anymore.
Using the eliminated version could result in creating a
REG_DEAD note for the stack or frame pointer. */
if (REG_NOTE_KIND (x) == REG_DEAD)
return (XEXP (x, 1)
? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
subst_p, update_p,
update_sp_offset, full_p)
: NULL_RTX);
x = alloc_reg_note (REG_NOTE_KIND (x), new_rtx, XEXP (x, 1));
}
}
/* fall through */
case INSN_LIST:
case INT_LIST:
/* Now do eliminations in the rest of the chain. If this was
an EXPR_LIST, this might result in allocating more memory than is
strictly needed, but it simplifies the code. */
if (XEXP (x, 1))
{
new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
subst_p, update_p,
update_sp_offset, full_p);
if (new_rtx != XEXP (x, 1))
return
gen_rtx_fmt_ee (GET_CODE (x), GET_MODE (x),
XEXP (x, 0), new_rtx);
}
return x;
case PRE_INC:
case POST_INC:
case PRE_DEC:
case POST_DEC:
/* We do not support elimination of a register that is modified.
elimination_effects has already make sure that this does not
happen. */
return x;
case PRE_MODIFY:
case POST_MODIFY:
/* We do not support elimination of a hard register that is
modified. LRA has already make sure that this does not
happen. The only remaining case we need to consider here is
that the increment value may be an eliminable register. */
if (GET_CODE (XEXP (x, 1)) == PLUS
&& XEXP (XEXP (x, 1), 0) == XEXP (x, 0))
{
rtx new_rtx = lra_eliminate_regs_1 (insn, XEXP (XEXP (x, 1), 1),
mem_mode, subst_p, update_p,
update_sp_offset, full_p);
if (new_rtx != XEXP (XEXP (x, 1), 1))
return gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (x, 0),
gen_rtx_PLUS (GET_MODE (x),
XEXP (x, 0), new_rtx));
}
return x;
case STRICT_LOW_PART:
case NEG: case NOT:
case SIGN_EXTEND: case ZERO_EXTEND:
case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE:
case FLOAT: case FIX:
case UNSIGNED_FIX: case UNSIGNED_FLOAT:
case ABS:
case SQRT:
case FFS:
case CLZ:
case CTZ:
case POPCOUNT:
case PARITY:
case BSWAP:
new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
subst_p, update_p,
update_sp_offset, full_p);
if (new_rtx != XEXP (x, 0))
return gen_rtx_fmt_e (code, GET_MODE (x), new_rtx);
return x;
case SUBREG:
new_rtx = lra_eliminate_regs_1 (insn, SUBREG_REG (x), mem_mode,
subst_p, update_p,
update_sp_offset, full_p);
if (new_rtx != SUBREG_REG (x))
{
int x_size = GET_MODE_SIZE (GET_MODE (x));
int new_size = GET_MODE_SIZE (GET_MODE (new_rtx));
if (MEM_P (new_rtx) && x_size <= new_size)
{
SUBREG_REG (x) = new_rtx;
alter_subreg (&x, false);
return x;
}
else if (! subst_p)
{
/* LRA can transform subregs itself. So don't call
simplify_gen_subreg until LRA transformations are
finished. Function simplify_gen_subreg can do
non-trivial transformations (like truncation) which
might make LRA work to fail. */
SUBREG_REG (x) = new_rtx;
return x;
}
else
return simplify_gen_subreg (GET_MODE (x), new_rtx,
GET_MODE (new_rtx), SUBREG_BYTE (x));
}
return x;
case MEM:
/* Our only special processing is to pass the mode of the MEM to our
recursive call and copy the flags. While we are here, handle this
case more efficiently. */
return
replace_equiv_address_nv
(x,
lra_eliminate_regs_1 (insn, XEXP (x, 0), GET_MODE (x),
subst_p, update_p, update_sp_offset, full_p));
case USE:
/* Handle insn_list USE that a call to a pure function may generate. */
new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), VOIDmode,
subst_p, update_p, update_sp_offset, full_p);
if (new_rtx != XEXP (x, 0))
return gen_rtx_USE (GET_MODE (x), new_rtx);
return x;
case CLOBBER:
case SET:
gcc_unreachable ();
default:
break;
}
/* Process each of our operands recursively. If any have changed, make a
copy of the rtx. */
fmt = GET_RTX_FORMAT (code);
for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
{
if (*fmt == 'e')
{
new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, i), mem_mode,
subst_p, update_p,
update_sp_offset, full_p);
if (new_rtx != XEXP (x, i) && ! copied)
{
x = shallow_copy_rtx (x);
copied = 1;
}
XEXP (x, i) = new_rtx;
}
else if (*fmt == 'E')
{
int copied_vec = 0;
for (j = 0; j < XVECLEN (x, i); j++)
{
new_rtx = lra_eliminate_regs_1 (insn, XVECEXP (x, i, j), mem_mode,
subst_p, update_p,
update_sp_offset, full_p);
if (new_rtx != XVECEXP (x, i, j) && ! copied_vec)
{
rtvec new_v = gen_rtvec_v (XVECLEN (x, i),
XVEC (x, i)->elem);
if (! copied)
{
x = shallow_copy_rtx (x);
copied = 1;
}
XVEC (x, i) = new_v;
copied_vec = 1;
}
XVECEXP (x, i, j) = new_rtx;
}
}
}
return x;
}
