void rs485_init(void) { ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 3), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 2), IOPORT_DIR_INPUT); ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 7), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 6), IOPORT_DIR_INPUT); //rs485 enable usart_rs232_options_t usart_opt; usart_opt.baudrate = 250000; usart_opt.charlength = USART_CHSIZE_8BIT_gc; usart_opt.paritytype = USART_PMODE_DISABLED_gc; usart_opt.stopbits = true; usart_init_rs232(&RS485_1_UART,&usart_opt); usart_set_rx_interrupt_level(&RS485_1_UART,USART_INT_LVL_HI); usart_init_rs232(&RS485_2_UART,&usart_opt); usart_set_rx_interrupt_level(&RS485_2_UART,USART_INT_LVL_HI); }
void board_init(void) { ioport_configure_pin(LED0_GPIO, IOPORT_DIR_OUTPUT ); ioport_configure_pin(LED1_GPIO, IOPORT_DIR_OUTPUT ); ioport_configure_pin(LED2_GPIO, IOPORT_DIR_OUTPUT ); ioport_configure_pin(GPIO_PUSH_BUTTON_0, IOPORT_DIR_INPUT | IOPORT_LEVEL | IOPORT_PULL_UP); #ifdef CONF_BOARD_ENABLE_USARTD0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 3), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 2), IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_AT86RFX ioport_configure_pin(AT86RFX_SPI_SCK, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(AT86RFX_SPI_MOSI, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(AT86RFX_SPI_MISO, IOPORT_DIR_INPUT); ioport_configure_pin(AT86RFX_SPI_CS, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); /* Initialize TRX_RST and SLP_TR as GPIO. */ ioport_configure_pin(AT86RFX_RST_PIN, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(AT86RFX_SLP_PIN, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); #endif }
void board_init(void) { //Configure LED0 ioport_configure_pin(LED0_PIN, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); //Configure SW0 ioport_configure_pin(BUTTON_0_PIN, IOPORT_DIR_INPUT | IOPORT_PULL_UP); //Configure pins for OLED display #ifdef CONF_BOARD_OLED_UG_2832HSWEG04 ioport_configure_pin(EXT3_PIN_5,IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(EXT3_PIN_10,IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(EXT3_PIN_15,IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(EXT3_PIN_16,IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(EXT3_PIN_18,IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); //This pin needs to be an output in order for SPI Master mode to work ioport_configure_pin(EXT1_PIN_15,IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); #endif //Configure Rx and Tx pin on PORT E #ifdef CONF_BOARD_ENABLE_USARTE0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTE, 3), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTE, 2), IOPORT_DIR_INPUT); #endif }
void board_init(void) { ioport_configure_pin(LED0_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED1_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED2_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED3_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED4_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED5_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED6_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED7_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(GPIO_PUSH_BUTTON_0, IOPORT_DIR_INPUT | IOPORT_PULL_UP); ioport_configure_pin(GPIO_PUSH_BUTTON_1, IOPORT_DIR_INPUT | IOPORT_PULL_UP); ioport_configure_pin(GPIO_PUSH_BUTTON_2, IOPORT_DIR_INPUT | IOPORT_PULL_UP); ioport_configure_pin(GPIO_PUSH_BUTTON_3, IOPORT_DIR_INPUT | IOPORT_PULL_UP); #ifdef CONF_BOARD_AT45DBX ioport_configure_pin(AT45DBX_MASTER_SCK, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(AT45DBX_MASTER_MOSI, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(AT45DBX_MASTER_MISO, IOPORT_DIR_INPUT); ioport_configure_pin(AT45DBX_CS, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); #endif #ifdef CONF_BOARD_ENABLE_USARTC0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 3), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 2), IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_ENABLE_USARTC1 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 7), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 6), IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_ENABLE_USARTD0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 3), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 2), IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_ENABLE_USARTD1 ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 7), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 6), IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_ENABLE_USARTE0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTE, 3), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTE, 2), IOPORT_DIR_INPUT); #endif }
void board_init(void) { #ifdef KEY_RC_BOARD /* On board Button initialization */ ioport_configure_pin(BUTTON_IRQ_PIN_1,IOPORT_DIR_INPUT | IOPORT_PULL_UP); ioport_configure_pin(BUTTON_IRQ_PIN_2,IOPORT_DIR_INPUT | IOPORT_PULL_UP); ioport_configure_pin(BUTTON_IRQ_PIN_3,IOPORT_DIR_INPUT | IOPORT_PULL_UP); set_button_pins_for_normal_mode(); /* Initialize the IRQ lines' interrupt behaviour. */ DISABLE_ALL_BUTTON_IRQS(); /* LED Init */ /* LCD initialization for inactive use */ /* On board LED initialization */ ioport_configure_pin(LCD_CS_ON_BOARD, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_set_port_dir(IOPORT_PORTE,KEY_RC_IO_MASK,IOPORT_DIR_OUTPUT); ioport_set_port_level(IOPORT_PORTE,KEY_RC_IO_MASK,KEY_RC_IO_MASK); ioport_set_pin_dir(IOPORT_CREATE_PIN(PORTG , 2),IOPORT_DIR_INPUT); ioport_set_pin_mode(IOPORT_CREATE_PIN(PORTG , 2), IOPORT_MODE_PULLUP); LATCH_INIT(); /* Init ADC for the Accelerometer */ adc_init(); // LATCH_INIT(); /* Enable Accelerometer by enabling the PWR pin in the Latch */ acc_init(); update_latch_status(); /* Apply latch pulse to set LED status */ pulse_latch(); #else /* To identify if it is a plain or STB*/ board_identify(); /* On board LED initialization */ ioport_configure_pin(LED0_RCB,IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED1_RCB,IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED2_RCB,IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); /* On board Switch initialization */ ioport_configure_pin(GPIO_PUSH_BUTTON_0,IOPORT_DIR_INPUT | IOPORT_PULL_UP); #ifdef BREAKOUT_BOARD //Enable RCB_BB RS232 level converter ioport_set_port_dir(IOPORT_PORTD,BB_SIO_MASK,IOPORT_DIR_OUTPUT); ioport_set_port_level(IOPORT_PORTD,BB_SIO_MASK,BB_SIO_VAL); #endif #endif }
void rs485_deinit(void) { sysclk_disable_peripheral_clock(&RS485_1_UART); sysclk_disable_peripheral_clock(&RS485_2_UART); ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 3), IOPORT_DIR_INPUT); ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 2), IOPORT_DIR_INPUT); ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 7), IOPORT_DIR_INPUT); ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 6), IOPORT_DIR_INPUT); //dma_disable(); }
/** * \brief Test physical loop-back with some characters in sunc mode. * * This function sends a character over USART on loop back to verify that init * and sending/receiving works. A jumper is connected on the USART. * * \param test Current test case. */ static void run_loopback_syncmode_test(const struct test_case *test) { uint8_t out_c = 'c'; uint8_t in_c = 0; port_pin_t sck_pin; sysclk_enable_module(POWER_RED_REG0, PRUSART0_bm); usart_set_mode(&CONF_UNIT_USART, USART_CMODE_SYNCHRONOUS_gc); sck_pin = IOPORT_CREATE_PIN(PORTE, 2); ioport_configure_port_pin(ioport_pin_to_port(sck_pin), ioport_pin_to_mask(sck_pin), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH ); usart_spi_set_baudrate(&CONF_UNIT_USART, CONF_UNIT_BAUDRATE, sysclk_get_source_clock_hz()); usart_tx_enable(&CONF_UNIT_USART); usart_rx_enable(&CONF_UNIT_USART); usart_putchar(&CONF_UNIT_USART, out_c); in_c = usart_getchar(&CONF_UNIT_USART); test_assert_true(test, in_c == out_c, "Read character through sync mode is not correct: %d != %d", in_c, out_c); }
/** * \brief Initialize USART in SPI master mode. * * This function initializes the USART module in SPI master mode using the * usart_spi_options_t configuration structure and CPU frequency. * * \param usart The USART module. * \param opt The RS232 configuration option. */ void usart_init_spi(USART_t *usart, const usart_spi_options_t *opt) { usart->UBRR = 0; usart_enable_module_clock(usart); usart_set_mode(usart, USART_CMODE_MSPI_gc); port_pin_t sck_pin; #ifdef USARTA0 if ((uintptr_t)usart == (uintptr_t)&UCSR0A) { sck_pin = IOPORT_CREATE_PIN(PORTE, 2); ioport_configure_port_pin(ioport_pin_to_port(sck_pin), ioport_pin_to_mask(sck_pin), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH ); } #endif #ifdef USARTA1 if ((uintptr_t)usart == (uintptr_t)&UCSR1A) { sck_pin = IOPORT_CREATE_PIN(PORTD, 5); ioport_configure_port_pin(ioport_pin_to_port(sck_pin), ioport_pin_to_mask(sck_pin), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH ); } #endif if (opt->spimode == 1 || opt->spimode == 3) { usart->UCSRnC |= USART_UCPHA_bm; } else { usart->UCSRnC &= ~USART_UCPHA_bm; } if (opt->spimode == 2 || opt->spimode == 3) { usart->UCSRnC |= USART_UCPOL_bm; } else { usart->UCSRnC &= ~USART_UCPOL_bm; } if (opt->data_order) { usart->UCSRnC |= USART_DORD_bm; } else { usart->UCSRnC &= ~USART_DORD_bm; } usart_spi_set_baudrate(usart, opt->baudrate, sysclk_get_source_clock_hz()); usart_tx_enable(usart); usart_rx_enable(usart); }
void board_init(void) { #ifdef ZIGBIT_EXT ioport_configure_pin(LED0_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED1_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED2_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); gpio_configure_pin(GPIO_PUSH_BUTTON_0,IOPORT_DIR_INPUT | IOPORT_PULL_UP); #endif #ifdef CONF_BOARD_ENABLE_USARTA1 ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 3), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 2), IOPORT_DIR_INPUT); #endif }
void board_init(void) { ioport_configure_pin(LED0_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(GPIO_PCB_LINK, IOPORT_DIR_INPUT | IOPORT_PULL_UP); ioport_configure_pin(GPIO_CUTDOWN, IOPORT_DIR_OUTPUT | IOPORT_INIT_LOW); ioport_configure_pin(GPIO_NTX2B_EN, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH |IOPORT_INV_ENABLED ); #ifdef CONF_BOARD_ENABLE_USARTC0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 3), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 2), IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_ENABLE_USARTC1 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 7), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 6), IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_ENABLE_USARTD0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 3), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 2), IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_ENABLE_USARTD1 ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 7), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 6), IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_ENABLE_USARTE0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTE, 3), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTE, 2), IOPORT_DIR_INPUT); #endif }
void board_init(void) { ioport_configure_pin(LED0_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED1_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED2_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED3_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_LOW | IOPORT_INV_ENABLED); ioport_configure_pin(GPIO_PUSH_BUTTON_0, IOPORT_DIR_INPUT | IOPORT_LEVEL | IOPORT_PULL_UP); #ifdef CONF_BOARD_C12832A1Z ioport_configure_pin(NHD_C12832A1Z_SPI_SCK, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(NHD_C12832A1Z_SPI_MOSI, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(NHD_C12832A1Z_CSN, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(NHD_C12832A1Z_REGISTER_SELECT, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(NHD_C12832A1Z_RESETN, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(NHD_C12832A1Z_BACKLIGHT, IOPORT_DIR_OUTPUT | IOPORT_INIT_LOW); #endif #ifdef CONF_BOARD_AT45DBX ioport_configure_pin(AT45DBX_MASTER_SCK, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(AT45DBX_MASTER_MOSI, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(AT45DBX_MASTER_MISO, IOPORT_DIR_INPUT); ioport_configure_pin(AT45DBX_CS, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); #endif #ifdef CONF_BOARD_ENABLE_AC_PINS ioport_configure_pin(IOPORT_CREATE_PIN(PORTA, 0), IOPORT_DIR_INPUT); ioport_configure_pin(IOPORT_CREATE_PIN(PORTA, 2), IOPORT_DIR_INPUT); ioport_configure_pin(IOPORT_CREATE_PIN(PORTB, 1), IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_ENABLE_USARTC0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 3), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 2), IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_ENABLE_USARTD0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 3), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 2), IOPORT_DIR_INPUT); #endif }
[WICED_GPIO_7] = { WICED_FALSE, 0, 0 }, [WICED_GPIO_8] = { WICED_FALSE, 0, 0 }, [WICED_GPIO_9] = { WICED_FALSE, 0, 0 }, [WICED_GPIO_10] = { WICED_FALSE, 0, 0 }, [WICED_GPIO_11] = { WICED_FALSE, 0, 0 }, [WICED_GPIO_12] = { WICED_FALSE, 0, 0 }, [WICED_GPIO_13] = { WICED_TRUE, 2, IOPORT_SENSE_FALLING }, [WICED_GPIO_14] = { WICED_TRUE, 1, IOPORT_SENSE_FALLING }, [WICED_GPIO_15] = { WICED_FALSE, 0, 0 }, [WICED_GPIO_16] = { WICED_TRUE, 3, IOPORT_SENSE_FALLING }, [WICED_GPIO_17] = { WICED_TRUE, 0, 0 }, }; const platform_gpio_t platform_gpio_pins[] = { [WICED_GPIO_1] = { .pin = IOPORT_CREATE_PIN( PIOA, 20 ), .wakeup_pin_config = &platform_wakeup_pin_config[WICED_GPIO_1] }, [WICED_GPIO_2] = { .pin = IOPORT_CREATE_PIN( PIOA, 17 ), .wakeup_pin_config = &platform_wakeup_pin_config[WICED_GPIO_2] }, [WICED_GPIO_3] = { .pin = IOPORT_CREATE_PIN( PIOA, 18 ), .wakeup_pin_config = &platform_wakeup_pin_config[WICED_GPIO_3] }, [WICED_GPIO_4] = { .pin = IOPORT_CREATE_PIN( PIOA, 19 ), .wakeup_pin_config = &platform_wakeup_pin_config[WICED_GPIO_4] }, [WICED_GPIO_5] = { .pin = IOPORT_CREATE_PIN( PIOA, 11 ), .wakeup_pin_config = &platform_wakeup_pin_config[WICED_GPIO_5] }, [WICED_GPIO_6] = { .pin = IOPORT_CREATE_PIN( PIOA, 14 ), .wakeup_pin_config = &platform_wakeup_pin_config[WICED_GPIO_6] }, [WICED_GPIO_7] = { .pin = IOPORT_CREATE_PIN( PIOA, 12 ), .wakeup_pin_config = &platform_wakeup_pin_config[WICED_GPIO_7] }, [WICED_GPIO_8] = { .pin = IOPORT_CREATE_PIN( PIOA, 13 ), .wakeup_pin_config = &platform_wakeup_pin_config[WICED_GPIO_8] }, [WICED_GPIO_9] = { .pin = IOPORT_CREATE_PIN( PIOA, 22 ), .wakeup_pin_config = &platform_wakeup_pin_config[WICED_GPIO_9] }, [WICED_GPIO_10] = { .pin = IOPORT_CREATE_PIN( PIOA, 21 ), .wakeup_pin_config = &platform_wakeup_pin_config[WICED_GPIO_10] }, [WICED_GPIO_11] = { .pin = IOPORT_CREATE_PIN( PIOA, 24 ), .wakeup_pin_config = &platform_wakeup_pin_config[WICED_GPIO_11] }, [WICED_GPIO_12] = { .pin = IOPORT_CREATE_PIN( PIOA, 25 ), .wakeup_pin_config = &platform_wakeup_pin_config[WICED_GPIO_12] }, [WICED_GPIO_13] = { .pin = IOPORT_CREATE_PIN( PIOA, 2 ), .wakeup_pin_config = &platform_wakeup_pin_config[WICED_GPIO_13] }, [WICED_GPIO_14] = { .pin = IOPORT_CREATE_PIN( PIOA, 1 ), .wakeup_pin_config = &platform_wakeup_pin_config[WICED_GPIO_14] }, [WICED_GPIO_15] = { .pin = IOPORT_CREATE_PIN( PIOA, 3 ), .wakeup_pin_config = &platform_wakeup_pin_config[WICED_GPIO_15] }, [WICED_GPIO_16] = { .pin = IOPORT_CREATE_PIN( PIOA, 4 ), .wakeup_pin_config = &platform_wakeup_pin_config[WICED_GPIO_16] },
/** * \brief Initialize USART in SPI master mode. * * This function initializes the USART module in SPI master mode using the * usart_spi_options_t configuration structure and CPU frequency. * * \param usart The USART module. * \param opt The RS232 configuration option. */ void usart_init_spi(USART_t *usart, const usart_spi_options_t *opt) { ioport_pin_t sck_pin; bool invert_sck; sysclk_enable_peripheral_clock(usart); usart_rx_disable(usart); /* configure Clock polarity using INVEN bit of the correct SCK I/O port **/ invert_sck = (opt->spimode == 2) || (opt->spimode == 3); UNUSED(invert_sck); #ifdef USARTC0 if ((uint16_t)usart == (uint16_t)&USARTC0) { sck_pin = IOPORT_CREATE_PIN(PORTC, 1); } #endif #ifdef USARTC1 if ((uint16_t)usart == (uint16_t)&USARTC1) { sck_pin = IOPORT_CREATE_PIN(PORTC, 5); } #endif #ifdef USARTD0 if ((uint16_t)usart == (uint16_t)&USARTD0) { sck_pin = IOPORT_CREATE_PIN(PORTD, 1); } #endif #ifdef USARTD1 if ((uint16_t)usart == (uint16_t)&USARTD1) { sck_pin = IOPORT_CREATE_PIN(PORTD, 5); } #endif #ifdef USARTE0 if ((uint16_t)usart == (uint16_t)&USARTE0) { sck_pin = IOPORT_CREATE_PIN(PORTE, 1); } #endif #ifdef USARTE1 if ((uint16_t)usart == (uint16_t)&USARTE1) { sck_pin = IOPORT_CREATE_PIN(PORTE, 5); } #endif #ifdef USARTF0 if ((uint16_t)usart == (uint16_t)&USARTF0) { sck_pin = IOPORT_CREATE_PIN(PORTF, 1); } #endif #ifdef USARTF1 if ((uint16_t)usart == (uint16_t)&USARTF1) { sck_pin = IOPORT_CREATE_PIN(PORTF, 5); } #endif /* Configure the USART output pin */ ioport_set_pin_dir(sck_pin, IOPORT_DIR_OUTPUT); ioport_set_pin_mode(sck_pin, IOPORT_MODE_TOTEM | (invert_sck? IOPORT_MODE_INVERT_PIN : 0)); ioport_set_pin_level(sck_pin, IOPORT_PIN_LEVEL_HIGH); usart_set_mode(usart, USART_CMODE_MSPI_gc); if (opt->spimode == 1 || opt->spimode == 3) { usart->CTRLC |= USART_UCPHA_bm; } else { usart->CTRLC &= ~USART_UCPHA_bm; } if (opt->data_order) { (usart)->CTRLC |= USART_DORD_bm; } else { (usart)->CTRLC &= ~USART_DORD_bm; } usart_spi_set_baudrate(usart, opt->baudrate, sysclk_get_per_hz()); usart_tx_enable(usart); usart_rx_enable(usart); }
/** * \internal * \brief Test XCL Glue Logic module with 3 Inputs XOR * * This tests check the capabilty of the XCL Glue Logic Drivers to hangle * a 3 inputs XOR operation. * * \param test Current test case. */ static void run_xcl_glue_logic_3inputs_xor_test( const struct test_case *test) { port_pin_t in0, in2, in3, out0; bool out; in0 = IOPORT_CREATE_PIN(PORTD, 2); in2 = IOPORT_CREATE_PIN(PORTD, 1); in3 = IOPORT_CREATE_PIN(PORTD, 3); out0 = IOPORT_CREATE_PIN(PORTD, 4); ioport_configure_pin(in0, IOPORT_DIR_OUTPUT); ioport_configure_pin(in2, IOPORT_DIR_OUTPUT); ioport_configure_pin(in3, IOPORT_DIR_OUTPUT); /* Configure the XCL module: * - Asynchronous mode usage (locks Power Down sleep mode) * - Configure XCL to use ATxmega32E5 port D * - Configure LUT in 1 LUTs with 3 differents inputs * - LUT IN0 input on pin 2 of port D * - LUT IN1 input on XCL LUT OUT1 * - LUT OUT0 output on pin 4 of port D * - LUT IN2 input on pin 1 of port D * - LUT IN3 input on pin 3 of port D * - LUT OUT1 output on LUT IN1 * - No time Delay for both LUT0 and LUT1 * - LUT0 performs XOR operation * - LUT1 performs XOR operation */ xcl_enable(XCL_ASYNCHRONOUS); xcl_port(PD); xcl_lut_type(LUT_1LUT3IN); xcl_lut_in0(LUT_IN_PINL); xcl_lut_in1(LUT_IN_XCL); xcl_lut_in2(LUT_IN_PINL); xcl_lut_in3(LUT_IN_PINL); xcl_lut0_output(LUT0_OUT_PIN4); xcl_lut_config_delay(DLY11, LUT_DLY_DISABLE, LUT_DLY_DISABLE); xcl_lut0_truth(XOR); xcl_lut1_truth(XOR); gpio_set_pin_low(in0); gpio_set_pin_low(in2); gpio_set_pin_low(in3); asm("nop"); asm("nop"); /* give two cycles propagation delay to read the port pin */ out = ioport_get_pin_level(out0); test_assert_true(test, out == false, " XCL XOR failure"); gpio_set_pin_high(in0); gpio_set_pin_low(in2); gpio_set_pin_low(in3); asm("nop"); asm("nop"); /* give two cycles propagation delay to read the port pin */ out = ioport_get_pin_level(out0); test_assert_true(test, out == true, " XCL XOR failure"); gpio_set_pin_low(in0); gpio_set_pin_high(in2); gpio_set_pin_low(in3); asm("nop"); asm("nop"); /* give two cycles propagation delay to read the port pin */ out = ioport_get_pin_level(out0); test_assert_true(test, out == true, " XCL XOR failure"); gpio_set_pin_low(in0); gpio_set_pin_low(in2); gpio_set_pin_high(in3); asm("nop"); asm("nop"); /* give two cycles propagation delay to read the port pin */ out = ioport_get_pin_level(out0); test_assert_true(test, out == true, " XCL XOR failure"); gpio_set_pin_low(in0); gpio_set_pin_high(in2); gpio_set_pin_high(in3); asm("nop"); asm("nop"); /* give two cycles propagation delay to read the port pin */ out = ioport_get_pin_level(out0); test_assert_true(test, out == false, " XCL XOR failure"); gpio_set_pin_high(in0); gpio_set_pin_high(in2); gpio_set_pin_high(in3); asm("nop"); asm("nop"); /* give two cycles propagation delay to read the port pin */ out = ioport_get_pin_level(out0); test_assert_true(test, out == true, " XCL XOR failure"); }
/** * \brief Initialize USART in SPI master mode. * * This function initializes the USART module in SPI master mode using the * usart_spi_options_t configuration structure and CPU frequency. * * \param usart The USART module. * \param opt The RS232 configuration option. */ void usart_init_spi(USART_t *usart, const usart_spi_options_t *opt) { usart_enable_module_clock(usart); usart_set_mode(usart, USART_CMODE_MSPI_gc); port_pin_t sck_pin; if (opt->spimode == 1 || opt->spimode == 3) { //! \todo Fix when UCPHA_bm is added to header file. usart->CTRLC |= 0x02; } else { //! \todo Fix when UCPHA_bm is added to header file. usart->CTRLC &= ~0x02; } // configure Clock polarity using INVEN bit of the correct SCK I/O port if (opt->spimode == 2 || opt->spimode == 3) { #ifdef USARTC0 if ((uint16_t)usart == (uint16_t)&USARTC0) { sck_pin = IOPORT_CREATE_PIN(PORTC, 1); ioport_configure_port_pin(ioport_pin_to_port(sck_pin), ioport_pin_to_mask(sck_pin), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH | IOPORT_INV_ENABLED); } #endif #ifdef USARTC1 if ((uint16_t)usart == (uint16_t)&USARTC1) { sck_pin = IOPORT_CREATE_PIN(PORTC, 5); ioport_configure_port_pin(ioport_pin_to_port(sck_pin), ioport_pin_to_mask(sck_pin), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH | IOPORT_INV_ENABLED); } #endif #ifdef USARTD0 if ((uint16_t)usart == (uint16_t)&USARTD0) { sck_pin = IOPORT_CREATE_PIN(PORTD, 1); ioport_configure_port_pin(ioport_pin_to_port(sck_pin), ioport_pin_to_mask(sck_pin), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH | IOPORT_INV_ENABLED); } #endif #ifdef USARTD1 if ((uint16_t)usart == (uint16_t)&USARTD1) { sck_pin = IOPORT_CREATE_PIN(PORTD, 5); ioport_configure_port_pin(ioport_pin_to_port(sck_pin), ioport_pin_to_mask(sck_pin), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH | IOPORT_INV_ENABLED); } #endif #ifdef USARTE0 if ((uint16_t)usart == (uint16_t)&USARTE0) { sck_pin = IOPORT_CREATE_PIN(PORTE, 1); ioport_configure_port_pin(ioport_pin_to_port(sck_pin), ioport_pin_to_mask(sck_pin), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH | IOPORT_INV_ENABLED); } #endif #ifdef USARTE1 if ((uint16_t)usart == (uint16_t)&USARTE1) { sck_pin = IOPORT_CREATE_PIN(PORTE, 5); ioport_configure_port_pin(ioport_pin_to_port(sck_pin), ioport_pin_to_mask(sck_pin), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH | IOPORT_INV_ENABLED); } #endif #ifdef USARTF0 if ((uint16_t)usart == (uint16_t)&USARTF0) { sck_pin = IOPORT_CREATE_PIN(PORTF, 1); ioport_configure_port_pin(ioport_pin_to_port(sck_pin), ioport_pin_to_mask(sck_pin), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH | IOPORT_INV_ENABLED); } #endif #ifdef USARTF1 if ((uint16_t)usart == (uint16_t)&USARTF1) { sck_pin = IOPORT_CREATE_PIN(PORTF, 5); ioport_configure_port_pin(ioport_pin_to_port(sck_pin), ioport_pin_to_mask(sck_pin), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH | IOPORT_INV_ENABLED); } #endif } usart_spi_set_baudrate(usart, opt->baudrate, sysclk_get_per_hz()); usart_tx_enable(usart); usart_rx_enable(usart); }
void board_init(void) { ioport_configure_pin(LED0_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED1_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED2_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED3_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_LOW | IOPORT_INV_ENABLED); ioport_configure_pin(GPIO_PUSH_BUTTON_0, IOPORT_DIR_INPUT | IOPORT_LEVEL | IOPORT_PULL_UP); ioport_configure_pin(GPIO_PUSH_BUTTON_1, IOPORT_DIR_INPUT | IOPORT_LEVEL | IOPORT_PULL_UP); ioport_configure_pin(GPIO_PUSH_BUTTON_2, IOPORT_DIR_INPUT | IOPORT_LEVEL | IOPORT_PULL_UP); #ifdef CONF_BOARD_C12832A1Z ioport_configure_pin(NHD_C12832A1Z_SPI_SCK, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(NHD_C12832A1Z_SPI_MOSI, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(NHD_C12832A1Z_CSN, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(NHD_C12832A1Z_REGISTER_SELECT, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(NHD_C12832A1Z_RESETN, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(NHD_C12832A1Z_BACKLIGHT, IOPORT_DIR_OUTPUT | IOPORT_INIT_LOW); #endif #ifdef CONF_BOARD_AT45DBX ioport_configure_pin(AT45DBX_MASTER_SCK, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(AT45DBX_MASTER_MOSI, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(AT45DBX_MASTER_MISO, IOPORT_DIR_INPUT); ioport_configure_pin(AT45DBX_CS, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); #endif #ifdef CONF_BOARD_ENABLE_MXT143E_XPLAINED ioport_configure_pin(MXT143E_XPLAINED_SCK, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(MXT143E_XPLAINED_MOSI, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(MXT143E_XPLAINED_MISO, IOPORT_DIR_INPUT); ioport_configure_pin(MXT143E_XPLAINED_CS, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(MXT143E_XPLAINED_CHG, IOPORT_DIR_INPUT); ioport_configure_pin(MXT143E_XPLAINED_DC, IOPORT_DIR_OUTPUT | IOPORT_INIT_LOW); #ifndef MXT143E_XPLAINED_BACKLIGHT_DISABLE ioport_configure_pin(MXT143E_XPLAINED_BACKLIGHT, IOPORT_DIR_OUTPUT | IOPORT_INIT_LOW); #endif ioport_configure_pin(MXT143E_XPLAINED_LCD_RESET, IOPORT_DIR_OUTPUT | IOPORT_INIT_LOW); #endif #ifdef CONF_BOARD_ENABLE_AC_PINS ioport_configure_pin(IOPORT_CREATE_PIN(PORTA, 0), IOPORT_DIR_INPUT); ioport_configure_pin(IOPORT_CREATE_PIN(PORTA, 2), IOPORT_DIR_INPUT); ioport_configure_pin(IOPORT_CREATE_PIN(PORTB, 1), IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_ENABLE_USARTC0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 3), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 2), IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_ENABLE_USARTD0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 3), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 2), IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_ENABLE_USARTE0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTE, 3), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTE, 2), IOPORT_DIR_INPUT); #endif #if defined (SENSORS_XPLAINED_BOARD) /* Configure the Xplained Sensor extension board, if any, after * the platform Xplained board has configured basic clock settings, * GPIO pin mapping, interrupt controller options, etc. */ sensor_board_init (); #endif #ifdef CONF_BOARD_AT86RFX ioport_configure_pin(AT86RFX_SPI_SCK, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(AT86RFX_SPI_MOSI, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(AT86RFX_SPI_MISO, IOPORT_DIR_INPUT); ioport_configure_pin(AT86RFX_SPI_CS, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); /* Initialize TRX_RST and SLP_TR as GPIO. */ ioport_configure_pin(AT86RFX_RST_PIN, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(AT86RFX_SLP_PIN, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); #endif }
void board_init(void) { ioport_configure_pin(LED0_GPIO, IOPORT_DIR_OUTPUT|IOPORT_INIT_LOW|IOPORT_INV_ENABLED); ioport_configure_pin(LED1_GPIO, IOPORT_DIR_OUTPUT|IOPORT_INIT_LOW|IOPORT_INV_ENABLED); ioport_configure_pin(LED2_GPIO, IOPORT_DIR_OUTPUT|IOPORT_INIT_LOW|IOPORT_INV_ENABLED); ioport_configure_pin(LED3_GPIO, IOPORT_DIR_OUTPUT|IOPORT_INIT_LOW|IOPORT_INV_ENABLED); ioport_configure_pin(BACKLIGHT_GPIO, IOPORT_DIR_OUTPUT|IOPORT_INIT_LOW); ioport_configure_pin(LED_POWER, IOPORT_DIR_OUTPUT|IOPORT_INIT_HIGH); ioport_configure_pin(GPIO_PUSH_BUTTON_0, IOPORT_DIR_INPUT | IOPORT_PULL_UP); ioport_configure_pin(GPIO_PUSH_BUTTON_1, IOPORT_DIR_INPUT | IOPORT_PULL_UP); ioport_configure_pin(GPIO_PUSH_BUTTON_2, IOPORT_DIR_INPUT | IOPORT_PULL_UP); ioport_configure_pin(GPIO_PUSH_BUTTON_3, IOPORT_DIR_INPUT | IOPORT_PULL_UP); #ifdef CONF_BOARD_AT45DBX ioport_configure_pin(AT45DBX_MASTER_SCK, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(AT45DBX_MASTER_MOSI, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(AT45DBX_MASTER_MISO, IOPORT_DIR_INPUT); ioport_configure_pin(AT45DBX_CS, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); // Setting PORT_USART0_bm to one will move the pin location // of USARTC0 (in mode SPI) from Px[3:0] to Px[7:4]. PORTC.REMAP |= PORT_USART0_bm; #endif #ifdef CONF_BOARD_LIGHT_SENSOR ioport_configure_pin(LIGHT_SENSOR_SIGNAL_PIN, IOPORT_DIR_INPUT | IOPORT_INPUT_DISABLE); #endif #ifdef CONF_BOARD_TEMPERATURE_SENSOR ioport_configure_pin(TEMPERATURE_SENSOR_SIGNAL_PIN, IOPORT_DIR_INPUT | IOPORT_INPUT_DISABLE); #endif #ifdef CONF_BOARD_POTENTIOMETER_SENSOR ioport_configure_pin(POTENTIOMETER_SIGNAL_PIN, IOPORT_DIR_INPUT | IOPORT_INPUT_DISABLE); #endif #ifdef CONF_BOARD_ENABLE_MXT143E_XPLAINED ioport_configure_pin(MXT143E_XPLAINED_SCK, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(MXT143E_XPLAINED_MOSI, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(MXT143E_XPLAINED_MISO, IOPORT_DIR_INPUT); ioport_configure_pin(MXT143E_XPLAINED_CS, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(MXT143E_XPLAINED_CHG, IOPORT_DIR_INPUT); ioport_configure_pin(MXT143E_XPLAINED_DC, IOPORT_DIR_OUTPUT | IOPORT_INIT_LOW); #ifndef MXT143E_XPLAINED_BACKLIGHT_DISABLE ioport_configure_pin(MXT143E_XPLAINED_BACKLIGHT, IOPORT_DIR_OUTPUT | IOPORT_INIT_LOW); #endif ioport_configure_pin(MXT143E_XPLAINED_LCD_RESET, IOPORT_DIR_OUTPUT | IOPORT_INIT_LOW); // Setting PORT_USART0_bm to one will move the pin location // of USARTC0 (in mode SPI) from Px[3:0] to Px[7:4]. PORTC.REMAP |= PORT_USART0_bm; #endif #ifdef CONF_BOARD_LCD_BACKLIGHT_PWM backlight_start_pwm(); #endif #ifdef CONF_BOARD_ENABLE_USARTC0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 3), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 2), IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_ENABLE_USARTE0 /* Note: this will disable touch buttons 2 and 3 as they share the same * physical pins at the USART E module. */ ioport_configure_pin(IOPORT_CREATE_PIN(PORTE, 3), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTE, 2), IOPORT_DIR_INPUT); #endif #if defined (SENSORS_XPLAINED_BOARD) /* Configure the Xplained Sensor extension board, if any, after * the platform Xplained board has configured basic clock settings, * GPIO pin mapping, interrupt controller options, etc. */ sensor_board_init (); #endif }
void board_init(void) { ioport_configure_pin(LED0_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED1_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED2_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED3_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED4_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED5_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED6_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED7_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(GPIO_PUSH_BUTTON_0, IOPORT_DIR_INPUT | IOPORT_PULL_UP | IOPORT_FORCE_ENABLE); ioport_configure_pin(GPIO_PUSH_BUTTON_1, IOPORT_DIR_INPUT | IOPORT_PULL_UP | IOPORT_FORCE_ENABLE); ioport_configure_pin(GPIO_PUSH_BUTTON_2, IOPORT_DIR_INPUT | IOPORT_PULL_UP | IOPORT_FORCE_ENABLE); ioport_configure_pin(GPIO_PUSH_BUTTON_3, IOPORT_DIR_INPUT | IOPORT_PULL_UP | IOPORT_FORCE_ENABLE); #ifdef CONF_BOARD_ENABLE_AC_PINS ioport_configure_pin(IOPORT_CREATE_PIN(PORTA, 0), IOPORT_DIR_INPUT); ioport_configure_pin(IOPORT_CREATE_PIN(PORTA, 2), IOPORT_DIR_INPUT); ioport_configure_pin(IOPORT_CREATE_PIN(PORTB, 1), IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_AT45DBX ioport_configure_pin(AT45DBX_MASTER_SCK, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(AT45DBX_MASTER_MOSI, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(AT45DBX_MASTER_MISO, IOPORT_DIR_INPUT); ioport_configure_pin(AT45DBX_CS, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); #endif #ifdef CONF_BOARD_ENABLE_USARTC0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 3), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 2), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE); #endif #ifdef CONF_BOARD_ENABLE_USARTD0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 3), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 2), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE); #endif #ifdef CONF_BOARD_ENABLE_USARTC0_ONEWIRE ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 2), IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_ENABLE_USARTD0_ONEWIRE ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 2), IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_CLKOUT_PC7 PORTC.DIR |= 0x80; PORTCFG.CLKOUT |= PORTCFG_CLKOUT_PC7_gc; #endif /* XCL OUT0 configurations */ #ifdef CONF_BOARD_XCL_OUT0_PD0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 0), IOPORT_DIR_OUTPUT); #endif #ifdef CONF_BOARD_XCL_OUT0_PD4 ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 4), IOPORT_DIR_OUTPUT); #endif #ifdef CONF_BOARD_XCL_OUT0_PC0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 0), IOPORT_DIR_OUTPUT); #endif #ifdef CONF_BOARD_XCL_OUT0_PC4 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 4), IOPORT_DIR_OUTPUT); #endif #ifdef CONF_BOARD_XCL_OUT0_PD0_INV ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 0), IOPORT_DIR_OUTPUT | IOPORT_INV_ENABLED); #endif #ifdef CONF_BOARD_XCL_OUT0_PD4_INV ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 4), IOPORT_DIR_OUTPUT | IOPORT_INV_ENABLED); #endif #ifdef CONF_BOARD_XCL_OUT0_PC0_INV ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 0), IOPORT_DIR_OUTPUT | IOPORT_INV_ENABLED); #endif #ifdef CONF_BOARD_XCL_OUT0_PC4_INV ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 4), IOPORT_DIR_OUTPUT | IOPORT_INV_ENABLED); #endif /* XCL CC0 and CC1 configurations */ #ifdef CONF_BOARD_XCL_CC0_PC2 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 2), IOPORT_DIR_OUTPUT); #endif #ifdef CONF_BOARD_XCL_CC0_PC3 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 3), IOPORT_DIR_OUTPUT); #endif #ifdef CONF_BOARD_XCL_CC0_PD2 ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 2), IOPORT_DIR_OUTPUT); #endif #ifdef CONF_BOARD_XCL_CC0_PD3 ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 3), IOPORT_DIR_OUTPUT); #endif #ifdef CONF_BOARD_XCL_CC0_PC2_INV ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 2), IOPORT_DIR_OUTPUT | IOPORT_INV_ENABLED); #endif #ifdef CONF_BOARD_XCL_CC0_PC3_INV ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 3), IOPORT_DIR_OUTPUT | IOPORT_INV_ENABLED); #endif #ifdef CONF_BOARD_XCL_CC0_PD2_INV ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 2), IOPORT_DIR_OUTPUT | IOPORT_INV_ENABLED); #endif #ifdef CONF_BOARD_XCL_CC0_PD3_INV ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 3), IOPORT_DIR_OUTPUT | IOPORT_INV_ENABLED); #endif /* XCL IN0 configurations */ #ifdef CONF_BOARD_XCL_IN0_PD2 ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 2), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE); #endif #ifdef CONF_BOARD_XCL_IN0_PD2_INV ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 2), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE | IOPORT_INV_ENABLED); #endif #ifdef CONF_BOARD_XCL_IN0_PD6 ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 6), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE); #endif #ifdef CONF_BOARD_XCL_IN0_PD6_INV ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 6), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE | IOPORT_INV_ENABLED); #endif #ifdef CONF_BOARD_XCL_IN0_PC2 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 2), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE); #endif #ifdef CONF_BOARD_XCL_IN0_PC2_INV ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 2), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE | IOPORT_INV_ENABLED); #endif #ifdef CONF_BOARD_XCL_IN0_PC6 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 6), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE); #endif #ifdef CONF_BOARD_XCL_IN0_PC6_INV ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 6), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE | IOPORT_INV_ENABLED); #endif /* XCL IN1 Configurations */ #ifdef CONF_BOARD_XCL_IN1_PD0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 0), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE); #endif #ifdef CONF_BOARD_XCL_IN1_PD0_INV ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 0), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE | IOPORT_INV_ENABLED); #endif #ifdef CONF_BOARD_XCL_IN1_PD4 ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 4), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE); #endif #ifdef CONF_BOARD_XCL_IN1_PD4_INV ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 4), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE | IOPORT_INV_ENABLED); #endif #ifdef CONF_BOARD_XCL_IN1_PC0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 0), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE); #endif #ifdef CONF_BOARD_XCL_IN1_PC0_INV ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 0), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE | IOPORT_INV_ENABLED); #endif #ifdef CONF_BOARD_XCL_IN1_PC4 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 4), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE); #endif #ifdef CONF_BOARD_XCL_IN1_PC4_INV ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 4), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE | IOPORT_INV_ENABLED); #endif /* XCL IN2 Configurations */ #ifdef CONF_BOARD_XCL_IN2_PD1 ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 1), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE); #endif #ifdef CONF_BOARD_XCL_IN2_PD1_INV ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 1), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE | IOPORT_INV_ENABLED); #endif #ifdef CONF_BOARD_XCL_IN2_PD5 ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 5), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE); #endif #ifdef CONF_BOARD_XCL_IN2_PD5_INV ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 5), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE | IOPORT_INV_ENABLED); #endif #ifdef CONF_BOARD_XCL_IN2_PC1 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 1), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE); #endif #ifdef CONF_BOARD_XCL_IN2_PC1_INV ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 1), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE | IOPORT_INV_ENABLED); #endif #ifdef CONF_BOARD_XCL_IN2_PC5 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 5), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE); #endif #ifdef CONF_BOARD_XCL_IN2_PC5_INV ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 5), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE | IOPORT_INV_ENABLED); #endif /* XCL IN3 Configurations */ #ifdef CONF_BOARD_XCL_IN3_PD3 ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 3), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE); #endif #ifdef CONF_BOARD_XCL_IN3_PD3_INV ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 3), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE | IOPORT_INV_ENABLED); #endif #ifdef CONF_BOARD_XCL_IN3_PD7 ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 7), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE); #endif #ifdef CONF_BOARD_XCL_IN3_PD7_INV ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 7), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE | IOPORT_INV_ENABLED); #endif #ifdef CONF_BOARD_XCL_IN3_PC3 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 3), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE); #endif #ifdef CONF_BOARD_XCL_IN3_PC3_INV ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 3), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE | IOPORT_INV_ENABLED); #endif #ifdef CONF_BOARD_XCL_IN3_PC7 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 7), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE); #endif #ifdef CONF_BOARD_XCL_IN3_PC7_INV ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 7), IOPORT_DIR_INPUT | IOPORT_FORCE_ENABLE | IOPORT_INV_ENABLED); #endif /* TC45 Output Configurations */ #ifdef CONF_BOARD_TC45_OUT0_PC0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 0), IOPORT_DIR_OUTPUT); #endif #ifdef CONF_BOARD_TC45_OUT0_PC1 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 1), IOPORT_DIR_OUTPUT); #endif #ifdef CONF_BOARD_TC45_OUT0_PC2 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 2), IOPORT_DIR_OUTPUT); #endif #ifdef CONF_BOARD_TC45_OUT0_PC3 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 3), IOPORT_DIR_OUTPUT); #endif #ifdef CONF_BOARD_TC45_OUT0_PC4 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 4), IOPORT_DIR_OUTPUT); #endif #ifdef CONF_BOARD_TC45_OUT0_PC5 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 5), IOPORT_DIR_OUTPUT); #endif #ifdef CONF_BOARD_TC45_OUT0_PC6 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 6), IOPORT_DIR_OUTPUT); #endif #ifdef CONF_BOARD_TC45_OUT0_PC7 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 7), IOPORT_DIR_OUTPUT); #endif #ifdef CONF_BOARD_TC45_OUT0_PD4 ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 4), IOPORT_DIR_OUTPUT); #endif }
void board_init(void) { ioport_configure_pin(LED0_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED1_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED2_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED3_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED4_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED5_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED6_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED7_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(GPIO_PUSH_BUTTON_0, IOPORT_DIR_INPUT | IOPORT_PULL_UP); ioport_configure_pin(GPIO_PUSH_BUTTON_1, IOPORT_DIR_INPUT | IOPORT_PULL_UP); ioport_configure_pin(GPIO_PUSH_BUTTON_2, IOPORT_DIR_INPUT | IOPORT_PULL_UP); ioport_configure_pin(GPIO_PUSH_BUTTON_3, IOPORT_DIR_INPUT | IOPORT_PULL_UP); ioport_configure_pin(GPIO_PUSH_BUTTON_4, IOPORT_DIR_INPUT | IOPORT_PULL_UP); ioport_configure_pin(GPIO_PUSH_BUTTON_5, IOPORT_DIR_INPUT | IOPORT_PULL_UP); ioport_configure_pin(GPIO_PUSH_BUTTON_6, IOPORT_DIR_INPUT | IOPORT_PULL_UP); ioport_configure_pin(GPIO_PUSH_BUTTON_7, IOPORT_DIR_INPUT | IOPORT_PULL_UP); #ifdef CONF_BOARD_AT45DBX ioport_configure_pin(AT45DBX_MASTER_SCK, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(AT45DBX_MASTER_MOSI, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(AT45DBX_MASTER_MISO, IOPORT_DIR_INPUT); ioport_configure_pin(AT45DBX_CS, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); #endif #ifdef CONF_BOARD_ENABLE_AC_PINS ioport_configure_pin(IOPORT_CREATE_PIN(PORTA, 0), IOPORT_DIR_INPUT); ioport_configure_pin(IOPORT_CREATE_PIN(PORTA, 2), IOPORT_DIR_INPUT); ioport_configure_pin(IOPORT_CREATE_PIN(PORTB, 1), IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_ENABLE_SPEAKER ioport_configure_pin(IOPORT_CREATE_PIN(PORTQ, 3), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); #endif #ifdef CONF_BOARD_ENABLE_USARTC0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 3), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 2), IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_ENABLE_USARTD0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 3), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 2), IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_ENABLE_DISPLAY_XPLAINED ioport_configure_pin(DISPLAY_XPLAINED_CS, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(DISPLAY_XPLAINED_TE, IOPORT_DIR_INPUT); ioport_configure_pin(DISPLAY_XPLAINED_BACKLIGHT, IOPORT_DIR_OUTPUT | IOPORT_INIT_LOW); ioport_configure_pin(DISPLAY_XPLAINED_RESET, IOPORT_DIR_OUTPUT | IOPORT_INIT_LOW); # define CONF_BOARD_ENABLE_USARTD1 /* USARTD1 XCK1 */ ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 5), IOPORT_DIR_OUTPUT | IOPORT_INIT_LOW); #endif #ifdef CONF_BOARD_ENABLE_USARTD1 ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 7), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 6), IOPORT_DIR_INPUT); #endif }
void board_init(void) { ioport_configure_pin(LED0_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED1_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED2_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED3_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED4_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED5_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED6_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(LED7_GPIO, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(GPIO_PUSH_BUTTON_0, IOPORT_DIR_INPUT | IOPORT_PULL_UP); ioport_configure_pin(GPIO_PUSH_BUTTON_1, IOPORT_DIR_INPUT | IOPORT_PULL_UP); ioport_configure_pin(GPIO_PUSH_BUTTON_2, IOPORT_DIR_INPUT | IOPORT_PULL_UP); ioport_configure_pin(GPIO_PUSH_BUTTON_3, IOPORT_DIR_INPUT | IOPORT_PULL_UP); ioport_configure_pin(GPIO_PUSH_BUTTON_4, IOPORT_DIR_INPUT | IOPORT_PULL_UP); ioport_configure_pin(GPIO_PUSH_BUTTON_5, IOPORT_DIR_INPUT | IOPORT_PULL_UP); ioport_configure_pin(GPIO_PUSH_BUTTON_6, IOPORT_DIR_INPUT | IOPORT_PULL_UP); ioport_configure_pin(GPIO_PUSH_BUTTON_7, IOPORT_DIR_INPUT | IOPORT_PULL_UP); #ifdef CONF_BOARD_AT45DBX #warning Check that the DataFlash AT45DB is mounted on your board ioport_configure_pin(AT45DBX_MASTER_SCK, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(AT45DBX_MASTER_MOSI, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(AT45DBX_MASTER_MISO, IOPORT_DIR_INPUT); ioport_configure_pin(AT45DBX_CS, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); #endif #ifdef CONF_BOARD_ENABLE_MXT143E_XPLAINED ioport_configure_pin(MXT143E_XPLAINED_SCK, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(MXT143E_XPLAINED_MOSI, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(MXT143E_XPLAINED_MISO, IOPORT_DIR_INPUT); ioport_configure_pin(MXT143E_XPLAINED_CS, IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(MXT143E_XPLAINED_CHG, IOPORT_DIR_INPUT); ioport_configure_pin(MXT143E_XPLAINED_DC, IOPORT_DIR_OUTPUT); #ifndef MXT143E_XPLAINED_BACKLIGHT_DISABLE ioport_configure_pin(MXT143E_XPLAINED_BACKLIGHT, IOPORT_DIR_OUTPUT | IOPORT_INIT_LOW); #endif ioport_configure_pin(MXT143E_XPLAINED_LCD_RESET, IOPORT_DIR_OUTPUT | IOPORT_INIT_LOW); #endif #ifdef CONF_BOARD_ENABLE_AC_PINS ioport_configure_pin(IOPORT_CREATE_PIN(PORTA, 0), IOPORT_DIR_INPUT); ioport_configure_pin(IOPORT_CREATE_PIN(PORTA, 2), IOPORT_DIR_INPUT); ioport_configure_pin(IOPORT_CREATE_PIN(PORTB, 1), IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_ENABLE_LIGHT_SENSOR ioport_configure_pin(LIGHT_SENSOR_SIGNAL_PIN, IOPORT_DIR_INPUT | IOPORT_INPUT_DISABLE); #endif #ifdef CONF_BOARD_ENABLE_TEMPERATURE_SENSOR ioport_configure_pin(TEMPERATURE_SENSOR_SIGNAL_PIN, IOPORT_DIR_INPUT | IOPORT_INPUT_DISABLE); ioport_configure_pin(TEMPERATURE_SENSOR_ENABLE_PIN, IOPORT_DIR_OUTPUT | (TEMPERATURE_SENSOR_ENABLE_LEVEL ? IOPORT_INIT_HIGH : IOPORT_INIT_LOW)); #endif #ifdef CONF_BOARD_ENABLE_SPEAKER ioport_configure_pin(SPEAKER_SIGNAL_PIN, IOPORT_DIR_INPUT | IOPORT_INPUT_DISABLE); ioport_configure_pin(SPEAKER_ENABLE_PIN, IOPORT_DIR_OUTPUT | (SPEAKER_ENABLE_LEVEL ? IOPORT_INIT_HIGH : IOPORT_INIT_LOW)); #endif #ifdef CONF_BOARD_ENABLE_USARTC0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 3), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTC, 2), IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_ENABLE_USARTD0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 3), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTD, 2), IOPORT_DIR_INPUT); #endif #ifdef CONF_BOARD_ENABLE_USARTF0 ioport_configure_pin(IOPORT_CREATE_PIN(PORTF, 3), IOPORT_DIR_OUTPUT | IOPORT_INIT_HIGH); ioport_configure_pin(IOPORT_CREATE_PIN(PORTF, 2), IOPORT_DIR_INPUT); #endif #if defined (SENSORS_XPLAINED_BOARD) /* Configure the Xplained Sensor extension board, if any, after * the platform Xplained board has configured basic clock settings, * GPIO pin mapping, interrupt controller options, etc. */ sensor_board_init (); #elif EXT_BOARD == SECURITY_XPLAINED // Only ATSHA204 I2C devices are supported. security_board_init(); #endif }