/**
* @brief Configure the LPTIMx peripheral according to the specified parameters.
* @note LL_LPTIM_Init can only be called when the LPTIM instance is disabled.
* @note LPTIMx can be disabled using unitary function @ref LL_LPTIM_Disable().
* @param LPTIMx LP Timer Instance
* @param LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure
* @retval An ErrorStatus enumeration value:
* - SUCCESS: LPTIMx instance has been initialized
* - ERROR: LPTIMx instance hasn't been initialized
*/
ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef * LPTIMx, LL_LPTIM_InitTypeDef* LPTIM_InitStruct)
{
ErrorStatus result = SUCCESS;
/* The LPTIMx_CFGR register must only be modified when the LPTIM is disabled
(ENABLE bit is reset to 0).
*/
if (LL_LPTIM_IsEnabled(LPTIMx))
{
result = ERROR;
}
else
{
/* Check the parameters */
assert_param(IS_LPTIM_INSTANCE(LPTIMx));
assert_param(IS_LPTIM_CLOCK_SOURCE(LPTIM_InitStruct->ClockSource));
assert_param(IS_LPTIM_CLOCK_PRESCALER(LPTIM_InitStruct->Prescaler));
assert_param(IS_LPTIM_WAVEFORM(LPTIM_InitStruct->Waveform));
assert_param(IS_LPTIM_OUTPUT_POLARITY(LPTIM_InitStruct->Polarity));
/* Set CKSEL bitfield according to ClockSource value */
/* Set PRESC bitfield according to Prescaler value */
/* Set WAVE bitfield according to Waveform value */
/* Set WAVEPOL bitfield according to Polarity value */
MODIFY_REG(LPTIMx->CFGR,
(LPTIM_CFGR_CKSEL | LPTIM_CFGR_PRESC | LPTIM_CFGR_WAVE| LPTIM_CFGR_WAVPOL),
LPTIM_InitStruct->ClockSource | \
LPTIM_InitStruct->Prescaler | \
LPTIM_InitStruct->Waveform | \
LPTIM_InitStruct->Polarity);
}
return result;
}
/**
* @brief Initializes the LPTIMx peripheral according to the specified parameters
* in the LPTIM_InitStruct.
* @param LPTIMx: where x can be 1.
* @param LPTIM_InitStruct: pointer to an LPTIM_InitTypeDef structure that contains
* the configuration information for the specified LPTIM peripheral.
* @retval None
*
* @note It is mandatory to disable the peripheral to use this function.
*/
void LPTIM_Init(LPTIM_TypeDef* LPTIMx, LPTIM_InitTypeDef* LPTIM_InitStruct)
{
uint32_t tmpreg1 = 0;
/* Check the parameters */
assert_param(IS_LPTIM_ALL_PERIPH(LPTIMx));
assert_param(IS_LPTIM_CLOCK_SOURCE(LPTIM_InitStruct->LPTIM_ClockSource));
assert_param(IS_LPTIM_CLOCK_PRESCALER(LPTIM_InitStruct->LPTIM_Prescaler));
assert_param(IS_LPTIM_WAVEFORM(LPTIM_InitStruct->LPTIM_Waveform));
assert_param(IS_LPTIM_OUTPUT_POLARITY(LPTIM_InitStruct->LPTIM_OutputPolarity));
/* Get the LPTIMx CFGR value */
tmpreg1 = LPTIMx->CFGR;
/* Clear CKSEL, PRESC, WAVE and WAVEPOL bits */
tmpreg1 &= CFGR_INIT_CLEAR_MASK;
/* Set or Reset CKSEL bit according to LPTIM_ClockSource value */
/* Set or Reset PRESC bits according to LPTIM_Prescaler value */
/* Set or Reset WAVE bit according to LPTIM_Waveform value */
/* Set or Reset WAVEPOL bit according to LPTIM_OutputPolarity value */
tmpreg1 |= (LPTIM_InitStruct->LPTIM_ClockSource | LPTIM_InitStruct->LPTIM_Prescaler
|LPTIM_InitStruct->LPTIM_Waveform | LPTIM_InitStruct->LPTIM_OutputPolarity);
/* Write to LPTIMx CFGR */
LPTIMx->CFGR = tmpreg1;
}
/**
* @brief Initializes the LPTIM according to the specified parameters in the
* LPTIM_InitTypeDef and creates the associated handle.
* @param hlptim : LPTIM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
{
uint32_t tmpcfgr = 0;
/* Check the LPTIM handle allocation */
if(hlptim == NULL)
{
return HAL_ERROR;
}
/* Check the parameters */
assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));
if((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM)
{
assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
}
assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source));
if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
{
assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime));
assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge));
}
assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity));
assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode));
assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource));
if(hlptim->State == HAL_LPTIM_STATE_RESET)
{
/* Init the low level hardware */
HAL_LPTIM_MspInit(hlptim);
}
/* Change the LPTIM state */
hlptim->State = HAL_LPTIM_STATE_BUSY;
/* Get the LPTIMx CFGR value */
tmpcfgr = hlptim->Instance->CFGR;
if ((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM)
{
tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT));
}
if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
{
tmpcfgr &= (uint32_t)(~ (LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGSEL));
}
/* Clear CKSEL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD |
LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE ));
/* Set initialization parameters */
tmpcfgr |= (hlptim->Init.Clock.Source |
hlptim->Init.Clock.Prescaler |
hlptim->Init.OutputPolarity |
hlptim->Init.UpdateMode |
hlptim->Init.CounterSource);
if ((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM)
{
tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity |
hlptim->Init.UltraLowPowerClock.SampleTime);
}
if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
{
/* Enable External trigger and set the trigger source */
tmpcfgr |= (hlptim->Init.Trigger.Source |
hlptim->Init.Trigger.ActiveEdge |
hlptim->Init.Trigger.SampleTime);
}
/* Write to LPTIMx CFGR */
hlptim->Instance->CFGR = tmpcfgr;
/* Change the LPTIM state */
hlptim->State = HAL_LPTIM_STATE_READY;
/* Return function status */
return HAL_OK;
}
