/** * @brief Change cycle value of TBx. * @param TBx: Select the TMRB channel. * This parameter can be one of the following values: * TSB_TB0, TSB_TB1, TSB_TB2, TSB_TB3, TSB_TB4, TSB_TB5, TSB_TB6, TSB_TB7. * @param Cycle: New cycle value, max 0xFFFF. * @retval None */ void TMRB_ChangeCycle(TSB_TB_TypeDef * TBx, uint32_t Cycle) { /* Check the parameters */ assert_param(IS_TMRB_ALL_PERIPH(TBx)); assert_param(IS_TMRB_VALUE(Cycle)); assert_param(IS_VALID_DUTY(TBx->RG0, Cycle)); /* Write cycle into RG1 */ TBx->RG1 = Cycle; }
/** * @brief Change duty value of TBx. * @param TBx: Select the TMRB channel. * This parameter can be one of the following values: * TSB_TB0, TSB_TB1, TSB_TB2, TSB_TB3, TSB_TB4, TSB_TB5, TSB_TB6, TSB_TB7. * @param Duty: New duty value, max 0xFFFF. * @retval None */ void TMRB_ChangeDuty(TSB_TB_TypeDef * TBx, uint32_t Duty) { /* Check the parameters */ assert_param(IS_TMRB_ALL_PERIPH(TBx)); assert_param(IS_TMRB_VALUE(Duty)); assert_param(IS_VALID_DUTY(Duty, TBx->RG1)); /* Write duty into RG0 */ TBx->RG0 = Duty; }
/** * @brief Change trailingtiming value of TBx. * @param TBx: Select the TMRB channel. * This parameter can be one of the following values: * TSB_TB0, TSB_TB1, TSB_TB2, TSB_TB3, * TSB_TB4, TSB_TB5, TSB_TB6, TSB_TB7. * @param TrailingTiming: New trailingtiming value, max 0xFFFF. * @retval None */ void TMRB_ChangeTrailingTiming(TSB_TB_TypeDef * TBx, uint32_t TrailingTiming) { /* Check the parameters */ assert_param(IS_TMRB_ALL_PERIPH(TBx)); assert_param(IS_TMRB_VALUE(TrailingTiming)); assert_param(IS_VALID_LEADINGTIMING(TBx->RG0, TrailingTiming)); /* Write trailingtiming into RG1 */ TBx->RG1 = TrailingTiming; }
/** * @brief Change leadingtiming value of TBx. * @param TBx: Select the TMRB channel. * This parameter can be one of the following values: * TSB_TB0, TSB_TB1, TSB_TB2, TSB_TB3, * TSB_TB4, TSB_TB5, TSB_TB6, TSB_TB7. * @param LeadingTiming: New leadingtiming value, max 0xFFFF. * @retval None */ void TMRB_ChangeLeadingTiming(TSB_TB_TypeDef * TBx, uint32_t LeadingTiming) { /* Check the parameters */ assert_param(IS_TMRB_ALL_PERIPH(TBx)); assert_param(IS_TMRB_VALUE(LeadingTiming)); assert_param(IS_VALID_LEADINGTIMING(LeadingTiming, TBx->RG1)); /* Write leadingtiming into RG0 */ TBx->RG0 = LeadingTiming; }
/** * @brief Initialize the specified TMRB channel. * @param TBx: Select the TMRB channel. * This parameter can be one of the following values: * TSB_TB0, TSB_TB1, TSB_TB2, TSB_TB3, TSB_TB4, TSB_TB5, TSB_TB6, TSB_TB7, TSB_TB8, TSB_TB9. * @param InitStruct: The structure containing basic TMRB configuration. * @retval None */ void TMRB_Init(TSB_TB_TypeDef * TBx, TMRB_InitTypeDef * InitStruct) { uint32_t tmp = 0U; /* Check the parameters */ assert_param(IS_POINTER_NOT_NULL(InitStruct)); assert_param(IS_TMRB_ALL_PERIPH(TBx)); assert_param(IS_TMRB_MODE(InitStruct->Mode)); if (InitStruct->Mode != 0U) { assert_param(IS_TMRB_CLK_DIV(InitStruct->ClkDiv)); } else { /* Do nothing */ } assert_param(IS_TMRB_VALUE(InitStruct->Cycle)); assert_param(IS_TMRB_UC_CTRL(InitStruct->UpCntCtrl)); assert_param(IS_TMRB_VALUE(InitStruct->Duty)); assert_param(IS_VALID_DUTY(InitStruct->Duty, InitStruct->Cycle)); /* Configure source clock for TBx */ tmp = TBx->MOD; tmp &= MOD_BIT7_CLEAR; tmp &= MOD_CLK_CLE_CLEAR; if (InitStruct->Mode != 0U) { /* Use internal clock, set the prescaler */ tmp |= InitStruct->ClkDiv; } else { /* Use external clock */ tmp |= InitStruct->Mode; } /* Set up-counter running mode */ tmp |= InitStruct->UpCntCtrl; tmp |= MOD_TBCP_SET; TBx->MOD = tmp; /* Write duty into RG0 */ TBx->RG0 = InitStruct->Duty; /* Write cycle into RG1 */ TBx->RG1 = InitStruct->Cycle; }