float32 IfxScuCcu_getSourceFrequency(void)
{
float32 sourcefreq;
switch (SCU_CCUCON0.B.CLKSEL)
{
case IfxScu_CCUCON0_CLKSEL_fBack:
sourcefreq = IfxScuCcu_getEvrFrequency();
break;
case IfxScu_CCUCON0_CLKSEL_fPll:
sourcefreq = IfxScuCcu_getPllFrequency();
break;
default:
sourcefreq = 0;
break;
}
return sourcefreq;
}
int core0_main(void)
{
udp_pcb_t * udp;
ip_addr_t addr;
pbuf_t *p = (void*)0;//(pbuf_t *)pbuf_alloc_special(MEMP_PBUF);
uint16 idx;
uint16 total;
/*
* !!WATCHDOG0 AND SAFETY WATCHDOG ARE DISABLED HERE!!
* Enable the watchdog in the demo if it is required and also service the watchdog periodically
* */
IfxScuWdt_disableCpuWatchdog(IfxScuWdt_getCpuWatchdogPassword());
IfxScuWdt_disableSafetyWatchdog(IfxScuWdt_getSafetyWatchdogPassword());
/* Initialise the application state */
g_AppCpu0.info.pllFreq = IfxScuCcu_getPllFrequency();
g_AppCpu0.info.cpuFreq = IfxScuCcu_getCpuFrequency(IfxCpu_getCoreId());
g_AppCpu0.info.sysFreq = IfxScuCcu_getSpbFrequency();
g_AppCpu0.info.stmFreq = IfxStm_getFrequency(&MODULE_STM0);
report.position = 0;
IfxPort_Io_initModule(&conf);
for (idx = 0; idx < conf.size; idx++)
{
IfxPort_Io_ConfigPin *tbl = &conf.pinTable[idx];
IfxPort_setPinHigh(tbl->pin->port, tbl->pin->pinIndex); // P33.0 = 0
}
initStm0();
/* Enable the global interrupts of this CPU */
IfxCpu_enableInterrupts();
/* Demo init */
wMultican_init();
Ifx_Lwip_Config config;
IP4_ADDR(&config.ipAddr, 192, 168, 7, 123);
IP4_ADDR(&config.netMask, 255, 255, 255, 0);
IP4_ADDR(&config.gateway, 192, 168, 7, 6);
MAC_ADDR(&config.ethAddr, 0x00, 0x20, 0x30, 0x40, 0x50, 0x60);
Ifx_Lwip_init(&config);
addr.addr8[3] = 6;
addr.addr8[2] = 7;
addr.addr8[1] = 168;
addr.addr8[0] = 192;
/* background endless loop */
IfxPort_setPinHigh(&MODULE_P33, 6); // P33.0 = 0
total = Ifx_g_Eth.config.phyLink();
if (total == 1) {
report.phy_link = 1;
} else {
report.phy_link = 0;
}
ethRam = NULL_PTR;
udp = udp_new();
while (TRUE)
{
Ifx_Lwip_pollTimerFlags();
Ifx_Lwip_pollReceiveFlags();
if (total != Ifx_g_Eth.config.phyLink()) {
total = Ifx_g_Eth.config.phyLink();
if (total == 1) {
IfxPort_setPinLow(&MODULE_P33, 6);
netif_set_up(&Ifx_g_Lwip.netif);
IfxEth_startTransmitter(Ifx_g_Lwip.netif.state);
} else {
netif_set_down(&Ifx_g_Lwip.netif);
IfxPort_setPinHigh(&MODULE_P33, 6);
}
}
report.phy_link = total;
report.mdio_stat = IfxEth_Phy_Pef7071_MIIState();
report.ethRam = ethRam!=NULL?1:0;
wMultiCanNode0Demo_run(report, 0);
if ((stat & 0x0003) != 0x01) {
IfxPort_setPinLow(&MODULE_P33, 7);
} else {
IfxPort_setPinHigh(&MODULE_P33, 7);
}
if (Ifx_g_Eth.config.phyLink() && (ethRam = IfxEth_getTransmitBuffer(&Ifx_g_Eth))) {
p = (pbuf_t *)memp_malloc(MEMP_PBUF);
if (p != NULL) {
p->payload = LWIP_MEM_ALIGN((void *)((u8_t *)ethRam));
p->len = 100;
p->tot_len = p->len;
p->next = NULL;
p->ref = 1;
p->type = PBUF_REF;
udp_sendto_if(udp, p, &addr, 5001, &Ifx_g_Lwip.netif);
pbuf_free(p);
IfxPort_setPinLow(&MODULE_P33, 8); // P33.0 = 0
}
} else {
IfxPort_setPinHigh(&MODULE_P33, 8); // P33.0 = 0
}
REGRESSION_RUN_STOP_PASS;
}
udp_remove(udp);
return 0;
}