int target_ldo_ctrl(uint8_t enable)
{
uint32_t ldocounter = 0;
uint32_t pm8x41_ldo_base = 0x13F00;
while (ldocounter < TOTAL_LDO_DEFINED) {
struct pm8x41_ldo ldo_entry = LDO((pm8x41_ldo_base +
0x100 * ldo_entry_array[ldocounter].ldo_id),
ldo_entry_array[ldocounter].ldo_type);
dprintf(SPEW, "Setting %s\n",
ldo_entry_array[ldocounter].ldo_id);
/* Set voltage during power on */
if (enable) {
pm8x41_ldo_set_voltage(&ldo_entry,
ldo_entry_array[ldocounter].ldo_voltage);
pm8x41_ldo_control(&ldo_entry, enable);
} else if(ldo_entry_array[ldocounter].ldo_id != HFPLL_LDO_ID) {
pm8x41_ldo_control(&ldo_entry, enable);
}
ldocounter++;
}
return NO_ERROR;
}
//Grafo, tipo de GRASP, se o grafo está "incolor"
void GRASP::doGrasp(int type, int avoidColor){
switch (type) {
case 1:
LDO(avoidColor);
break;
case 2:
SDO(avoidColor);
break;
case 3:
IDO(avoidColor);
break;
default:
FirstFit(avoidColor);
}
}
#define CORNER(_id, _rpm_id, _name, _ranges) \
[RPM_VREG_ID_PM8018_##_id] = { \
.req = { \
[0] = { .id = MSM_RPM_ID_##_rpm_id, }, \
[1] = { .id = -1, }, \
}, \
.type = RPM_REGULATOR_TYPE_CORNER, \
.set_points = &_ranges##_set_points, \
.part = &corner_parts, \
.id = RPM_VREG_ID_PM8018_##_id, \
.rdesc.name = _name, \
}
static struct vreg vregs[] = {
LDO(L2, "8018_l2", "8018_l2_pc", pldo, LDO_50, 0),
LDO(L3, "8018_l3", "8018_l3_pc", pldo, LDO_50, 0),
LDO(L4, "8018_l4", "8018_l4_pc", pldo, LDO_300, 0),
LDO(L5, "8018_l5", "8018_l5_pc", pldo, LDO_150, 0),
LDO(L6, "8018_l6", "8018_l6_pc", pldo, LDO_150, 0),
LDO(L7, "8018_l7", "8018_l7_pc", pldo, LDO_300, 0),
LDO(L8, "8018_l8", "8018_l8_pc", nldo, LDO_150, 1),
LDO(L9, "8018_l9", NULL, nldo1200, LDO_1200, 0),
LDO(L10, "8018_l10", NULL, nldo1200, LDO_1200, 0),
LDO(L11, "8018_l11", NULL, nldo1200, LDO_1200, 0),
LDO(L12, "8018_l12", NULL, nldo1200, LDO_1200, 0),
LDO(L13, "8018_l13", "8018_l13_pc", pldo, LDO_50, 0),
LDO(L14, "8018_l14", "8018_l14_pc", pldo, LDO_50, 0),
SMPS(S1, "8018_s1", "8018_s1_pc", smps, SMPS_1500),
SMPS(S2, "8018_s2", "8018_s2_pc", smps, SMPS_1500),
#define CORNER(_id, _rpm_id, _name, _ranges) \
[RPM_VREG_ID_PM##_id] = { \
.req = { \
[0] = { .id = MSM_RPM_ID_##_rpm_id, }, \
[1] = { .id = -1, }, \
}, \
.type = RPM_REGULATOR_TYPE_CORNER, \
.set_points = &_ranges##_set_points, \
.part = &corner_parts, \
.id = RPM_VREG_ID_PM##_id, \
.rdesc.name = _name, \
}
static struct vreg vregs_msm8930_pm8038[] = {
LDO(8038_L1, "8038_l1", NULL, nldo1200, LDO_1200, 1),
LDO(8038_L2, "8038_l2", "8038_l2_pc", nldo, LDO_150, 1),
LDO(8038_L3, "8038_l3", "8038_l3_pc", pldo, LDO_50, 0),
LDO(8038_L4, "8038_l4", "8038_l4_pc", pldo, LDO_50, 0),
LDO(8038_L5, "8038_l5", "8038_l5_pc", pldo, LDO_600, 0),
LDO(8038_L6, "8038_l6", "8038_l6_pc", pldo, LDO_600, 0),
LDO(8038_L7, "8038_l7", "8038_l7_pc", pldo, LDO_600, 0),
LDO(8038_L8, "8038_l8", "8038_l8_pc", pldo, LDO_300, 0),
LDO(8038_L9, "8038_l9", "8038_l9_pc", pldo, LDO_300, 0),
LDO(8038_L10, "8038_l10", "8038_l10_pc", pldo, LDO_600, 0),
LDO(8038_L11, "8038_l11", "8038_l11_pc", pldo, LDO_600, 0),
LDO(8038_L12, "8038_l12", "8038_l12_pc", nldo, LDO_300, 1),
LDO(8038_L13, "8038_l13", NULL, ln_ldo, LDO_5, 0),
LDO(8038_L14, "8038_l14", "8038_l14_pc", pldo, LDO_50, 0),
LDO(8038_L15, "8038_l15", "8038_l15_pc", pldo, LDO_150, 0),
LDO(8038_L16, "8038_l16", NULL, nldo1200, LDO_1200, 1),
filter_fct_t
net_filter_alloc(filter_t *filter, unsigned int size, unsigned int *lenp)
{
struct local *s;
int len, oldi, i, j, ncommon, sp;
int type, value, arg, op, reg, reg1, dst, commoni;
int *instructions, *instp;
#if USE_EXTRA_REGS
int oldmaxreg;
#endif
boolean_t compiling;
#define SCHAR_MAX 127 /* machine/machlimits->h, anyone? */
assert(NET_MAX_FILTER <= SCHAR_MAX);
assert(NET_FILTER_STACK_DEPTH <= SCHAR_MAX);
assert(NREGS <= SCHAR_MAX);
assert(size < NET_MAX_FILTER);
s = (struct local *) kalloc(sizeof *s);
#if USE_EXTRA_REGS
s->maxreg = INITIAL_NSCRATCHREGS;
#endif
len = 0;
compiling = FALSE;
/* This loop runs at least twice, once with compiling==FALSE to determine
the length of the instructions we will compile, and once with
compiling==TRUE to compile them. The code generated on the two passes
must be the same. In the USE_EXTRA_REGS case, the loop can be re-run
an extra time while !compiling, if we decide to use the callee-saves
registers. This is because we may be able to generate better code with
the help of these registers than before. */
while (1) {
/* Identify values that we can potentially preserve in a register to
avoid having to reload them. All immediate values and references to
known offsets in the header or data are candidates. The results of
this loop are the same on every run, so with a bit of work we
could run it just once; but this is not a time-critical
application. */
ncommon = 0;
for (i = 0; i < size; i++) {
oldi = i;
arg = NETF_ARG(filter[i]);
if (arg == NETF_PUSHLIT) {
type = NF_LITERAL;
value = filter[++i];
if (value == 0)
continue;
} else if (arg >= NETF_PUSHSTK) {
continue;
} else if (arg >= NETF_PUSHHDR) {
type = NF_HEADER;
value = arg - NETF_PUSHHDR;
} else if (arg >= NETF_PUSHWORD) {
type = NF_DATA;
value = arg - NETF_PUSHWORD;
} else {
continue;
}
for (j = 0; j < ncommon; j++) {
if (s->common[j].type == type && s->common[j].value == value) {
s->common[j].nuses++;
break;
}
}
if (j == ncommon) {
s->common[j].type = type;
s->common[j].value = value;
s->common[j].nuses = 1;
ncommon++;
}
s->commonpos[oldi] = j;
}
#if USE_EXTRA_REGS
oldmaxreg = s->maxreg;
#endif
/* Initially, no registers hold common values or are on the stack. */
for (i = 0; i < ncommon; i++)
s->common[i].reg = NO_REG;
for (i = 0; i < NSCRATCHREGS; i++) {
s->regs[scratchregs[i]].commoni = NOT_COMMON_VALUE;
s->regs[scratchregs[i]].stacktimes = 0;
}
/* Now read through the filter and generate code. */
sp = -1; /* sp points to top element */
for (i = 0; i < size; i++) {
if (!compiling)
instp = junk_filter;
assert(sp >= -1);
assert(sp < NET_FILTER_STACK_DEPTH - 1);
commoni = s->commonpos[i];
arg = NETF_ARG(filter[i]);
op = NETF_OP(filter[i]);
/* Generate code to get the required value into a register and
set `reg' to the number of this register. */
switch (arg) {
case NETF_PUSHLIT:
value = filter[++i];
reg = s->common[commoni].reg;
if (reg == 0) {
if ((reg = allocate_register(s, commoni)) == 0)
goto fail;
assert(value >= 0); /* Comes from unsigned short. */
if (value > MAX_LDO) {
*instp++ = LDIL(value & ~MAX_LDO, reg);
value &= MAX_LDO;
if (value != 0)
*instp++ = LDO(value, reg, reg);
} else
*instp++ = LDO(value, 0, reg);
}
s->common[commoni].nuses--;
break;
case NETF_NOPUSH:
reg = s->stackregs[sp--];
s->regs[reg].stacktimes--;
break;
case NETF_PUSHZERO:
reg = 0;
break;
case NETF_PUSHIND:
case NETF_PUSHHDRIND:
reg1 = s->stackregs[sp--];
s->regs[reg1].stacktimes--;
if (arg == NETF_PUSHIND)
*instp++ = ARITH_OP(OP_COMCLR, ARITH_ULT, reg1, REG_ARG1,
REG_RET0);
/* comclr,< <reg1>,arg1,ret0 */
else
*instp++ = COMICLR(ARITH_UGT,
NET_HDW_HDR_MAX/sizeof (unsigned short),
reg1, REG_RET0);
/* comiclr,> N,<reg1>,ret0 */
assert((NET_HDW_HDR_MAX / sizeof(unsigned short)) <=
MAX_COMICLR);
*instp++ = BV_N(0, REG_RTN); /* bv,n (rp) */
if ((reg = allocate_register(s, -1)) == 0)
goto fail;
*instp++ = LDHX_S(reg1,
(arg == NETF_PUSHIND) ? REG_ARG0 : REG_ARG2,
reg); /* ldhx,s reg1(arg0/2),reg */
break;
default:
if (arg >= NETF_PUSHSTK)
reg = s->stackregs[sp - (arg - NETF_PUSHSTK)];
else if (arg >= NETF_PUSHWORD) {
assert(2 * (NETF_PUSHHDR - NETF_PUSHWORD) <= MAX_LDO);
assert(NETF_PUSHHDR - NETF_PUSHWORD <= MAX_COMICLR);
assert(NETF_PUSHSTK - NETF_PUSHHDR <= MAX_LDO);
reg = s->common[commoni].reg;
if (reg == 0) {
if ((reg = allocate_register(s, commoni)) == 0)
goto fail;
if (arg < NETF_PUSHHDR) {
value = arg - NETF_PUSHWORD;
*instp++ = COMICLR(ARITH_ULT, value, REG_ARG1,
REG_RET0);
/* comiclr,< value,arg1,ret0 */
*instp++ = BV_N(0, REG_RTN);
/* bv,n (rp) */
reg1 = REG_ARG0;
} else {
value = arg - NETF_PUSHHDR;
reg1 = REG_ARG2;
}
*instp++ = LDH(2 * value, reg1, reg);
}
s->common[commoni].nuses--;
}
}
/* Now generate code to do `op' on `reg1' (lhs) and `reg' (rhs). */
if (op != NETF_NOP) {
reg1 = s->stackregs[sp--];
s->regs[reg1].stacktimes--;
}
switch (op) {
case NETF_OP(NETF_CAND):
case NETF_OP(NETF_COR):
case NETF_OP(NETF_CNAND):
case NETF_OP(NETF_CNOR):
dst = -1;
case NETF_OP(NETF_NOP):
break;
default:
/* Allocate a register to put the result in. */
if ((dst = allocate_register(s, -1)) == 0)
goto fail;
}
switch (op) {
case NETF_OP(NETF_NOP):
dst = reg;
break;
case NETF_OP(NETF_EQ):
case NETF_OP(NETF_LT):
case NETF_OP(NETF_LE):
case NETF_OP(NETF_GT):
case NETF_OP(NETF_GE):
case NETF_OP(NETF_NEQ):
switch (op) {
case NETF_OP(NETF_EQ): j = ARITH_NE; break;
case NETF_OP(NETF_LT): j = ARITH_UGE; break;
case NETF_OP(NETF_LE): j = ARITH_UGT; break;
case NETF_OP(NETF_GT): j = ARITH_ULE; break;
case NETF_OP(NETF_GE): j = ARITH_ULT; break;
case NETF_OP(NETF_NEQ): j = ARITH_EQ; break;
}
*instp++ = ARITH_OP(OP_COMCLR, j, reg1, reg, dst);
*instp++ = LDI(1, dst);
break;
case NETF_OP(NETF_AND):
case NETF_OP(NETF_OR):
case NETF_OP(NETF_XOR):
case NETF_OP(NETF_ADD):
case NETF_OP(NETF_SUB):
switch (op) {
case NETF_OP(NETF_AND): j = OP_AND; break;
case NETF_OP(NETF_OR): j = OP_OR; break;
case NETF_OP(NETF_XOR): j = OP_XOR; break;
case NETF_OP(NETF_ADD): j = OP_ADD; break;
case NETF_OP(NETF_SUB): j = OP_SUB; break;
}
*instp++ = ARITH_OP(j, ARITH_NEVER, reg1, reg, dst);
if (op == NETF_OP(NETF_ADD) || op == NETF_OP(NETF_SUB))
*instp++ = EXTRU(dst, 31, 16, dst);
/* Adds and subtracts can produce results that don't fit in
16 bits so they have to be masked. The logical operations
can't so they don't. */
break;
case NETF_OP(NETF_LSH):
case NETF_OP(NETF_RSH):
*instp++ = SUBI(31, reg, REG_RET0);
*instp++ = MTSAR(REG_RET0);
if (op == NETF_OP(NETF_LSH)) {
*instp++ = ZVDEP(reg1, 32, dst);
*instp++ = EXTRU(dst, 31, 16, dst);
} else
*instp++ = VEXTRU(reg, 32, dst);
/* For some reason, all arithmetic is done in 16 bits,
so the result of LSH has to be masked with 0xFFFF. The
result of RSH doesn't since it can't be any bigger than
the 16-bit value that was shifted.
We use ret0 to compute the shift amount because we can't use
reg or reg1 (which might have values we subsequently use),
nor dst (which might be the same as reg1). Alternatively, we
could allocate another register, but we would need to
temporarily do s->regs[dst].stacktimes++ to avoid just
getting dst again. */
break;
case NETF_OP(NETF_COR):
/* comb,<>,n reg1,reg,$x | bv (rp) | ldi 1,ret0 | $x:
I have found no way to do this in less than three
instructions (as for the other NETF_C* operations), unless
it be to branch to a "bv (rp) | ldi 1,ret0" postamble,
and what would be the point in that? */
*instp++ = COMB_SKIP_1(COND_EQ, 1, 1, reg1, reg);
*instp++ = BV(0, REG_RTN);
*instp++ = LDI(1, REG_RET0);
break;
case NETF_OP(NETF_CNAND):
/* xor,= reg1,reg,ret0 | bv,n (rp)
This leaves a non-zero (true) value in ret0 if the values
are different. */
*instp++ = ARITH_OP(OP_XOR, ARITH_EQ, reg1, reg, REG_RET0);
*instp++ = BV_N(0, REG_RTN);
break;
case NETF_OP(NETF_CAND):
case NETF_OP(NETF_CNOR):
/* comclr,{=|<>} reg1,reg,ret0 | bv,n (rp) */
j = (op == NETF_OP(NETF_CAND)) ? ARITH_EQ : ARITH_NE;
*instp++ = ARITH_OP(OP_COMCLR, j, reg1, reg, REG_RET0);
*instp++ = BV_N(0, REG_RTN);
break;
default:
printf("op == 0x%x\n", op);
panic("net_filter_alloc: bad op");
/* Should have been caught by parse_net_filter(). */
}
/* If the op generated a result, push it on the stack. */
if (dst >= 0) {
s->stackregs[++sp] = dst;
s->regs[dst].stacktimes++;
}
if (!compiling) {
assert(instp - junk_filter <= MAX_INSTR_PER_ITEM);
len += instp - junk_filter;
}
}
if (compiling) {
/* If the stack contains any values, we are supposed to return 0 or
1 according as the top-of-stack is zero or not. Since the only
place we are called requires just zero-false/nonzero-true, we
simply copy the value into ret0. If the stack is empty, we
return TRUE. */
*instp++ = BV(0, REG_RTN); /* bv (rp) */
if (sp >= 0)
*instp++ = COPY(s->stackregs[sp], REG_RET0);
else
*instp++ = LDI(1, REG_RET0);
break;
} else {
len += 2;
#if USE_EXTRA_REGS
if (s->maxreg > oldmaxreg) {
len = 0;
continue;
}
len += compile_preamble(NULL, s);
#endif
}
if ((instructions = kmem_alloc_exec(len * sizeof (int))) == NULL)
return NULL;
instp = instructions;
#if USE_EXTRA_REGS
instp += compile_preamble(instp, s);
#endif
compiling = TRUE;
}
assert(instp - instructions == len);
*lenp = len * sizeof (int);
fdcache(HP700_SID_KERNEL, (vm_offset_t)instructions, len * sizeof (int));
kfree((vm_offset_t) s, sizeof *s);
return (filter_fct_t) instructions;
fail:
assert(!compiling);
kfree((vm_offset_t) s, sizeof *s);
printf("net_filter_alloc: failed to compile (filter too complex)\n");
printf("-- will work, but more slowly; consider enabling USE_EXTRA_REGS\n");
return NULL;
}
#define LVS(_id, _ctrl_addr) \
[_id] = { \
.ctrl_addr = _ctrl_addr, \
.type = REGULATOR_TYPE_LVS, \
}
#define NCP(_id, _ctrl_addr) \
[_id] = { \
.ctrl_addr = _ctrl_addr, \
.type = REGULATOR_TYPE_NCP, \
}
static struct pm8058_vreg pm8058_vreg[] = {
/* id ctrl test n/p */
LDO(PM8058_VREG_ID_L0, 0x009, 0x065, 1),
LDO(PM8058_VREG_ID_L1, 0x00A, 0x066, 1),
LDO(PM8058_VREG_ID_L2, 0x00B, 0x067, 0),
LDO(PM8058_VREG_ID_L3, 0x00C, 0x068, 0),
LDO(PM8058_VREG_ID_L4, 0x00D, 0x069, 0),
LDO(PM8058_VREG_ID_L5, 0x00E, 0x06A, 0),
LDO(PM8058_VREG_ID_L6, 0x00F, 0x06B, 0),
LDO(PM8058_VREG_ID_L7, 0x010, 0x06C, 0),
LDO(PM8058_VREG_ID_L8, 0x011, 0x06D, 0),
LDO(PM8058_VREG_ID_L9, 0x012, 0x06E, 0),
LDO(PM8058_VREG_ID_L10, 0x013, 0x06F, 0),
LDO(PM8058_VREG_ID_L11, 0x014, 0x070, 0),
LDO(PM8058_VREG_ID_L12, 0x015, 0x071, 0),
LDO(PM8058_VREG_ID_L13, 0x016, 0x072, 0),
LDO(PM8058_VREG_ID_L14, 0x017, 0x073, 0),
LDO(PM8058_VREG_ID_L15, 0x089, 0x0E5, 0),
#define NCP(_id, _name, _name_pc) \
[RPM_VREG_ID_PM8921_##_id] = { \
.req = { \
[0] = { .id = MSM_RPM_ID_##_id##_0, }, \
[1] = { .id = MSM_RPM_ID_##_id##_1, }, \
}, \
.type = RPM_REGULATOR_TYPE_NCP, \
.set_points = &ncp_set_points, \
.part = &ncp_parts, \
.id = RPM_VREG_ID_PM8921_##_id, \
.rdesc.name = _name, \
.rdesc_pc.name = _name_pc, \
}
static struct vreg vregs[] = {
LDO(L1, "8921_l1", "8921_l1_pc", nldo, LDO_150, 1),
LDO(L2, "8921_l2", "8921_l2_pc", nldo, LDO_150, 1),
LDO(L3, "8921_l3", "8921_l3_pc", pldo, LDO_150, 0),
LDO(L4, "8921_l4", "8921_l4_pc", pldo, LDO_50, 0),
LDO(L5, "8921_l5", "8921_l5_pc", pldo, LDO_300, 0),
LDO(L6, "8921_l6", "8921_l6_pc", pldo, LDO_600, 0),
LDO(L7, "8921_l7", "8921_l7_pc", pldo, LDO_150, 0),
LDO(L8, "8921_l8", "8921_l8_pc", pldo, LDO_300, 0),
LDO(L9, "8921_l9", "8921_l9_pc", pldo, LDO_300, 0),
LDO(L10, "8921_l10", "8921_l10_pc", pldo, LDO_600, 0),
LDO(L11, "8921_l11", "8921_l11_pc", pldo, LDO_150, 0),
LDO(L12, "8921_l12", "8921_l12_pc", nldo, LDO_150, 1),
LDO(L13, "8921_l13", NULL, ln_ldo, LDO_5, 0),
LDO(L14, "8921_l14", "8921_l14_pc", pldo, LDO_50, 0),
LDO(L15, "8921_l15", "8921_l15_pc", pldo, LDO_150, 0),
LDO(L16, "8921_l16", "8921_l16_pc", pldo, LDO_300, 0),
#define NCP(_vreg_id, _rpm_id, _name, _name_pc) \
[RPM_VREG_ID_##_vreg_id] = { \
.req = { \
[0] = { .id = MSM_RPM_ID_##_rpm_id##_0, }, \
[1] = { .id = MSM_RPM_ID_##_rpm_id##_1, }, \
}, \
.type = RPM_REGULATOR_TYPE_NCP, \
.set_points = &ncp_set_points, \
.part = &ncp_parts, \
.id = RPM_VREG_ID_##_vreg_id, \
.rdesc.name = _name, \
.rdesc_pc.name = _name_pc, \
}
static struct vreg vregs[] = {
LDO(PM8058_L0, LDO0, "8058_l0", "8058_l0_pc", nldo, LDO_150),
LDO(PM8058_L1, LDO1, "8058_l1", "8058_l1_pc", nldo, LDO_300),
LDO(PM8058_L2, LDO2, "8058_l2", "8058_l2_pc", pldo, LDO_300),
LDO(PM8058_L3, LDO3, "8058_l3", "8058_l3_pc", pldo, LDO_150),
LDO(PM8058_L4, LDO4, "8058_l4", "8058_l4_pc", pldo, LDO_50),
LDO(PM8058_L5, LDO5, "8058_l5", "8058_l5_pc", pldo, LDO_300),
LDO(PM8058_L6, LDO6, "8058_l6", "8058_l6_pc", pldo, LDO_50),
LDO(PM8058_L7, LDO7, "8058_l7", "8058_l7_pc", pldo, LDO_50),
#ifdef FEATURE_SKY_3_5PHIEARJACK //PS2_P13106 Kang, Yoonkoo
LDO(PM8058_L8, LDO8, "8058_l8", "8058_l8_pc", pldo, LDO_300),
#else
LDO(PM8058_L8, LDO8, "8058_l8", "8058_l8_pc", pldo, LDO_300),
#endif
LDO(PM8058_L9, LDO9, "8058_l9", "8058_l9_pc", pldo, LDO_300),
LDO(PM8058_L10, LDO10, "8058_l10", "8058_l10_pc", pldo, LDO_300),
#ifdef CONFIG_SKY_TDMB
static int msm8974_edp_panel_power(int enable)
{
struct pm8x41_gpio gpio36_param = {
.direction = PM_GPIO_DIR_OUT,
.function = PM_GPIO_FUNC_2,
.vin_sel = 2, /* VIN_2 */
.pull = PM_GPIO_PULL_UP_1_5 | PM_GPIO_PULLDOWN_10,
.output_buffer = PM_GPIO_OUT_CMOS,
.out_strength = PM_GPIO_OUT_DRIVE_HIGH,
};
struct pm8x41_ldo ldo12 = LDO(PM8x41_LDO12, PLDO_TYPE);
if (enable) {
/* Enable backlight */
dprintf(SPEW, "Enable Backlight\n");
msm8974_pwm_backlight_ctrl(36, 8, 1);
dprintf(SPEW, "Enable Backlight Done\n");
/* Turn on LDO12 for edp vdda */
dprintf(SPEW, "Setting LDO12 n");
pm8x41_ldo_set_voltage(&ldo12, 1800000);
pm8x41_ldo_control(&ldo12, enable);
dprintf(SPEW, "Setting LDO12 Done\n");
/* Panel Enable */
dprintf(SPEW, "Panel Enable\n");
gpio_tlmm_config(58, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA,
GPIO_DISABLE);
gpio_set(58, 2);
dprintf(SPEW, "Panel Enable Done\n");
} else {
/* Keep LDO12 on, otherwise kernel will not boot */
gpio_set(58, 0);
msm8974_pwm_backlight_ctrl(36, 8, 0);
}
return 0;
}
bool target_display_panel_node(char *panel_name, char *pbuf, uint16_t buf_size)
{
int prefix_string_len = strlen(DISPLAY_CMDLINE_PREFIX);
bool ret = true;
panel_name += strspn(panel_name, " ");
if (!strcmp(panel_name, HDMI_PANEL_NAME)) {
if (buf_size < (prefix_string_len + LK_OVERRIDE_PANEL_LEN +
HDMI_CONTROLLER_STRING)) {
dprintf(CRITICAL, "command line argument is greater than buffer size\n");
return false;
}
strlcpy(pbuf, DISPLAY_CMDLINE_PREFIX, buf_size);
buf_size -= prefix_string_len;
strlcat(pbuf, LK_OVERRIDE_PANEL, buf_size);
buf_size -= LK_OVERRIDE_PANEL_LEN;
strlcat(pbuf, HDMI_CONTROLLER_STRING, buf_size);
} else {
ret = gcdb_display_cmdline_arg(panel_name, pbuf, buf_size);
}
return ret;
}
void LDOU(mmix_t *mmix, byte X, byte Y, byte Z)
{
LDO(mmix, X, Y, Z);
}
[_id] = { \
.ctrl_addr = _ctrl_addr, \
.pmr_addr = _pmr_addr, \
.type = REGULATOR_TYPE_SMPS, \
}
#define VS(_id, _ctrl_addr, _pmr_addr) \
[_id] = { \
.ctrl_addr = _ctrl_addr, \
.pmr_addr = _pmr_addr, \
.type = REGULATOR_TYPE_VS, \
}
static struct pm8901_vreg pm8901_vreg[] = {
/* id ctrl pmr tst n/p */
LDO(PM8901_VREG_ID_L0, 0x02F, 0x0AB, 0x030, 1),
LDO(PM8901_VREG_ID_L1, 0x031, 0x0AC, 0x032, 0),
LDO(PM8901_VREG_ID_L2, 0x033, 0x0AD, 0x034, 0),
LDO(PM8901_VREG_ID_L3, 0x035, 0x0AE, 0x036, 0),
LDO(PM8901_VREG_ID_L4, 0x037, 0x0AF, 0x038, 0),
LDO(PM8901_VREG_ID_L5, 0x039, 0x0B0, 0x03A, 0),
LDO(PM8901_VREG_ID_L6, 0x03B, 0x0B1, 0x03C, 0),
/* id ctrl pmr */
SMPS(PM8901_VREG_ID_S0, 0x05B, 0x0A6),
SMPS(PM8901_VREG_ID_S1, 0x06A, 0x0A7),
SMPS(PM8901_VREG_ID_S2, 0x079, 0x0A8),
SMPS(PM8901_VREG_ID_S3, 0x088, 0x0A9),
SMPS(PM8901_VREG_ID_S4, 0x097, 0x0AA),
/* id ctrl pmr */
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <bits.h>
#include <debug.h>
#include <reg.h>
#include <spmi.h>
#include <string.h>
#include <pm8x41_hw.h>
#include <pm8x41.h>
#include <platform/timer.h>
struct pm8x41_ldo ldo_data[] = {
LDO("LDO2", NLDO_TYPE, 0x14100, LDO_RANGE_CTRL, LDO_STEP_CTRL, LDO_EN_CTL_REG),
LDO("LDO12", PLDO_TYPE, 0x14B00, LDO_RANGE_CTRL, LDO_STEP_CTRL, LDO_EN_CTL_REG),
LDO("LDO22", PLDO_TYPE, 0x15500, LDO_RANGE_CTRL, LDO_STEP_CTRL, LDO_EN_CTL_REG),
};
/* SPMI helper functions */
uint8_t pm8x41_reg_read(uint32_t addr)
{
uint8_t val = 0;
struct pmic_arb_cmd cmd;
struct pmic_arb_param param;
cmd.address = PERIPH_ID(addr);
cmd.offset = REG_OFFSET(addr);
cmd.slave_id = SLAVE_ID(addr);
cmd.priority = 0;
