void watchdog_init(void) { LL_IWDG_EnableWriteAccess(IWDG); /* IWDG timer is 40 KHz, configure to trigger every seconds */ LL_IWDG_SetPrescaler(IWDG, LL_IWDG_PRESCALER_16); LL_IWDG_SetReloadCounter(IWDG, 2500); LL_IWDG_Enable(IWDG); }
static int iwdg_stm32_install_timeout(struct device *dev, const struct wdt_timeout_cfg *config) { IWDG_TypeDef *iwdg = IWDG_STM32_STRUCT(dev); u32_t timeout = config->window.max * USEC_PER_MSEC; u32_t prescaler = 0U; u32_t reload = 0U; u32_t tickstart; if (config->callback != NULL) { return -ENOTSUP; } iwdg_stm32_convert_timeout(timeout, &prescaler, &reload); if (IS_IWDG_TIMEOUT(timeout) || IS_IWDG_PRESCALER(prescaler) || IS_IWDG_RELOAD(reload)) { /* One of the parameters provided is invalid */ return -EINVAL; } tickstart = k_uptime_get_32(); while (LL_IWDG_IsReady(iwdg) == 0) { /* Wait untill WVU, RVU, PVU are reset before updating */ if ((k_uptime_get_32() - tickstart) > IWDG_DEFAULT_TIMEOUT) { return -ENODEV; } } LL_IWDG_EnableWriteAccess(iwdg); LL_IWDG_SetPrescaler(iwdg, prescaler); LL_IWDG_SetReloadCounter(iwdg, reload); return 0; }